other constructs and also the "rule of least astonishment".
If you absolutely must have that functionality, can I suggest that you have a
more obvious indicator - something like "AND_MORE" or "OR_MORE" so that it is
obvious to the code reader what is going on.
Rob Scott
R
If you have SDSF on z/OS 2.3, you can issue the "JT" action command against any
address space to see its TCB/RB structure.
The display indents the fixed field TCB one character when it is a daughter of
another TCB.
Rob Scott
Rocket Software
-Original Message-
From: IBM
Personally I think all *+n branches are ugly and dangerous.
Inside a macro, I would use a generated label with some prefix and SYSNDX.
Inside normal assembler, I would generate a real label.
However, that being said, I use the HLASM structured assembler macros that
solve all these problems for
employer, I
would recommend that you give it a go.
There are people on this list (or maybe even better on IBM-Main) who can help
when you hit problems.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web
and cleanup any associated
resources obtained on its behalf.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message-
From: IBM Mainframe Assembler List
) The chances of your server code overlaying storage is drastically reduced.
(o) Other minor advantages when looking at dumps and diagnostics is that
storage owned by your server code is much easier to spot and QA for storage
leak analysis.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue
Why not use MVCDK to update the non-key8 storage?
That is fine for fields where you are replacing the entire contents - but how
about an individual bit in a status byte for example where normally you would
use OI/NI or OIL/NIL ?
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue
between caller and
server - they are just hidden inside product macros.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message-
From: IBM Mainframe Assembler
that in mind
when reading it and composing your own code.
It is well worth a read for someone starting out in this area.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
, you should welcome the fact that the product has
converted from SVC to PC.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message-
From: IBM Mainframe
software products have this feature, and I think
you can also use IPCS VSMDATA to show the information if you are without a
commercial tool.
Note that if CSA/SQA tracking is dynamically activated it will only track new
CSA/SQA allocations.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue
as system level name/token - however the big advantage
over other methods of being possible to achieve in problem state code.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
, there are alternatives to using CADS,
for example : 64-bit common storage and shared 64-bit memory objects.
You could also consider a PC-ss routine (system-LX) to transfer the data
directly to the private storage of your STC.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA
at.
If you have further questions on the design of your cross-memory application,
IBM-Main might be a better place for asking questions as there are quite a few
IBM and ISV developers that lurk there.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468
Yes - you can also find it here :
ftp://public.dhe.ibm.com/eserver/zseries/zos/racf/pdf/zOS_System_Integrity.pdf
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
stuff.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of John
My advice :
(1) Use an STIMERM exit
(2) Use multiple ECBs in the mother task - one for the STIMERM exit to post and
another for ad-hoc interrupts/requests
(3) WAIT on an ECBLIST instead of just a single ECB
(4) You can then examine which ECB pops and take actions accordingly
Rob Scott
Lead
Steve
Using TROT is a great idea, but why not code the table like so:
HEX2CHAR DCC'000102030405060708090A0B0C0D0E0F'
DCC'101112131415161718191A1B1C1D1E1F'
...etc
Good call!
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468
X'C5F8C5F9C5C1C5C2C5C3C5C4C5C5C5C6' E8-EF
DCX'C6F0C6F1C6F2C6F3C6F4C6F5C6F6C6F7' F0-F7
DCX'C6F8C6F9C6C1C6C2C6C3C6C4C6C5C6C6' F8-FF
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel
a regular batch job.
Rob Scott
Lead Developer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU
:
IF (CLC,A,NE,B),OR,(CH,R1,LE,C)
STH R3,NUMBER
ENDIF ,
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message-
From: IBM Mainframe
This thread has been going on way too long without me adding my normal I love
FLOWASM
I love FLOWASM.
There - all done.
I would love to see the functionality provided by FLOWASM incorporated into
HLASM by runtime options.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA
normally be disallowed when HASNPASNSASN.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.617.614.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU
-thousand line assembler programs (typically with
multiple base registers) attempting to do everything in one big splat,
typically with lots of spaghetti branching to abstract labels - yuk.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.617.614.2305
and he also describes them in his fantastic
Structured Assembler Language Programming Using HLASM Share presentation.
I am not sure what the NIU set is.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.617.614.2305
Email: rsc...@rs.com
Web
optionally a register(s) to address any constants and literals.
Using IEABRC and pertinent use of subroutines should remove 99.9% of all base
register problems.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.617.614.2305
Email: rsc...@rs.com
Web
internal structure and macro set and I just do not have base
register issues at all. When I get register poor, I take this a nature's way
of telling me that I need to restructure/redesign the code.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel
* the current (at time of error) entry - so be careful.
Rob Scott
Lead Developer
Rocket Software
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of esst...@juno.com
Sent: 19 May 2011 22:16
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject
Agreed.
There is also the issue that inter-ASID
communication/synchronization/management is much harder to achieve in a
reliable and secure fashion than inter-TCB within the same ASID.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.617.614.2305
Life inside an ISV writing complex products would be very frustrating without
macros - personally I use them *all* the time for things ranging from
program/subroutine linkage and parameter list building to simple I can't be
bothered to keep typing these instructions tasks.
Rob Scott
Lead
and sample code is probably
what prevents it.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.617.614.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST
Tom,
I believe CC was referring to accessing data in another ASID *without* that
ASID participating in a formal cross-memory link.
A PC-ss is a formal cross-memory link between the two ASIDs and the server can
easily reference caller storage using AR-Mode and the ALET value of 1.
Rob Scott
(CLC,field,NE,value)
...
Call some subroutine
DOEXIT (LTR,R15,R15,NZ)
...etc
ENDDO
You could also label the DO (eg MAIN) and then use something like ASMLEAVE
MAIN from anywhere later in the logic.
Rob Scott
Lead Developer
Rocket Software
275 Grove
Keven
I agree - I would *love* to know how to override this behaviour in IPCS - I
find that it gets in the way much more than it helps.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.617.614.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
to move data) as the client (the SASN
in the PC-ss routine) can be addressed using the special ALET value of 1.
Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.617.614.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com
-Original Message
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