On Nov 25, 2021, at 12:49:20, Steve Smith wrote:
>
> My suggestion of using R14 for the base was because it's already set by the
> call to the subroutine.
>
RR15? (BALR 14,15)
-- gil
I typically encapsulate such things in macros with a sensitivity to the
architectural level. The downside is that it makes the macro more cluttered.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Assembler List
My suggestion of using R14 for the base was because it's already set by the
call to the subroutine.
sas
On Thu, Nov 25, 2021 at 2:32 PM Gary Weinhold wrote:
> The performance consideration I think would be the loading of R14
> immediately before its use in the branch instruction. Moving it
The performance consideration I think would be the loading of R14
immediately before its use in the branch instruction. Moving it up a
couple instructions may help.
On 2021-11-25 2:11 p.m., Jeremy Schwartz wrote:
Nice job and thanks for correction on branch to table. One thing to point out
Nice job and thanks for correction on branch to table. One thing to point out
especially with mainframe assembly is just to be sure when generating
instructions that the proper instruction facilities are installed other wise
S0C1.
Best regards,
Jeremy
From: IBM
> using BCTR R14,0 rather than the LARL? It's shorter, but is a suppressed
branch.
I think modern Z chips are smart enough to "know" that those ,0 branch
instructions are always instruction-sequence no-ops.
Charles
-Original Message-
From: IBM Mainframe Assembler List
It could be shorter, and B BRTAB(R15) is not baseless. How about
CIJL R15,0,RC_MINUS
CIJH R15,MAXRC,RC_GT_MAX
LARL R14,BRTAN
B 0(R14,R15)
How does the performance compare using BCTR R14,0 rather than the LARL? It's
shorter, but is a suppressed branch.
>At a minimum, there should be an option to say "Leave the asm alone"
As I had written previously, there is a standards proposal to do just
that.
Peter Relson
z/OS Core Technology Design
