Re: MVCRL
Only if they are in the same cache line, which are 256 bytes the last I knew. Gary Weinhold Senior Application Architect DATAKINETICS | Data Performance & Optimization Phone:+1.613.523.5500 x216 Email: weinh...@dkl.com Visit us online at www.DKL.com E-mail Notification: The information contained in this email and any attachments is confidential and may be subject to copyright or other intellectual property protection. If you are not the intended recipient, you are not authorized to use or disclose this information, and we request that you notify us by reply mail or telephone and delete the original message from your mail system. From: IBM Mainframe Assembler List on behalf of Ngan, Robert (DXC Luxoft) Sent: June 8, 2022 11:32 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL Oops, didn't notice the "code is executing in getmained area" part. Doesn't that cause performance issues with Instruction/Data caches though? Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Ngan, Robert (DXC Luxoft) Sent: Wednesday, June 8, 2022 10:17 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL How would you gain relative access to a getmained area, other than by editing the immediate value in the instruction after the getmain? Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Farley, Peter x23353 Sent: Tuesday, June 7, 2022 17:51 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL Not if the code is executing in a getmained area. I've often put code in such areas for various reasons (e.g. OPEN exits, I/O error exits. etc.), and it's annoying to have to set up base registers. But I confess I think an "MVCRL" instruction where *both* source and destination are relative to the instruction address would see little use. If only the SOURCE address was relative to the instruction address, that might be a tad more useful. Then the D(L,B) for the destination could be in a reentrant area. Peter -Original Message- From: IBM Mainframe Assembler List On Behalf Of Ngan, Robert (DXC Luxoft) Sent: Tuesday, June 7, 2022 6:44 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL If the source is relative to the instruction address, the code would most like be non-reentrant. Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Schmitt, Michael Sent: Tuesday, June 7, 2022 17:29 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: MVCRL Why isn't there a Move Relative Long instruction, i.e. move with no registers, where both the source and destination are relative to the instruction address? Is this because there's no instruction format with two RI fields and a length? -- This message and any attachments are intended only for the use of the addressee and may contain information that is privileged and confidential. If the reader of the message is not the intended recipient or an authorized representative of the intended recipient, you are hereby notified that any dissemination of this communication is strictly prohibited. If you have received this communication in error, please notify us immediately by e-mail and delete the message and any attachments from your system.
Re: MVCRL
Oops, didn't notice the "code is executing in getmained area" part. Doesn't that cause performance issues with Instruction/Data caches though? Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Ngan, Robert (DXC Luxoft) Sent: Wednesday, June 8, 2022 10:17 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL How would you gain relative access to a getmained area, other than by editing the immediate value in the instruction after the getmain? Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Farley, Peter x23353 Sent: Tuesday, June 7, 2022 17:51 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL Not if the code is executing in a getmained area. I've often put code in such areas for various reasons (e.g. OPEN exits, I/O error exits. etc.), and it's annoying to have to set up base registers. But I confess I think an "MVCRL" instruction where *both* source and destination are relative to the instruction address would see little use. If only the SOURCE address was relative to the instruction address, that might be a tad more useful. Then the D(L,B) for the destination could be in a reentrant area. Peter -Original Message- From: IBM Mainframe Assembler List On Behalf Of Ngan, Robert (DXC Luxoft) Sent: Tuesday, June 7, 2022 6:44 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL If the source is relative to the instruction address, the code would most like be non-reentrant. Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Schmitt, Michael Sent: Tuesday, June 7, 2022 17:29 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: MVCRL Why isn't there a Move Relative Long instruction, i.e. move with no registers, where both the source and destination are relative to the instruction address? Is this because there's no instruction format with two RI fields and a length? -- This message and any attachments are intended only for the use of the addressee and may contain information that is privileged and confidential. If the reader of the message is not the intended recipient or an authorized representative of the intended recipient, you are hereby notified that any dissemination of this communication is strictly prohibited. If you have received this communication in error, please notify us immediately by e-mail and delete the message and any attachments from your system.
Re: MVCRL
How would you gain relative access to a getmained area, other than by editing the immediate value in the instruction after the getmain? Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Farley, Peter x23353 Sent: Tuesday, June 7, 2022 17:51 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL Not if the code is executing in a getmained area. I've often put code in such areas for various reasons (e.g. OPEN exits, I/O error exits. etc.), and it's annoying to have to set up base registers. But I confess I think an "MVCRL" instruction where *both* source and destination are relative to the instruction address would see little use. If only the SOURCE address was relative to the instruction address, that might be a tad more useful. Then the D(L,B) for the destination could be in a reentrant area. Peter -Original Message- From: IBM Mainframe Assembler List On Behalf Of Ngan, Robert (DXC Luxoft) Sent: Tuesday, June 7, 2022 6:44 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL If the source is relative to the instruction address, the code would most like be non-reentrant. Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Schmitt, Michael Sent: Tuesday, June 7, 2022 17:29 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: MVCRL Why isn't there a Move Relative Long instruction, i.e. move with no registers, where both the source and destination are relative to the instruction address? Is this because there's no instruction format with two RI fields and a length? -- This message and any attachments are intended only for the use of the addressee and may contain information that is privileged and confidential. If the reader of the message is not the intended recipient or an authorized representative of the intended recipient, you are hereby notified that any dissemination of this communication is strictly prohibited. If you have received this communication in error, please notify us immediately by e-mail and delete the message and any attachments from your system.
Re: MVCRL
A Relative Long field is four bytes; obviously two would not fit into an eight-byte instruction (there's no such thing), much less six.. A Relative Short (to coin a term) is only two bytes, so that seems feasible, as long as a suitable one-byte opcode is available. But then, others would want relative to based, vice versa, and more opcodes are needed. Or, maybe those could be defined to use a register for the length, which would allow 12-bit opcodes, which are more plentiful. The drawback is using a register; but having variable-length MVCs would be a pretty good compensation. sas On Wed, Jun 8, 2022 at 10:16 AM Schmitt, Michael wrote: > I was imagining something just like MVC except relative. > >
Re: MVCRL
I was imagining something just like MVC except relative. -Original Message- From: IBM Mainframe Assembler List On Behalf Of Robin Vowels Sent: Tuesday, June 7, 2022 11:24 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL How would the instrction be interruptable? How would the lengths of the source and destinations be specified? - Original Message - From: "Schmitt, Michael" To: Sent: Wednesday, June 08, 2022 8:28 AM Subject: MVCRL Why isn't there a Move Relative Long instruction, i.e. move with no registers, where both the source and destination are relative to the instruction address? Is this because there's no instruction format with two RI fields and a length? --- This email has been checked for viruses by Avast antivirus software. https://clicktime.symantec.com/37Nx1Dr4ecezgMjzVcwBojF6xn?u=https%3A%2F%2Fwww.avast.com%2Fantivirus
Re: MVCRL
Most of the assembler code I write is not required to be reentrant. However, the specific case I was looking at yesterday IS moving from my program's storage to a GETMAIN area. -Original Message- From: IBM Mainframe Assembler List On Behalf Of Farley, Peter x23353 Sent: Tuesday, June 7, 2022 5:51 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL Not if the code is executing in a getmained area. I've often put code in such areas for various reasons (e.g. OPEN exits, I/O error exits. etc.), and it's annoying to have to set up base registers. But I confess I think an "MVCRL" instruction where *both* source and destination are relative to the instruction address would see little use. If only the SOURCE address was relative to the instruction address, that might be a tad more useful. Then the D(L,B) for the destination could be in a reentrant area. Peter -Original Message- From: IBM Mainframe Assembler List On Behalf Of Ngan, Robert (DXC Luxoft) Sent: Tuesday, June 7, 2022 6:44 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: MVCRL If the source is relative to the instruction address, the code would most like be non-reentrant. Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Schmitt, Michael Sent: Tuesday, June 7, 2022 17:29 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: MVCRL Why isn't there a Move Relative Long instruction, i.e. move with no registers, where both the source and destination are relative to the instruction address? Is this because there's no instruction format with two RI fields and a length? -- This message and any attachments are intended only for the use of the addressee and may contain information that is privileged and confidential. If the reader of the message is not the intended recipient or an authorized representative of the intended recipient, you are hereby notified that any dissemination of this communication is strictly prohibited. If you have received this communication in error, please notify us immediately by e-mail and delete the message and any attachments from your system.
Re: MVCRL
Please note that there is already an instruction with the mnemonic MVCRL, "Move right to left", used to shift up data to make a gap for inserting new data. Jonathan Scott, HLASM IBM Hursley, UK
Re: MVCRL
Michael, how is this MACRO MVCRL ,, LARG 1, LARG 15, MVC 0(,1),0(15) MEND Destroys R1 and R15 Sender and receiver must be on HW boundry Supports a max length of 256 Needs 18 bytes Martin Am 08.06.22 um 00:28 schrieb Schmitt, Michael: Why isn't there a Move Relative Long instruction, i.e. move with no registers, where both the source and destination are relative to the instruction address? Is this because there's no instruction format with two RI fields and a length?
Re: MVCRL
Perhaps because IBM deemed it useless, or perhaps because instructions are limited to 48 bits. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf of Schmitt, Michael [michael.schm...@dxc.com] Sent: Tuesday, June 7, 2022 6:28 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: MVCRL Why isn't there a Move Relative Long instruction, i.e. move with no registers, where both the source and destination are relative to the instruction address? Is this because there's no instruction format with two RI fields and a length?
storage-key-removal facility
KVM is probably the main reason for the storage-key-removal facility. Allows hardware price to be much cheaper as it cannot run the traditional mainframe workloads (z/OS, etc).
