The decimal position in a COBOL field affects more than just the display*. It
also affects rounding, truncation, scaling and alignment.
For example:
Field-1 pic 99v999 value 10.100
Field-2 pic 9v value 1.2345
Field-3 pic 999v99
Compute field-3 = field-1 + field-2 results in 11.33.
And regrettable that ORDER won't work for sections in different classes, even
if those classes will end up in the same segment.
I opened an RFE on this but it was declined.
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Paul Gilmartin
Sent: Monday, December 4,
-
From: IBM Mainframe Assembler List On Behalf
Of Paul Gilmartin
Sent: Monday, November 13, 2023 12:50 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Is True Skip-Sequential Processing Possible with RECFM=FB,DSORG=PS?
On 11/13/23 08:23:44, Schmitt, Michael wrote:
>>> As long no one
>> As long no one ever uses DISP=MOD
...or checkpoints. Checkpoints can cause short blocks to be written.
(My knowledge is with IMS/DB GSAM checkpoints.)
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Jon Perryman
Sent: Sunday, November 12, 2023 5:18 PM
To:
At my company, the standard going back at least 37 years has been to compile or
assemble, then the job immediately NCAL links the object deck into an "object
module" (not to be confused with PDSE "program object"). The object deck is
discarded, the object module is saved.
I'm not sure *why* we
I Am Not A GPL Expert but...
My understanding is...
* A company can create closed source products using the GCC toolchain
* A company can make changes to the GCC toolchain, and then use it to create
closed source products (but maybe this is different in GPL3)
But
* If you sold a compiler
I asked ChatGPT:
Write a z/Architecture assembler program to solve Advent of Code 2021 day 17
part 2.
I was expecting a result like linked in this post:
https://www.reddit.com/r/adventofcode/comments/ri9kdq/comment/hqcqzqe/?utm_source=share_medium=web2x=3
(click on z/Architecture
I would use the first method, because it is more understandable for users* that
don't have deep knowledge of both HLASM syntax and what the base field name is
in the DSECTs.
* like myself
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Phil Smith III
Sent:
Is there a language formatting file for Notepad++ for HLASM?
What I found in Google is that there is one but it had no link to download it.
With any larger terminal size our session manager uses logmode D4C32XX3 (vs.
SNX32705 for mod 5). I can override that, but that's the logmode that works for
non-standard terminals.
In single-session 62x160 works. In multi-session selecting TSO just kicks me
back to the menu.
(I think the font
opinion -- only 27x132.
I hated the few times I tried to use x3270/wx3270 - totally unintuitive.
Peter
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Schmitt, Michael
Sent: Friday, November 18, 2022 12:04 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: ASMA500 message
I can say that I don't use GOFF because it requires LIST(133), which would be
OK except that we run the assembler listings through a program that adds
cross-reference statement numbers to the right side of the listing, which
increases the listing line size. LIST(121) listings are expanded to
I've never used OPSYN. Can this technique be used with the execute form of the
CALL macro, so that the linkage items can be further away from the base
registers?
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of João Reginato
Sent: Thursday, July 14, 2022 8:53 AM
Specifying 9(4) or S9(4) can have a maximum value of 9,999 (i.e. 4 decimal
digits), depending on the chosen TRUNC compiler option.
TRUNC(BIN) means to truncate at the halfword or fullword. But we use
TRUNC(OPT), which means "do whatever is the most efficient", which can truncate
at .
So
My company's COBOL coding standards are* to define binary fields as signed
(e.g. PIC S9(4) BINARY). I'm wondering why that's the standard.
The original standards were developed at least 40-60 years ago. They were
revised in 1994 but the signed binary guidance remained.
One explanation could be
the lengths of the source and destinations be specified?
- Original Message -
From: "Schmitt, Michael"
To:
Sent: Wednesday, June 08, 2022 8:28 AM
Subject: MVCRL
Why isn't there a Move Relative Long instruction, i.e. move with no registers,
where both the source
and destination ar
t.
Robert Ngan
DXC Luxoft
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Schmitt, Michael
Sent: Tuesday, June 7, 2022 17:29
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: MVCRL
Why isn't there a Move Relative Long instruction, i.e. move with no registers,
where both
Why isn't there a Move Relative Long instruction, i.e. move with no registers,
where both the source and destination are relative to the instruction address?
Is this because there's no instruction format with two RI fields and a length?
Ooh, that is slick.
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Ed Jaffe
Sent: Thursday, May 26, 2022 4:36 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Generating a TR field
On 5/26/2022 2:23 PM, Schmitt, Michael wrote:
> I want to replace
I want to replace all '*' with a space in a field. That's a TR instruction,
right? But when I search through our 40 years of assembler code, I see no uses
of TR for such a purpose.
I thinking this is because of difficulty in building the TR table. We'd need to
have 256 bytes where every byte's
Today I learned that there isn't a fixed point DOUBLEWORD constant either.
I never noticed that DC D isn't fixed point, it is floating point.
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Schmitt, Michael
Sent: Monday, April 18, 2022 10:03 AM
To: ASSEMBLER-LIST
There's a LFI mnemonic? Where is this documented?
The HLASM Language Reference just says that extended mnemonics for non-branch
instructions are documented in PoP. But I'm not finding it in PoP either.
And if it was in PoP, where would it be documented? In the IILF topic?
The problem I have is
How did you do it in COBOL?
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Dave Clark
Sent: Tuesday, February 1, 2022 11:39 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Unsigned 64-bit numbers
I previously asked about 32-bit unsigned numbers and that
HLASM has fixed decimal constants for Halfwords, Fullwords, Doublewords, with
appropriate alignment. Why is there none for Quadwords?
The closest I see is LQ, but that appears to be intended for floating point.
Fill Immediate:
FILLI field,x'FF' set field to high-values
Where machine sets field to the immediate value: space, zeros, whatever
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Tom Harper
Sent: Thursday, April 14, 2022 12:06 PM
To:
I'm thinking this might work...
Instruction
Instruction
do_b0100 equ * the sub call is replaced by a label
org *+b0100_sub_len and an org that leaves a hole the size of
the inlined code
Instruction
:
:
org do_b0100
I like to code in assembler as well-structured, even though that's not the
maximum possible efficiency. For example, I'll break up the program into
subroutines even when the subroutine is only executed from one place.
In COBOL this actually is optimal, since the optimizer will inline the
and POINT on UNIX files?
> -Original Message-
> From: IBM Mainframe Assembler List l...@listserv.uga.edu> On Behalf Of Schmitt, Michael
> Sent: 31 March 2022 17:58
> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
> Subject: Re: Does HLASM use NOTE and POINT on UNIX files?
>
Good point. Maybe it was a System/36?
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Dave Clark
Sent: Thursday, March 31, 2022 11:53 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Does HLASM use NOTE and POINT on UNIX files?
"IBM Mainframe Assembler List"
, 2022, at 09:54:38, Schmitt, Michael wrote:
> How did the assembler originally work, back when punched cards were used?
I don't really know.
>
How did "EXEC PGM=..." originally work, back when punched cards were used?
I suspect SYSIN, but neither SYSLIB nor STEPLIB.
--
gil
and POINT on UNIX files?
What language translator supports COPY members on cards (or in any other
sequential medium, for that matter)?
Charles
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Schmitt, Michael
Sent: Thursday
A stack of file pointers doesn't work when you're reading the copy files from
punched cards.
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Paul Gilmartin
Sent: Thursday, March 31, 2022 9:54 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Does HLASM use NOTE
Am I correct in assuming that branch relative (HLASM "jump") instructions are
more efficient than branches using register+displacement?
C. Kevin Shum's IBM Z System Processor Optimization Primer says:
Use relative branches instead of non-relative (indirect branches) when possible
but
R2,0(,R4) #
BRC 13,L0005
TM 236(,R13),X'3F' #
BRC 7,L0005
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Schmitt, Michael
Sent: Monday, February 14, 2022 11:12 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Rules for Zoned
ri, 11 Feb 2022 18:40:42 +0000 "Schmitt, Michael"
wrote:
:>What do you want to do if it is /not/ FACEBD?
:>Also, while the machine instructions consider F to be positive, IBM COBOL
since VS COBOL II really wants 3 signs: F, C, D, where F is UNSIGNED. So it
does make a difference
What do you want to do if it is /not/ FACEBD?
Also, while the machine instructions consider F to be positive, IBM COBOL since
VS COBOL II really wants 3 signs: F, C, D, where F is UNSIGNED. So it does make
a difference when a packed or zoned field is being returned from an assembler
program;
Then there's the point that they really are Save and (then) Branch, not Branch
and (then) Save...
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of David Cole
Sent: Thursday, February 10, 2022 10:04 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Branch-and-Link
We have the REXX Catalog Search Interface (CSI), via IGGCSI00. But we can't do
VSAM I/O from REXX, using standard out-of-the-box TSO. There's probably
something in SHARE. Or vendor products.
As far as I know.
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Dave
> The external assembler REXX function I am working on is so that I
don't have to depend upon the built-in REXX VSAMIO function.
Why does VSE get VSAMIO but MVS doesn't?
I could understand if REXX in VM was more advanced, but VSE??
-Original Message-
From: IBM Mainframe Assembler List
I will recklessly attempt to demonstrate the knowledge acquired from this
thread by confidently stating...
No, the only thing you know is that if word1 is FxSA something then that save
area is at least 144 bytes.
For example:
I'm program B. I somehow know that Program A gave me a 216 byte
I know we've beaten this to death, but let me try and explain why this is so
hard to get.
The manual says that to save high halves when provided a 72-byte save area, you
can use format 5 (F5SA), and it defines what that save area looks like.
But does it look like that? Maybe, maybe not.
wH7VN?u=http%3A%2F%2Fmason.gmu.edu%2F~smetz3
________
From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf
of Schmitt, Michael [michael.schm...@dxc.com]
Sent: Thursday, January 20, 2022 10:56 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Sa
I just want to point out that it isn't a good idea for an AMODE 31 program to
*assume* that since the program was originally designed to be called as a high
level program, it is going to get 144 bytes and can use it to save the 64-bit
registers.
As an application programmer, I expect that any
2022 2:37 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Saving Caller's 64-bit Regsiters
On 2022-01-28 15:08 PM, Schmitt, Michael wrote:
> Also the linkage stack is not supported by Language Environment, so you
> should not be using it in any code that can be called in an LE run-unit.
I
Also the linkage stack is not supported by Language Environment, so you should
not be using it in any code that can be called in an LE run-unit.
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Farley, Peter x23353
Sent: Friday, January 21, 2022 5:39 PM
To:
The problem is that the new save area formats are not compatible with the
72-byte save area format, so you can't use them in amode 31 unless you control
both the calling and called programs. And they're not supported by Language
Environment.
-Original Message-
From: IBM Mainframe
Sorry, when you said subroutine I thought you were creating a macro.
I think that you're required to preserve the high halves of GPR 2-14, i.e. you
can't mess with them without restoring. But you can change R0, R1, and R15
without restoring. This is from the Assembler Services Guide.
Is register 2 considered volatile for the 64 bit high half?
If not, then how do you know if the macro user will preserve and restore the
register?
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Dave Clark
Sent: Wednesday, January 19, 2022 3:48 PM
To:
If it is an IBM RFE, how about enhancing Window Services so that a temporary
object could be accessed cross-address space? Then you get all of the other
goodness of Window Services.
(I say that never having actually used Windows Services, but I assume it has
goodness since there’s a lot of
. I've tried fixing some of the bugs but get bogged down in trying
> to figure out what CSS to generate.
What about converting to XML and pushing the formatting issue into the style
sheet?
Best wishes,
Ian ...
On Monday, November 15, 2021, 11:53:41 AM GMT-5, Schmitt, Michael
wrote:
I miss BookMaster too, because all of my system documentation is written in it,
and we can't format documentation updates anymore. (The problem is that the
sysplex licensing for SCRIPT/VS is prohibitively expensive. No SCRIPT means no
BookMaster.)
I also have a system that creates both printed
[snipped due to line limit]
I think what we’re seeing is the evolution of compilers on z/OS.
Take the COBOL compiler: it used to be that the optimizer was a distinctly
optional extra step. That is, NOOPT would generate a reasonable set of
instructions, that would be approximately what a person
How do you ensure that your storage areas are far enough away from the code to
not be in the instruction cache line, when your data isn't in GETMAIN storage?
You can mitigate by putting constants in between, but how do you know if that's
enough?
I was taught long ago to add 1 to a register using LA r#,1(,r#) and to subtract
1 using BCTR r#,0.
Is the fastest way now to use AHI r#,1 and AHI r#,-1?
And the linkage stack is not supported by Language Environment.
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Farley, Peter x23353
Sent: Wednesday, October 7, 2020 1:12 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Register saving formats
True, but my
Let's say you want to create an amode 31 assembler program that uses 64-bit
instructions that modify the high words of registers. Per the Assembler
Services Guide, such a program must preserve the high halves of GPR 2-14. But
where do you preserve them?
There are save area formats that can
JCL can pass a null argument because the parm format is a length followed by
the parm string. It is passing a zero-length parm.
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Paul Gilmartin
Sent: Friday, September 4, 2020 10:33 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
So the website is http://www.mathrutech.com/index.html.
The pricing seems suspicious to me. Are you sure this is a real mainframe and
not an older version of IBM Z Development and Test Environment (or a newer
version of Rational Developer for System Z Unit Test), where you’re actually
running
Assembler List On Behalf
Of Schmitt, Michael
Sent: Monday, August 10, 2020 2:56 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Clearing a register
*** External email: Verify sender before opening attachments or links ***
Yes, only clear low 32-bits of 64-bit registers.
I've seen method #3
suppose if you want compatibility with machines of 30/40 years ago you might
tend towards XR and SR.
My 2 cents worth,
Mike
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Schmitt, Michael
Sent: Monday, August 10, 2020 3:13
There are many ways to set a register to binary zero. My question is, which is
the most efficient?
1. XR Rn,Rn
2. SR Rn,RN
3. SRA Rn,Rn
4. LHI Rn,0
5. Other instruction
6. Depends on hardware
7. Depends on other factors. (What?)
8. They are have equal performance
9.
It works for me with HLASM R6.0, and is as Charles Mills said: it changes the
location counter value reported in the listing.
I wouldn’t think it would change the relative address in the object? Because
then your entry point would be greater than the CSECT size.
Without the expression:
Loc
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Seymour J Metz
Sent: Tuesday, June 02, 2020 12:25 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: z/OS HLASM: EQU for statement labels
Ah, I thought that you were using the macros from the HLASM Toolkit. BTW, I do
On 2020-06-02, at 10:32:23, Seymour J Metz wrote:
>
> if x
>if y
> do a
> foo endif
> bar else
> do b
> endif
>
>> Then later if you want to insert more instructions immediately before the
>> ELSE, it is very clear where to put them
Thank you for your replies.
I too was originally taught to use DS 0H for a label statement, because it
guaranteed halfword instruction alignment. But I recently started using EQU *
because a) it seemed to be clearer as to the intent, and b) I figured that if
your instructions weren't aligned
In John R. Ehrman's SHARE presentations on tips for modernizing IBM
z/Architecture assembler programs (such as
https://share.confex.com/share/120/webprogram/Handout/Session12522/modrnasm.pdf),
he says that important advice from experienced assembler programmers is to:
_Don't_ use EQU for
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