Re: How to configure and enable the barebox state?

2016-10-14 Thread Sascha Hauer
Hi Alain, On Thu, Oct 13, 2016 at 01:38:36PM +, Trostel Alain wrote: > Hi, > > I would like to configure and enable the barebox state. My assumption is > that I need to change the following device tree for my Phytec AM335x > SOM: > > arch/arm/dts/am335x-phytec-phycore-som.dts > > But from

Re: Compressed DTB - builtin DTB

2016-10-14 Thread Sascha Hauer
Hi Daniel, On Thu, Oct 13, 2016 at 12:32:31PM +0200, Daniel Krüger wrote: > Hello, > > I'm currently porting our board support to device tree. Currently, I don't > use multi-PBL, but include the device tree via CONFIG_BUILTIN_DTB. This > works, but the DTB seems to be included twice in the

[PATCH v2 3/3] ARM: socfpga: dtsi: add dw-wdt reset lines

2016-10-14 Thread Steffen Trumtrar
Signed-off-by: Steffen Trumtrar --- arch/arm/dts/socfpga.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index d16758fdab46..66d7f21dc6a3 100644 --- a/arch/arm/dts/socfpga.dtsi +++

[PATCH v2 2/3] watchdog: add designware driver

2016-10-14 Thread Steffen Trumtrar
Port the linux v4.8-rc1 Synopsys DesignWare watchdog driver to barebox. Signed-off-by: Steffen Trumtrar --- Changes since v1: - change usages of pr_warn in favor of dev_warn drivers/watchdog/Kconfig | 6 ++ drivers/watchdog/Makefile | 1 +

[PATCH v2 1/3] reset: import socfpga-reset driver from linux

2016-10-14 Thread Steffen Trumtrar
Port the linux v4.8-rc1 reset-socfpga driver to barebox. Signed-off-by: Steffen Trumtrar --- Changes since v1: - use dev_request_mem_resource drivers/reset/Makefile| 1 + drivers/reset/reset-socfpga.c | 124 ++ 2