According to NXP AT14149 the TX_CLK direction must be set to output
when the ENET is used in RMII mode.
Signed-off-by: Steffen Trumtrar
---
drivers/net/designware_imx.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/net/designware_imx.c b/drivers/net/designware_imx.c
The i.MX93 needs to set the RMII speed to successfully reset. Add a
callback that does this inspired by the linux patch:
net: stmmac: dwmac-imx: use platform specific reset for imx93 SoCs
Signed-off-by: Steffen Trumtrar
---
drivers/net/designware_eqos.c | 3 +++
drivers/net
an issue with the reset logic on the i.MX93 SoC, which
requires configuration of the correct interface speed under RMII mode to
complete the reset. The patch implements a fix_soc_reset function and uses
it specifically for the i.MX93 SoCs.
Signed-off-by: Steffen Trumtrar
---
Steffen
Instead of guarding this at compile time, always call register_sdclk
with the correct clk_ops, like in linux.
Currently only ZynqMP and default arasan ops are supported.
Signed-off-by: Steffen Trumtrar
---
Instead of guarding the zynqmp functions at compile time and introducing
possible run
Registering sdclk only makes sense on the ZynqMP architecture. Guard
calling the function with a IS_ENABLED()
Signed-off-by: Steffen Trumtrar
---
drivers/mci/arasan-sdhci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan
]: *** [Makefile:900: .tmp_barebox1] Error 1
Signed-off-by: Steffen Trumtrar
---
Steffen Trumtrar (2):
mci: mci-core: fix mci_switch_status call
mci: arasan: fix build for non-ZynqMP
drivers/mci/arasan-sdhci.c | 3 ++-
drivers/mci/mci-core.c | 4 +---
2 files changed, 3 insertions(+), 4
mci_switch_status needs to be called with a boolean instead of a u32.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/mci-core.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index 414bcf6f06..78c65c8614 100644
Fatoum
Signed-off-by: Steffen Trumtrar
---
drivers/mci/am654-sdhci.c| 2 +-
drivers/mci/arasan-sdhci.c | 2 +-
drivers/mci/atmel-sdhci-common.c | 4 ++--
drivers/mci/dove-sdhci.c | 2 +-
drivers/mci/mci-bcm2835.c| 2 +-
drivers/mci/rockchip
The last patch accidentally drops the mask in sdhci_wait_for_done.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/arasan-sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c
index 973e08779d..98f990b5c1 100644
Depending on the used SDHCI mode the clock phases are different.
Import the helper function to get these values from the DT from linux v6.7.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 121 +
1 file
The ZynpMP 8.9a has an Arasan IP core that supports HS200 tuning.
Register the callback with the mci-core.
Arasan uses the SDHCI tuning method.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 62 +++---
1 file
Use the newly introduced define for High Speed timing mode instead of
just '1'.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/mci-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index
HS200 is a timing mode for eMMCs to work 8bit with 200MHz clocks.
To be used, drivers need to set the correct drive strength, clock phases
and then SDHCI can start tuning for HS200.
Signed-off-by: Steffen Trumtrar
Acked-by: Ahmad Fatoum
---
drivers/mci/Kconfig| 7 ++
drivers/mci/mci
Read and register the sampleclk and sdcardclk. They are needed later for
HS200 tuning support.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 316 +
1 file changed, 316 insertions(+)
diff --git a/drivers
The arasan SDHCI driver doesn't use MMC tuning but SDHCI tuning. Both
are not supported yet in barebox.
Add SDHCI tuning support from linux v6.7.
Signed-off-by: Steffen Trumtrar
Signed-off-by: Ahmad Fatoum
---
drivers/mci/sdhci.c | 275
Import missing EXT_CSD_CARD_TYPE_ defines from linux v6.7.
EXT_CSD_CARD_TYPE_SDR_1_8V/1_2V is unused in barebox. Replace with the
defines from linux.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
include/mci.h | 15 +--
1 file changed, 13 insertions(+), 2 deletions
Port the linux v6.7 mmc host caps2 parsing.
While at it, remove the ->no_sd and ->no_sdio. These are bits in the
caps2 field.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/mci-core.c | 36 ++--
include/mci.h
Linux mmc_host saves the actual_clock set on the HC. Do the same to use
it later.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/mci-core.c | 2 ++
include/mci.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci
Signed-off-by: Steffen Trumtrar
---
Changes in v4:
- add a fix for arasan dma support patch
- Link to v3:
https://lore.barebox.org/20240315-v2024-02-0-topic-arasan-hs200-support-v3-0-df268c2f4...@pengutronix.de
Changes in v3:
- rebased onto v2024.03.0
- cherry-picked and rebased onto b80c0e1ec64c
The Arasan on the zynqmp in version 8.9a doesn't meet the timing
requirements at 25MHz. It works at 19MHz instead.
Add the quirk from linux kernel v6.8-rc4.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 28 +++-
1 file
Add a function to reset DLL logic for SD devices.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c
b/arch/arm/mach-zynqmp/firmware
Add a function to set the tap delay for the clk phase of the sd host
controller.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 42 ++
include/mach/zynqmp/firmware-zynqmp.h | 23 +++
2
The timings are used to check if mci_host->timing is equal to one of
this values. Linux uses a different numbering. Adapt that for compatability.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
include/mci.h | 18 ++
1 file changed, 10 insertions(+), 8 deleti
The arasan SDHCI driver doesn't use MMC tuning but SDHCI tuning. Both
are not supported yet in barebox.
Add SDHCI tuning support from linux v6.7.
Signed-off-by: Steffen Trumtrar
Signed-off-by: Ahmad Fatoum
---
drivers/mci/sdhci.c | 275
Use the newly introduced define for High Speed timing mode instead of
just '1'.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/mci-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index
Fatoum
Signed-off-by: Steffen Trumtrar
---
drivers/mci/am654-sdhci.c| 2 +-
drivers/mci/arasan-sdhci.c | 2 +-
drivers/mci/atmel-sdhci-common.c | 4 ++--
drivers/mci/dove-sdhci.c | 2 +-
drivers/mci/mci-bcm2835.c| 2 +-
drivers/mci/rockchip
Depending on the used SDHCI mode the clock phases are different.
Import the helper function to get these values from the DT from linux v6.7.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 121 +
1 file
HS200 is a timing mode for eMMCs to work 8bit with 200MHz clocks.
To be used, drivers need to set the correct drive strength, clock phases
and then SDHCI can start tuning for HS200.
Signed-off-by: Steffen Trumtrar
Acked-by: Ahmad Fatoum
---
drivers/mci/Kconfig| 7 ++
drivers/mci/mci
The timings are used to check if mci_host->timing is equal to one of
this values. Linux uses a different numbering. Adapt that for compatability.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
include/mci.h | 18 ++
1 file changed, 10 insertions(+), 8 deleti
Signed-off-by: Steffen Trumtrar
---
Changes in v3:
- rebased onto v2024.03.0
- cherry-picked and rebased onto b80c0e1ec64c "mci: arasan: add dma support"
- Link to v2:
https://lore.barebox.org/20240314-v2024-02-0-topic-arasan-hs200-support-v2-0-0386c27fe...@pengutronix.de
Changes in v
Read and register the sampleclk and sdcardclk. They are needed later for
HS200 tuning support.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 316 +
1 file changed, 316 insertions(+)
diff --git a/drivers
Port the linux v6.7 mmc host caps2 parsing.
While at it, remove the ->no_sd and ->no_sdio. These are bits in the
caps2 field.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/mci-core.c | 36 ++--
include/mci.h
The Arasan on the zynqmp in version 8.9a doesn't meet the timing
requirements at 25MHz. It works at 19MHz instead.
Add the quirk from linux kernel v6.8-rc4.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 28 +++-
1 file
The ZynpMP 8.9a has an Arasan IP core that supports HS200 tuning.
Register the callback with the mci-core.
Arasan uses the SDHCI tuning method.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 62 +++---
1 file
Add a function to set the tap delay for the clk phase of the sd host
controller.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 42 ++
include/mach/zynqmp/firmware-zynqmp.h | 23 +++
2
Add a function to reset DLL logic for SD devices.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c
b/arch/arm/mach-zynqmp/firmware
Linux mmc_host saves the actual_clock set on the HC. Do the same to use
it later.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/mci-core.c | 2 ++
include/mci.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci
Import missing EXT_CSD_CARD_TYPE_ defines from linux v6.7.
EXT_CSD_CARD_TYPE_SDR_1_8V/1_2V is unused in barebox. Replace with the
defines from linux.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
include/mci.h | 15 +--
1 file changed, 13 insertions(+), 2 deletions
to resolve this just by looking at it. Please rebase
your series on that patch.
meh, will do.
Thanks,
Steffen
--
Pengutronix e.K.| Dipl.-Inform. Steffen Trumtrar |
Steuerwalder Str. 21| https://www.pengutronix.de/|
31137 Hildesheim, Germany | Phone: +49-5121-206917-0
The arasan SDHCI driver doesn't use MMC tuning but SDHCI tuning. Both
are not supported yet in barebox.
Add SDHCI tuning support from linux v6.7.
Signed-off-by: Steffen Trumtrar
Signed-off-by: Ahmad Fatoum
---
drivers/mci/sdhci.c | 275
The ZynpMP 8.9a has an Arasan IP core that supports HS200 tuning.
Register the callback with the mci-core.
Arasan uses the SDHCI tuning method.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 62 +++---
1 file
Use the newly introduced define for High Speed timing mode instead of
just '1'.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/mci-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index e825c91c80..ebfd3e9fb8 100644
Fatoum
Signed-off-by: Steffen Trumtrar
---
drivers/mci/am654-sdhci.c| 2 +-
drivers/mci/arasan-sdhci.c | 2 +-
drivers/mci/atmel-sdhci-common.c | 4 ++--
drivers/mci/dove-sdhci.c | 2 +-
drivers/mci/mci-bcm2835.c| 2 +-
drivers/mci/rockchip
Add a function to set the tap delay for the clk phase of the sd host
controller.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 42 ++
include/mach/zynqmp/firmware-zynqmp.h | 23 +++
2
Port the linux v6.7 mmc host caps2 parsing.
While at it, remove the ->no_sd and ->no_sdio. These are bits in the
caps2 field.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/mci-core.c | 36 ++--
include/mci.h | 32 +
The timings are used to check if mci_host->timing is equal to one of
this values. Linux uses a different numbering. Adapt that for compatability.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
include/mci.h | 18 ++
1 file changed, 10 insertions(+), 8 deleti
Add a function to reset DLL logic for SD devices.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c
b/arch/arm/mach-zynqmp/firmware
HS200 is a timing mode for eMMCs to work 8bit with 200MHz clocks.
To be used, drivers need to set the correct drive strength, clock phases
and then SDHCI can start tuning for HS200.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/Kconfig| 7 ++
drivers/mci/mci-core.c | 257
Read and register the sampleclk and sdcardclk. They are needed later for
HS200 tuning support.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/arasan-sdhci.c | 316 +
1 file changed, 316 insertions(+)
diff --git a/drivers/mci/arasan-sdhci.c b/drivers
Depending on the used SDHCI mode the clock phases are different.
Import the helper function to get these values from the DT from linux v6.7.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 121 +
1 file
Signed-off-by: Steffen Trumtrar
---
Changes in v2:
- added Reviewed-bys
- small style fixes
- return host->actual_clock in arasan_zynqmp_sampleclk_recalc_rate
- return host->actual_clock in arasan_zynqmp_sdcardeclk_recalc_rate
- move DT property parsing into IS_ENABLED
- port mci_switch_statu
The Arasan on the zynqmp in version 8.9a doesn't meet the timing
requirements at 25MHz. It works at 19MHz instead.
Add the quirk from linux kernel v6.8-rc4.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
drivers/mci/arasan-sdhci.c | 28 +++-
1 file
Import missing EXT_CSD_CARD_TYPE_ defines from linux v6.7.
EXT_CSD_CARD_TYPE_SDR_1_8V/1_2V is unused in barebox. Replace with the
defines from linux.
Signed-off-by: Steffen Trumtrar
Reviewed-by: Ahmad Fatoum
---
include/mci.h | 15 +--
1 file changed, 13 insertions(+), 2 deletions
Linux mmc_host saves the actual_clock set on the HC. Do the same to use
it later.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/mci-core.c | 2 ++
include/mci.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index 2b39985d5e
The arasan SDHCI driver doesn't use MMC tuning but SDHCI tuning. Both
are not supported yet in barebox.
Add SDHCI tuning support from linux v6.7.
Signed-off-by: Steffen Trumtrar
Signed-off-by: Ahmad Fatoum
---
drivers/mci/sdhci.c | 244
HS200 is a timing mode for eMMCs to work 8bit with 200MHz clocks.
To be used, drivers need to set the correct drive strength, clock phases
and then SDHCI can start tuning for HS200.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/Kconfig| 7 ++
drivers/mci/mci-core.c | 256
To support HS200 mode, the arasan needs a differernt sdhci_wait_idle
function. Remove the default CMD_INHIBIT_DATA, otherwise the sdhci hs200
tuning will timeout.
Signed-off-by: Ahmad Fatoum
Signed-off-by: Steffen Trumtrar
---
drivers/mci/arasan-sdhci.c | 2 +-
drivers/mci/sdhci.c| 25
The ZynpMP 8.9a has an Arasan IP core that supports HS200 tuning.
Register the callback with the mci-core.
Arasan uses the SDHCI tuning method.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/arasan-sdhci.c | 62 +++---
1 file changed, 59 insertions
This series adds support for HS200 mode to mci-core and sdhci.
As the host driver also needs to handle clock setup, pin control and
host specific tuning, this series only adds HS200 support to the Arasan
SDHCI driver.
Tested on: ZynqMP.
Signed-off-by: Steffen Trumtrar
---
Steffen Trumtrar (12
Add a function to reset DLL logic for SD devices.
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c
b/arch/arm/mach-zynqmp/firmware-zynqmp.c
index a2b61efff4
Port the linux v6.7 mmc host caps2 parsing.
While at it, remove the ->no_sd and ->no_sdio. These are bits in the
caps2 field.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/mci-core.c | 34 --
include/mci.h | 32 ++--
2
Add a function to set the tap delay for the clk phase of the sd host
controller.
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 42 ++
include/mach/zynqmp/firmware-zynqmp.h | 23 +++
2 files changed, 65 insertions
Read and register the sampleclk and sdcardclk. They are needed later for
HS200 tuning support.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/arasan-sdhci.c | 305 +
1 file changed, 305 insertions(+)
diff --git a/drivers/mci/arasan-sdhci.c b/drivers
The timings are used to check if mci_host->timing is equal to one of
this values. Linux uses a different numbering. Adapt that for compatability.
Signed-off-by: Steffen Trumtrar
---
include/mci.h | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/incl
The Arasan on the zynqmp in version 8.9a doesn't meet the timing
requirements at 25MHz. It works at 19MHz instead.
Add the quirk from linux kernel v6.8-rc4.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/arasan-sdhci.c | 28 +++-
1 file changed, 27 insertions(+), 1
Import missing EXT_CSD_CARD_TYPE_ defines from linux v6.7.
EXT_CSD_CARD_TYPE_SDR_1_8V/1_2V is unused in barebox. Replace with the
defines from linux.
Signed-off-by: Steffen Trumtrar
---
include/mci.h | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/include
Depending on the used SDHCI mode the clock phases are different.
Import the helper function to get these values from the DT from linux v6.7.
Signed-off-by: Steffen Trumtrar
---
drivers/mci/arasan-sdhci.c | 121 +
1 file changed, 121 insertions
Switch from PIO to DMA mode in send_cmd.
Signed-off-by: Steffen Trumtrar
---
Everything needed for the Arasan SDHCI to use DMA instead of PIO is
already present. Switch to it.
Tested on: ZynqMP.
---
drivers/mci/arasan-sdhci.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions
rx_buffer gets dma_alloc'ed but is never dma_map'ed and therefor not
flushed before it is initially used.
Map the rx_buffer when the macb is initialized and unmap it on ether_halt.
While at it, cleanup the dma_alloc_coherent rx_ring/tx_ring, too.
Signed-off-by: Steffen Trumtrar
---
drivers
Instead of directly reading from memory addresses and inserting
sw barriers to be sure that the compiler will not move loads/stores
behind this point, just use proper volatile writel/readl accesses.
Signed-off-by: Steffen Trumtrar
---
drivers/net/macb.c | 53
PKTSIZE is used to allocate network packet storage.
Make it fill a cache line so drivers using it don't accidentally flush
adjacent packets.
Suggested-by: Ahmad Fatoum
Signed-off-by: Steffen Trumtrar
---
include/net.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
The rx_buffer is only dma_alloc'ed but never properly flushed.
Fix that.
While at it, also use proper volatile access instead of sw barriers.
Also, redefine PKTSIZE to a sensible multiple of 64 bytes.
Signed-off-by: Steffen Trumtrar
---
Changes in v4:
- align PKTSIZE with cacheline size
Instead of directly reading from memory addresses and inserting
sw barriers to be sure that the compiler will not move loads/stores
behind this point, just use proper volatile writel/readl accesses.
Signed-off-by: Steffen Trumtrar
---
drivers/net/macb.c | 53
rx_buffer gets dma_alloc'ed but is never dma_map'ed and therefor not
flushed before it is initially used.
Map the rx_buffer when the macb is initialized and unmap it on ether_halt.
While at it, cleanup the dma_alloc_coherent rx_ring/tx_ring, too.
Signed-off-by: Steffen Trumtrar
---
drivers
The rx_buffer is only dma_alloc'ed but never properly flushed.
Fix that.
While at it, also use proper volatile access instead of sw barriers.
Signed-off-by: Steffen Trumtrar
---
Changes in v3:
- fix dma_unmap_single direction
- dma_map_single packet in macb_send()
- Link to v2:
https
The rx_buffer is only dma_alloc'ed but never properly flushed.
Fix that.
While at it, also use proper volatile access instead of sw barriers.
Signed-off-by: Steffen Trumtrar
---
Changes in v2:
- change dma_map_single to DMA_FROM_DEVICE
- drop (unsigned long) casts in dma_sync_*
- rework writel
rx_buffer gets dma_alloc'ed but is never dma_map'ed and therefor not
flushed before it is initially used.
Map the rx_buffer when the macb is initialized and unmap it on ether_halt.
While at it, cleanup the dma_alloc_coherent rx_ring/tx_ring, too.
Signed-off-by: Steffen Trumtrar
---
drivers
Instead of directly reading from memory addresses and inserting
sw barriers to be sure that the compiler will not move loads/stores
behind this point, just use proper volatile writel/readl accesses.
Signed-off-by: Steffen Trumtrar
---
drivers/net/macb.c | 52
On 2023-11-28 at 17:56 +01, Lucas Stach wrote:
Am Dienstag, dem 28.11.2023 um 17:29 +0100 schrieb Steffen Trumtrar:
rx_buffer gets dma_alloc'ed but is never dma_map'ed and therefor not
flushed before it is initially used.
Map the rx_buffer when the macb is initialized and unmap
rx_buffer gets dma_alloc'ed but is never dma_map'ed and therefor not
flushed before it is initially used.
Map the rx_buffer when the macb is initialized and unmap it on ether_halt.
While at it, cleanup the dma_alloc_coherent rx_ring/tx_ring, too.
Signed-off-by: Steffen Trumtrar
---
drivers
The rx_buffer is only dma_alloc'ed but never properly flushed.
Fix that.
While at it, also use proper volatile access instead of sw barriers.
Signed-off-by: Steffen Trumtrar
---
Steffen Trumtrar (2):
net: macb: fix dma_alloc for rx_buffer
net: macb: convert to volatile accesses
Instead of directly reading from memory addresses and inserting
sw barriers to be sure that the compiler will not move loads/stores
behind this point, just use proper volatile writel/readl accesses.
Signed-off-by: Steffen Trumtrar
---
drivers/net/macb.c | 53
Knittel
Signed-off-by: Steffen Trumtrar
---
Changes since v1:
- split loop into inline function
---
arch/arm/mach-socfpga/arria10-xload.c | 49 ++-
1 file changed, 37 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-socfpga/arria10-xload.c
b/arch/arm
| Dipl.-Inform. Steffen Trumtrar |
Steuerwalder Str. 21| https://www.pengutronix.de/|
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686| Fax: +49-5121-206917-|
Knittel
Signed-off-by: Steffen Trumtrar
---
arch/arm/mach-socfpga/arria10-xload.c | 47 +--
1 file changed, 30 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-socfpga/arria10-xload.c
b/arch/arm/mach-socfpga/arria10-xload.c
index 9d54a1de58..0e49452c17 100644
ero page handling afterwards, because kernel is
> booted after paging is disabled.
>
> Cc: Michael Tretter
> Reported-by: Steffen Trumtrar
> Signed-off-by: Ahmad Fatoum
> ---
> common/bootm.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>
s_clk_rate otherwise stay at the
default 33.3MHz
Signed-off-by: Assmann Kai (BEG/MSD-NE2)
Signed-off-by: Steffen Trumtrar
---
Notes:
changes since v1:
- reword commit message
- add binding rst
- change type of ps_clk_frequency
.../devicetree/bindings/clocks/xlnx,ps7
t correct in the first place (although it most likely still
worked depending on PMUFW and its configuration), we won't break anything
when we just set the flag to zero as the PMUFW v1.1 expects it.
TLDR: set fpga_load flags to zero to fix firmwareloading with newer
PMUFW versions.
Signed-off-by: Steffen
On 2023-05-08 at 13:17 +02, Ahmad Fatoum wrote:
> On 08.05.23 09:24, Steffen Trumtrar wrote:
>> From: Kai Assman
>>
>> Currently the ps_clk_rate is locked to 33.3MHz. The devicetree
>> provides a property "ps-clock-frequency" that specifies this
From: Kai Assman
Currently the ps_clk_rate is locked to 33.3MHz. The devicetree
provides a property "ps-clock-frequency" that specifies this clock.
If the property is found, overwrite ps_clk_rate otherwise stay at the
default 33.3MHz
Signed-off-by: Kai Assmann
Signed-off-by: Steffe
Since commit 3e62b38ff641f263df2f6c9e3ebda3c7c62f310b
we use ENTRY_FUNCTION_WITHSTACK in the bringup barebox.
The patch should have removed the arm_setup_stack line
as it is already done in the ENTRY_FUNCTION_WITHSTACK macro.
Signed-off-by: Steffen Trumtrar
---
arch/arm/boards/reflex-achilles
The Cortex A9 on the Arria10 has multiple known errata.
Enable at least the currently supported ones in barebox.
Signed-off-by: Steffen Trumtrar
---
arch/arm/boards/enclustra-aa1/lowlevel.c | 1 +
arch/arm/mach-socfpga/Makefile| 1 +
arch/arm/mach-socfpga/cpu_init.c | 12
Signed-off-by: Steffen Trumtrar
---
arch/arm/boards/reflex-achilles/lowlevel.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c
b/arch/arm/boards/reflex-achilles/lowlevel.c
index f5efb961a1..511b41fd01 100644
--- a/arch/arm/boards/reflex-achilles
Signed-off-by: Steffen Trumtrar
---
arch/arm/boards/enclustra-aa1/lowlevel.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boards/enclustra-aa1/lowlevel.c
b/arch/arm/boards/enclustra-aa1/lowlevel.c
index d819d9feae..b1a0f4876f 100644
--- a/arch/arm/boards/enclustra-aa1
Signed-off-by: Steffen Trumtrar
---
Notes:
v4:
- use ARRIA10_SYSMGR_ROM_INITSWLASTLD instead of magic value
- lowlevel: encase the define macros in braces
- lowlevel: add a default for pbl selection
- increase size of barebox fixed-partitions
v3:
- use
Instead of using a magic value in the board code, use the define from
arria10-system-manager.
Signed-off-by: Steffen Trumtrar
---
arch/arm/boards/reflex-achilles/board.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boards/reflex-achilles/board.c
b/arch/arm
Use the newer function ENTRY_FUNCTION_WITHSTACK.
Signed-off-by: Steffen Trumtrar
---
arch/arm/boards/reflex-achilles/lowlevel.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c
b/arch/arm/boards/reflex-achilles
To optimize the image size, use compressed devicetrees.
Signed-off-by: Steffen Trumtrar
---
arch/arm/boards/reflex-achilles/lowlevel.c | 6 +++---
arch/arm/mach-socfpga/Kconfig | 1 +
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boards/reflex-achilles
Disable KALLSYMS because of image size.
Signed-off-by: Steffen Trumtrar
---
arch/arm/configs/socfpga-arria10_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/socfpga-arria10_defconfig
b/arch/arm/configs/socfpga-arria10_defconfig
index a37bae6217..5ac2198d41 100644
This is actually unneccessary and is just here because of copy-pasta
from other lowlevel code.
Signed-off-by: Steffen Trumtrar
---
arch/arm/boards/reflex-achilles/lowlevel.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c
b/arch/arm/boards
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