Re: PCI config register 0x40

2009-12-19 Thread Michael Buesch
On Saturday 19 December 2009 07:26:10 Larry Finger wrote: Michael, As you may recall, I dumped writes to the PCI config space for both b43 and the wl driver. I found that wl wrote to address 0x40. In looking around other drivers, I found the following fragment in ipw2100: /* We

Re: PCI config register 0x40

2009-12-19 Thread Larry Finger
On 12/19/2009 04:11 AM, Michael Buesch wrote: Well, if 0x40 is used as RETRY_TIMEOUT in ipw, that doesn't mean it's the same in b43. Is the 0x40 register standardized in any way? According to the Wikipedia article on PCI configuration space registers, only up to 0x3F is standardized. There

Re: PCI config register 0x40

2009-12-19 Thread Larry Finger
On 12/19/2009 04:11 AM, Michael Buesch wrote: And if you do a patch, don't put it into ssb. Put it into b43. One further question about putting the patch into b43. Apparently, register 0x40 is not preserved across a suspend/resume to disk. In all the drivers that use this code, 0x40 is

Re: PCI config register 0x40

2009-12-19 Thread Michael Buesch
On Saturday 19 December 2009 17:11:30 Larry Finger wrote: On 12/19/2009 04:11 AM, Michael Buesch wrote: And if you do a patch, don't put it into ssb. Put it into b43. One further question about putting the patch into b43. Apparently, register 0x40 is not preserved across a suspend/resume

PCI config register 0x40

2009-12-18 Thread Larry Finger
Michael, As you may recall, I dumped writes to the PCI config space for both b43 and the wl driver. I found that wl wrote to address 0x40. In looking around other drivers, I found the following fragment in ipw2100: /* We disable the RETRY_TIMEOUT register (0x41) to keep * PCI Tx