[beagleboard] Re: Peripheral Interrupt on PRU-ICSS

and validated though a kernel ISR on linux side in AM335x This is a question not related to the topic but can you help me here to understand. Thanks. On Wednesday, August 20, 2014 2:11:33 PM UTC+5:30, rakesh.safir wrote: Hi, I have PWM interrupts generated on ARM side and validated though a kernel

[beagleboard] Re: Peripheral Interrupt on PRU-ICSS

Hi, Seems there is a solution on TI Fourum. http://e2e.ti.com/support/arm/sitara_arm/f/791/p/362435/1283854.aspx#1283854 Cheers !! Rakesh On Wednesday, August 20, 2014 2:11:33 PM UTC+5:30, rakesh.safir wrote: Hi, I have PWM interrupts generated on ARM side and validated though a kernel

[beagleboard] Trouble with C++ on PRU-ICSS

Hi, I'm having an issue with PRU-ICSS when i try to code in C++. Classes with default constructors/destructors work as expected but classes with custom constructors/destructors do not work. Anybody facing the same issue ? Would appreciate any pointers to resolve this. Rakesh -- For more

[beagleboard] DCAN0 from PRU ICSS

Hello Experts !! I'm trying to implement a CAN controller on PRU-ICSS on Beaglebone Black. I'm looking for some example that achieves the same. If anyone can point in the right direction it would be awesome. Thanks in advance. Rakesh -- For more options, visit

[beagleboard] Re: Accessing DDR from PRU-ICSS

. -c On Tuesday, August 19, 2014 3:31:17 AM UTC-4, rakesh.safir wrote: Hi Cmicali, Really appreciate your help. I was able to run the example successfully. The linux side code for memory allocation was the same as suggested by you. Same was suggested on the post http

[beagleboard] Peripheral Interrupt on PRU-ICSS

Hi, I have PWM interrupts generated on ARM side and validated though a kernel ISR on linux side in AM335x. I want to route the PWM interrupts to PRU-ICSS. Any information on how can this be achived will be hugely appreciated. Cheers !! Rakesh -- For more options, visit

Re: [beagleboard] Re: PRU FAQ 2013-05-15

section 3.1.2 in the pru reference https://github.com/beagleboard/am335x_pru_package for limitations (accessing memory below main memory 0x0008 requires enabling an offset, section 10.1.10). On Wed, Aug 13, 2014 at 2:02 PM, rakesh.safir rakesh...@gmail.com javascript: wrote: Hi, I

[beagleboard] Re: Accessing DDR from PRU-ICSS

Hi Cmicali, Really appreciate your help. I was able to run the example successfully. The linux side code for memory allocation was the same as suggested by you. Same was suggested on the post http://hipstercircuits.com/beaglebone-pru-ddr-memory-access-the-right-way/ I'm trying to achieve

[beagleboard] Re: PRU FAQ 2013-05-15

Hi, I want to use the DCAN interface on PRU-ICSS to send/receive data present on DDR RAM at a fixed physical address. - Address of DDR is 0x8000_ to 0x9000_(256MiB) - My buffer is present at 0x8FF0_ to 0x9000_ (1MiB) As soon as I access the hardware address

[beagleboard] Accessing DDR from PRU-ICSS

Hi, I want to use the DCAN interface on PRU-ICSS to send/receive data present on DDR RAM at a fixed physical address. - Address of DDR is 0x8000_ to 0x9000_(256MiB) - My buffer is present at 0x8FF0_ to 0x9000_ (1MiB) As soon as I access the hardware address