Re: Bug#177068: make: can't find make return code discussion

Dear [EMAIL PROTECTED], Please note that the only mention of a return status on the man page is under -q. Please make a separate section RETURN STATUS or whatever, like many other man pages. regarding the Info, Manoj == Manoj Srivastava [EMAIL PROTECTED] writes: Manoj File: make.info, Node:

Automatic should be Automatic variables

No bug address on man page. In Info index: * Automatic:: How to use automatic variables in the commands of implicit rules. --should be * Automatic variables:: ... ___ Bug-make mailing list [EMAIL

make's Info's `Automatic' page: call it Automatic Variables

In Info, AutomaticTAB gets Possible completions are: Automatic Automatic Prerequisites However when we arrive at the 'Automatic' page, we are surprised to see it calls itself Automatic Variables. So it should be called Automatic Variables everywhere, I'd say.

a: $@.b

$ cat Makefile a: [EMAIL PROTECTED] a.b: $ make -n make: *** No rule to make target `.b', needed by `a'. Stop. But don't we know that $@ = a already at that point? ___ Bug-make mailing list [EMAIL PROTECTED]

Double-Colon Rules Info page needs an example

The Double-Colon Rules Info page needs an example snippet. I think I figured out a use just from reading the documentation however: bus8.htm:: #always check for a fresher version wget -N http://www.fybus.com.tw/bus8.htm fybus.w3m:bus8.htm w3m -cols 99 -dump $? $@ Or an even more

document -j

Parallel Execution GNU `make' knows how to execute several commands at once. Normally, `make' will execute only one command at a time, waiting for it to finish before executing the next. However, the `-j' or `--jobs' option tells `make' to execute many commands simultaneously.

Re: add order-only-prerequisites example

Paul Sometimes features are advanced enough that providing a simple example Well still, a few-liner showing how a: b|c differs from a: b c wouldn't hurt. Paul under a public license. I meant you guys must be reading an O'Reilly book or hung out in Bell Labs or something. There's no way I could

Re: submake messages not perfect

Paul I guess I still don't understand Dan's comment, though. Well for me, make calling several make's all in the same directory, I see lots of messages about how they are entering and leaving that directory, when in fact they never set foot outside that directory, and what they really were trying

parallelism: job slots vs. levels

Anyways, $ make x make y wait cannot always be rewritten with -j. $ make -j[whatever number] x y will act differently except for special cases of x and y; probably when both x and y have no dependencies. Anyways, with -j examples added to the manual, we would get on the right track about how to

info tree jump

In the info menu, reading the page at LINE A, it seems to lead into the tree at LINE B or something. Maybe move LINE A into the LINE B set or something. Writing the Commands in Rules * Echoing:: How to control when commands are echoed. * Execution:: How

add make -C example for more than one directory

Enhance the example in Info: equivalently, this (*note Summary of Options: Options Summary.): subsystem: $(MAKE) -C subdir by also showing the best way to do this if one has more than one directory he wants to operate on, e.g., ./dir1, ./dir2 (not ./dir1/dir2)

breaking long lines breakthru

I have discovered how to not put spaces in lines sent to the shell like a: echo x\ y which will normally print a b. You just do a: echo x$(\ )y The Makefile also stays tidy. This is such a hot discovery that I demand you put something like it into the manual!

alternatives to using */*/*

Not sure if the Make documentation gives alternatives to using e.g., latest.txt: * */* */*/* */*/*/* */*/*/*/* */*/*/*/*/* ...; commands Perhaps latest:; find . -newer latest.txt ___ Bug-make mailing list Bug-make@gnu.org

make doesn't know about sh's !?

$ make wwwf : erere ! test -w / make: !: Command not found make: *** [wwwf] Error 127 Hold on, both : and ! are shell built-ins. Make doesn't know about !? Sigh, must use sh -c '!' OK, ! is a reserved word, not a builtin. ___ Bug-make mailing

Re: backslash-newline change: my world has become black

Any other surprises planned? No I can't just change to from '. No I don't want to change all my inlines to PERLFUNC=. OK, I found a style that will work in the old and new make: krap: perl -wle 'print 1;'\ 'exit(0);' I now see why python has those future warning messages.

Re: backslash-newline change: my world has become black

In Info 5.2 Command Execution, be sure the best way of all to avoid newline accidents: qz: perl -we 'print 1$(\ )23' Works in both make of today and yesterday at least. Also this: You may split a long line by inserting a backslash followed by a newline, but this is not required,

unterminated variable reference wrong line number

Actually, the problem is on line 73, but make says 71: $ make jidanni.html Makefile:71: *** unterminated variable reference. Stop. $ nl -ba Makefile |sed 70,74!d 70 jidanni.html:~/jidanni.txt.gz 71 $@ 72 echo -e '!DOCTYPE HTML PUBLIC -//W3C//DTD HTML 4.01//EN\n$(\

filenames with colons in them

The manual doesn't say how to deal with filenames with colons in them. $ ls a e:f $ cat Makefile a:e:f bla P.S., in the Info index, lines with :: are unchoosable: byte-code: No such node or anchor: rule, double-colon ( ___ Bug-make mailing

Re: filenames with colons in them

P.S., in the Info index, lines with :: are unchoosable: byte-code: No such node or anchor: rule, double-colon ( EZ Please give an example of such an index entry in the Make manual (or EZ any other manual). In the make concept index, I hit RET upon * :: rules (double-colon):

Texinfo forbids two colons in a row

EZ CC: bug-make@gnu.org EZ Anyway, that index entry is invalid: the Texinfo manual forbids index EZ entries that have 2 colons in a row. I suggest to report this to the EZ Make maintainer. Didn't we already CC: bug-make@gnu.org ? ___ Bug-make mailing

here docs in makefile

In 5.1.1 Splitting Command Lines, at Sometimes you want to split a long line inside of single quotes, but you don't want the backslash-newline to appear in the quoted content. This is often the case when passing scripts to languages such as Perl, where extraneous backslashes

SHELL -c hardwired

One can set SHELL, but there's no way to get rid of the -c in case one wants too. E.g., one wants to make SHELL=mysql as an experiment etc. mysql would need a -e, etc. ___ Bug-make mailing list Bug-make@gnu.org

Re: SHELL -c hardwired

One can set SHELL, but there's no way to get rid of the -c in case one wants too. E.g., one wants to make SHELL=mysql as an experiment etc. mysql would need a -e, etc. EZ Doesn't it work to customize shell-file-name and shell-command-switch? EZ If not, please report which Emacs function(s)

make -ns

Just reading the man and Info pages about what -ns will do isn't clear from the -n and -s descriptions. Add something. Also there is no switch to just get a list of targets that will attempt to be made. ___ Bug-make mailing list Bug-make@gnu.org

$(comment)

Gentlemen, I have discovered an excellent way to comment out parts of lines in makefiles. Be sure you document it somewhere. All one needs to do is wrap a $( . ) around the code to be commented: gp:timez1 echo 'set xdata time;set timefmt %s;$(set format x %m/%d;\ set timefmt

can't get far if file has difficult name

$ cat Makefile .PRECIOUS:.%.time %.t:.%.time; .%.time:% bla bla bla $ ls -1 Makefile 霧峰-桐林(有經朝陽科技大學) - Wufeng-Tonglin (Via Zhaoyang Technical University) Well, no amount of quoting will enable me to $ make '霧峰-桐林(有經朝陽科技大學) - Wufeng-Tonglin (Via Zhaoyang Technical University)'.t make: ***

getting warmer error messages

Certainly you could give slightly different messages instead of the same I don't know, don't bother me style message below. Just like we tell little Johnny No, but you are getting warmer instead of just No. $ ls Makefile $ cat Makefile %.aa:%.bb : bla make u make: *** No rule to make

warn not to expect both kinds of expansion at the same time

In (info "(make) Wildcard Examples") Wildcard expansion does not happen when you define a variable. Thus, if you write this: objects = *.o then the value of the variable 'objects' is the actual string '*.o'. However, if you use the value of 'objects' in a

Idea: --only-make-prerequisites

Idea: --only-make-prerequisites So $ make --only-make-prerequisites netsift would only make myconfdir/$J.pre myconfdir/$J.cf and stop before the second line of netsift:myconfdir/$J.pre myconfdir/$J.cf cat zz > yy ln q r /etc --only-make-prerequisites is for folks that want to

What about the name of the second prerequisite?

(info "(make) Automatic Variables") has '$<' The name of the first prerequisite... '$?' The names of all the prerequisites that are newer than the target... '$^' The names of all the prerequisites, with spaces between them... '$+' This is like '$^', but prerequisites listed more than once are...

semicolon effects

(info "(make) Rule Syntax") says The first recipe line may appear on the line after the prerequisites, with a tab character, or may appear on the same line, with a semicolon. Either way, the effect is the same. However, $ cat Makefile B:; :; Z C: : Z $ make B

subst: Mention how to deal with a FROM that has commas in it

(info "(make) Text Functions") says '$(subst FROM,TO,TEXT)' Performs a textual replacement on the text TEXT: each occurrence of FROM is replaced by TO. The result is substituted for the function call. For example, $(subst ee,EE,feet on the street) produces the

Broken internal links on the make Info Concept Index

In (info "(make) Concept Index"), these three items, * :: rules (double-colon): Double-Colon.(line 6) * ::=: Flavors. (line 56) * ::= <1>: Setting. (line 6) just jump to the first

Re: idea: make --show-interpretation

> "DG" == Dmitry Goncharov writes: DG> i'd use -p and -n switches. Thanks. But that still doesn't tell me what the last three lines of my sample file are interpreted as.

idea: make --show-interpretation

I have an idea for something --debug=all won't tell the user. Have a command that reads in a makefile and outputs the makefile saying what each part evaluated to. I.e., what (info "(make) Parsing Makefiles") (info "(make) Makefile Contents") think. That way the user wouldn't need to ask around

mention what will happen if both -s and -n are given.

Perhaps (info (make) Echoing) should mention what will happen when both -s and -n are given on the command line. ___ Bug-make mailing list Bug-make@gnu.org https://lists.gnu.org/mailman/listinfo/bug-make

mention there is no way to get rid of the space when Appending

In (info "(make) Appending") Often it is useful to add more text to the value of a variable already defined. You do this with a line containing '+=', like this: objects += another.o This takes the value of the variable 'objects', and adds the text 'another.o' to

Re: variables defined in the makefile are ...

> "PS" == Paul Smith writes: PS> The right way to do this, as with any other variable you want to assign PS> to itself (PATH is not special), is to use simply-expanded variables PS> (:=) PS> PATH := $(PATH):../v4 Ah so on (info "(make) Appending") Using '+=' is

document make -s CFLAGS='-g -O'

(info "(make) Overriding") says Each time you run 'make', you can override this value if you wish. For example, if you say 'make CFLAGS='-g -O'', each C compilation will... Wouldn't "make CFLAGS='-g -O'" be clearer? Also add an example of if one should write make -s CFLAGS='-g -O' or

Add -N: a safe, $(MAKE) proof version of -n

Sometimes the user just wants -n to always just print, despite the little $(MAKE) landmines buried deep in a Makefile. (info "(make) Instead of Execution") Yes, he doesn't want to worry that the code will explode in his face, calling up Moscow on the hotline, etc. Thus I hereby propose that you

Mention at $< what the user should do if he instead wants the 2nd

On (info "(make) Automatic Variables") after '$<' The name of the first prerequisite. If the target got its recipe from an implicit rule, this will be the first prerequisite added by the implicit rule (*note Implicit Rules::). Please add: For instead e.g., the fourth

$(reverse)

Maybe implement $(reverse) A = a b c d e x: echo $(reverse, $A) Would give e d c b a or at least at (Info-search "reverse") This macro simply reverses its arguments: reverse = $(2) $(1) foo = $(call reverse,a,b) mention how to reverse a whole list.

Re: Mention at $< what the user should do if he instead wants the 2nd

> "EW" == Edward Welbourne writes: EW> Alternatively, simply mention under $< that it's equivalent to EW> $(word 1,$^) - from which the reasonable reader my interpolate EW> the rest. Indeed, and if properly hyperlinked, one click and the user can also find out about

Re: mention if a=b make = make a=b

I was hoping somebody who knows the differences would add to the section. I barely know how to use make. ___ Bug-make mailing list Bug-make@gnu.org https://lists.gnu.org/mailman/listinfo/bug-make

mention if a=b make = make a=b

(info "(make) Environment") should mention how equivalent $ a=b make #and $ make a=b are to each other. See also http://debbugs.gnu.org/29270 ___ Bug-make mailing list Bug-make@gnu.org https://lists.gnu.org/mailman/listinfo/bug-make

Re: mention if a=b make = make a=b

> "EW" == Edward Welbourne writes: EW> They're not quite equivalent, although an example like the one you give EW> may be a good one for the documentation to explore in explaining what EW> the difference is. Yes that is what I hope will be done.

Re: print line numbers in error messages

> "EZ" == Eli Zaretskii writes: EZ> What version of Make do you have there? The latest versions already EZ> report the line numbers together with errors. make --version GNU Make 4.2.1 ___ Bug-make mailing list Bug-make@gnu.org

print line numbers in error messages

make: Circular poledata/台中區處pole.csv <- poledata/台中區處pole.csv dependency dropped. Great. But please say which line number(s) you are talking about! Some Makefiles may have many mostly identical lines. ___ Bug-make mailing list Bug-make@gnu.org

Re: Add .ALL_WARNINGS_FATAL special target

Yes hmm, perhaps just like the 'warnings(3perl)' man page, one could do different grades, e.g., .FATAL_WARNINGS: ALL etc. And there could be both command line options, and phony targets, so people could use either one as they pleased. ___ Bug-make

(info "(make) Chained Rules") lacks examples

(info "(make) Chained Rules") is great, but it lacks code snippet examples. It mentions several features, but all with English prose. It needs some hard code examples. And those examples should be independent of those built in for C compilers, etc. rm bla.bla # See, bla.bla got

Add .ALL_WARNINGS_FATAL special target

In (info "(make) Error Messages") 'warning: overriding recipe for target `XXX'' 'warning: ignoring old recipe for target `XXX'' GNU 'make' allows only one recipe to be specified per target (except for double-colon rules). If you give a recipe for a target which already has been

multiple identical rules

Maybe this should produce a warning $ cat Makefile m: /tmp/ky m: /tmp/ky m: /tmp/ky m: /tmp/ky echo ... ___ Bug-make mailing list Bug-make@gnu.org https://lists.gnu.org/mailman/listinfo/bug-make

Re: Idea: --only-make-prerequisites

> "EW" == Edward Welbourne writes: EW> The command-line option would save the need to edit the make-file to be EW> ready to be used this way, which would be welcome when the make-files EW> aren't familiar (especially if they're auto-generated and numerous). Or part of a giant read-only

Re: addsuffix influence...

Hmmm, well on https://www.gnu.org/software/make/manual/html_node/Chained-Rules.html they often say "mentioned in the makefile". They need to say once: "yes, anywhere in the entire makefile, (except within comments.)" ___ Bug-make mailing list

addsuffix influence...

I thought targets A:$D/$(addsuffix .kmz, $L $N) B:$D/$L.kmz $D/$N.kmz should do the same. $ cat makefile D=X_X_X_X N=noise L=light A:$D/$(addsuffix .kmz, $L $N) B:$D/$L.kmz $D/$N.kmz %.kmz:%.kml; minizip -o $@ $? %.kml:%.kml0; fgrep -v '?xml' $? > $@ %.kml0: n input.txt; mode=$* ./n input.txt >

Re: addsuffix influence...

OK you're right. But why is what is on line A influencing this when we are trying to make B? $ cat makefile D=X_X_X_X N=noise L=light A:$D/$(addsuffix .kmz, $L $N) B:$D/$L.kmz $D/$N.kmz %.kmz:%.kml; minizip -o $@ $? %.kml:%.kml0; fgrep -v '?xml' $? > $@ %.kml0: n input.txt; mode=$* ./n input.txt >

Mention make -n -s

On (info "(make) Echoing") mention what happens when both -n and -s are (yes, uselessly) given. (-n wins.) ___ Bug-make mailing list Bug-make@gnu.org https://lists.gnu.org/mailman/listinfo/bug-make

Three lines in Concept Index not linked

In (info "(make) Concept Index") these three lines * :: rules (double-colon): Double-Colon. * ::=: Flavors. * ::= <1>: Setting. are not linked. GNU Make 4.2.1 ___ Bug-make

Re: What about the name of the second prerequisite?

OK, on (info "(make) Automatic Variables") has after '$<' The name of the first prerequisite. If the target got its recipe from an implicit rule, this will be the first prerequisite added by the implicit rule (*note Implicit Rules::). add: To get the name of the second etc.

Re: Three lines in Concept Index not linked

>>>>> "EZ" == Eli Zaretskii writes: >> From: 積丹尼 Dan Jacobson >> Date: Mon, 15 Apr 2019 21:21:26 +0800 >> >> In (info "(make) Concept Index") these three lines >> * :: rules (double-colon): Double-Colon.

User worries about compatibility each time he sees the words GNU make

On (info "(make) Prerequisite Types") it says There are actually two different types of prerequisites understood by GNU 'make': normal prerequisites such as described in the previous section, and "order-only" prerequisites. So one thinks "Ah, this (two different...) must be specific to

Do link when mentioning order-only prerequisite

(info "(make) Automatic Variables") should hyperlink to (info "(make) Prerequisite Types") at each place it mentions "order-only prerequisites". Or at least the first time. ___ Bug-make mailing list Bug-make@gnu.org

make -s -n documentation

(info "(make) Echoing") perhaps should mention what happens when -s and -n are combined.

Re: semicolon effects

> "PS" == Paul Smith writes: PS> In the second example, the "Z" command is by itself so it's "simple" so PS> make uses its fast path solution, which is to fork and exec "Z" PS> directly without a shell. Thus you get an error from make. OK, but please have the message distinguish like these

Re: semicolon effects

> "PS" == Paul Smith writes: PS> I think the behavior you're seeing is due to a bug in the older version PS> of gnulib that was used to build your version of GNU make, which as PS> since been fixed. OK. I hope so. P.S., $ make --version GNU Make 4.3 Built for x86_64-pc-linux-gnu Copyright

Implement make --all-targets-matching-regexp

Let's take Makefile: alzu:; echo $@ Blibco:; echo $@ Norfowitz; echo $@ nillsburg; echo $@ Well let's say we want to run all the capital letter items. We could use $ make Blibco Norfowitz but that isn't as smart as $ make --all-targets-matching-regexp '^[A-Z].*' #Or instead these kinds or

Re: Implement make --all-targets-matching-regexp

> "PD" == Pete Dietl writes: PD> Perhaps a better option would be to make an option to list all PD> targets. That would just be e.g., perl -nwle 'print for /^\w+:/g;' PD> Then one can grep to select ones in any which way. Well OK, I guess all this won't be needing make to add such features

Document -n echoed vs. echoed and executed commands

Some -n output is just echoed commands. Some of it is actually echoed and executed commands. Document exactly how to tell the difference, or document that there is no way.

Document nested -n bomb diffusion

(info "(make) MAKE Variable") still just says The special feature makes this do what you want: whenever a recipe line of a rule contains the variable 'MAKE', the flags '-t', '-n' and '-q' do not apply to that line. Recipe lines containing 'MAKE' are executed normally despite

clearer Call Function example

In (info "(make) Call Function") One would assume reverse = $(2) $(1) foo = $(call reverse,a,b) should be reverse = $(2) $(1) foo = $(call $(reverse),a,b) but make does that $ stuff for us automatically, which makes us think maybe it is also doing the same for a and b.

Document -n vs. $(MAKE) separate line safety

On (info "(make) MAKE Variable") please warn: Remember that anything else you put *on the same line* with $(MAKE) on it will also get executed despite -n: w: beep; beep; beep; $(MAKE) qq will beep in the middle of the night, despite $ make -n w If you don't want $ make x to suddenly