Perhaps (info "(make) Echoing") should mention what will happen when
both -s and -n are given on the command line.
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In (info "(make) Appending")
Often it is useful to add more text to the value of a variable already
defined. You do this with a line containing '+=', like this:
objects += another.o
This takes the value of the variable 'objects', and adds the text
'another.o' to it
(info "(make) Environment") says
When 'make' runs a recipe, variables defined in the makefile are
placed into the environment of each shell.
Not true.
KK = 22
p:
env|grep -c KK
gives 0!
This allows you to pass
values to sub-'make' invocations (*note Recursive Use of 'm
> "PS" == Paul Smith writes:
PS> The right way to do this, as with any other variable you want to assign
PS> to itself (PATH is not special), is to use simply-expanded variables
PS> (:=)
PS> PATH := $(PATH):../v4
Ah so on (info "(make) Appending")
Using '+=' is similar to:
objec
(info "(make) Overriding") says
Each time you run 'make', you can override this value if you wish.
For example, if you say 'make CFLAGS='-g -O'', each C compilation
will...
Wouldn't "make CFLAGS='-g -O'" be clearer?
Also add an example of if one should write
make -s CFLAGS='-g -O'
or
mak
On (info "(make) Interrupts") be sure to give an example,
as one finds
.PRECIOUS: %.csv #works
.PRECIOUS: *.csv #doesn't
also it needs to be high up in the Makefile, not on e.g., the last line.
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Sometimes the user just wants -n to always just print, despite the
little $(MAKE) landmines buried deep in a Makefile. (info "(make)
Instead of Execution")
Yes, he doesn't want to worry that the code will explode in his face,
calling up Moscow on the hotline, etc.
Thus I hereby propose that you p
On (info "(make) Automatic Variables") after
'$<'
The name of the first prerequisite. If the target got its recipe
from an implicit rule, this will be the first prerequisite added by
the implicit rule (*note Implicit Rules::).
Please add:
For instead e.g., the fourth prerequ
On (info "(make) Automatic Variables")
please mention which of
M:/dev/null /dev/zero
: $?
: $+
: $^
: $|
are guaranteed to preserve the order. I.e.,
/dev/null /dev/zero not
/dev/zero /dev/null.
and which all bets are off.
Also maybe when people read about
(Info-in
Maybe implement $(reverse)
A = a b c d e
x:
echo $(reverse, $A)
Would give
e d c b a
or at least at
(Info-search "reverse")
This macro simply reverses its arguments:
reverse = $(2) $(1)
foo = $(call reverse,a,b)
mention how to reverse a whole list.
_
> "EW" == Edward Welbourne writes:
EW> Alternatively, simply mention under $< that it's equivalent to
EW> $(word 1,$^) - from which the reasonable reader my interpolate
EW> the rest.
Indeed, and if properly hyperlinked, one click and the user can also
find out about $(wordlist).
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(info "(make) Environment") should mention how equivalent
$ a=b make #and
$ make a=b
are to each other.
See also http://debbugs.gnu.org/29270
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> "EW" == Edward Welbourne writes:
EW> They're not quite equivalent, although an example like the one you give
EW> may be a good one for the documentation to explore in explaining what
EW> the difference is.
Yes that is what I hope will be done.
_
I was hoping somebody who knows the differences would add to the
section. I barely know how to use make.
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In (info "(make) Error Messages")
'warning: overriding recipe for target `XXX''
'warning: ignoring old recipe for target `XXX''
GNU 'make' allows only one recipe to be specified per target
(except for double-colon rules). If you give a recipe for a target
which already has been def
Yes hmm, perhaps just like the 'warnings(3perl)' man page,
one could do different grades, e.g.,
.FATAL_WARNINGS: ALL
etc. And there could be both command line options, and phony targets,
so people could use either one as they pleased.
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Maybe this should produce a warning
$ cat Makefile
m: /tmp/ky
m: /tmp/ky
m: /tmp/ky
m: /tmp/ky
echo ...
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(info "(make) Chained Rules") is great, but it lacks code snippet
examples.
It mentions several features, but all with English prose.
It needs some hard code examples.
And those examples should be independent of those built in for C
compilers, etc.
rm bla.bla # See, bla.bla got re
make: Circular poledata/台中區處pole.csv <- poledata/台中區處pole.csv dependency
dropped.
Great. But please say which line number(s) you are talking about!
Some Makefiles may have many mostly identical lines.
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https:/
> "EZ" == Eli Zaretskii writes:
EZ> What version of Make do you have there? The latest versions already
EZ> report the line numbers together with errors.
make --version
GNU Make 4.2.1
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> "EW" == Edward Welbourne writes:
EW> The command-line option would save the need to edit the make-file to be
EW> ready to be used this way, which would be welcome when the make-files
EW> aren't familiar (especially if they're auto-generated and numerous).
Or part of a giant read-only tree,
On (info "(make) Echoing") mention what happens when both -n and -s are
(yes, uselessly) given. (-n wins.)
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I thought targets
A:$D/$(addsuffix .kmz, $L $N)
B:$D/$L.kmz $D/$N.kmz
should do the same.
$ cat makefile
D=X_X_X_X
N=noise
L=light
A:$D/$(addsuffix .kmz, $L $N)
B:$D/$L.kmz $D/$N.kmz
%.kmz:%.kml; minizip -o $@ $?
%.kml:%.kml0; fgrep -v '?xml' $? > $@
%.kml0: n input.txt; mode=$* ./n input.txt > $@
OK you're right. But why is what is on line A influencing this when we
are trying to make B?
$ cat makefile
D=X_X_X_X
N=noise
L=light
A:$D/$(addsuffix .kmz, $L $N)
B:$D/$L.kmz $D/$N.kmz
%.kmz:%.kml; minizip -o $@ $?
%.kml:%.kml0; fgrep -v '?xml' $? > $@
%.kml0: n input.txt; mode=$* ./n input.txt >
Hmmm, well on
https://www.gnu.org/software/make/manual/html_node/Chained-Rules.html
they often say "mentioned in the makefile".
They need to say once: "yes, anywhere in the entire makefile, (except
within comments.)"
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In (info "(make) Concept Index") these three lines
* :: rules (double-colon): Double-Colon.
* ::=: Flavors.
* ::= <1>: Setting.
are not linked.
GNU Make 4.2.1
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>>>>> "EZ" == Eli Zaretskii writes:
>> From: 積丹尼 Dan Jacobson
>> Date: Mon, 15 Apr 2019 21:21:26 +0800
>>
>> In (info "(make) Concept Index") these three lines
>> * :: rules (double-colon): Double-Colon.
OK, on (info "(make) Automatic Variables") has
after
'$<'
The name of the first prerequisite. If the target got its recipe
from an implicit rule, this will be the first prerequisite added by
the implicit rule (*note Implicit Rules::).
add:
To get the name of the second etc. pre
(info "(make) Automatic Variables")
should hyperlink to
(info "(make) Prerequisite Types")
at each place it mentions "order-only prerequisites". Or at least the
first time.
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On (info "(make) Prerequisite Types") it says
There are actually two different types of prerequisites understood by
GNU 'make': normal prerequisites such as described in the previous
section, and "order-only" prerequisites.
So one thinks "Ah, this (two different...) must be specific to GN
(info "(make) Echoing") perhaps should mention what happens when -s and
-n are combined.
Let's take Makefile:
alzu:; echo $@
Blibco:; echo $@
Norfowitz; echo $@
nillsburg; echo $@
Well let's say we want to run all the capital letter items.
We could use
$ make Blibco Norfowitz
but that isn't as smart as
$ make --all-targets-matching-regexp '^[A-Z].*' #Or instead these kinds or
regexp
On the make man page,
-B, --always-make
Unconditionally make all targets.
seems to mean for Makefile
a:; echo $@
b:; echo $@
c:; echo $@
$ make -B
should make all three.
Therefore the wording should be more like the INFO page.
GNU Make 4.3
> "PD" == Pete Dietl writes:
PD> Perhaps a better option would be to make an option to list all
PD> targets.
That would just be e.g.,
perl -nwle 'print for /^\w+:/g;'
PD> Then one can grep to select ones in any which way.
Well OK, I guess all this won't be needing make to add such features
Some -n output is just echoed commands.
Some of it is actually echoed and executed commands.
Document exactly how to tell the difference,
or document that there is no way.
(info "(make) MAKE Variable") still just says
The special feature makes this do what you want: whenever a recipe
line of a rule contains the variable 'MAKE', the flags '-t', '-n' and
'-q' do not apply to that line. Recipe lines containing 'MAKE' are
executed normally despite th
In (info "(make) Call Function")
One would assume
reverse = $(2) $(1)
foo = $(call reverse,a,b)
should be
reverse = $(2) $(1)
foo = $(call $(reverse),a,b)
but make does that $ stuff for us automatically,
which makes us think maybe it is also doing the same for a and b.
B
On (info "(make) MAKE Variable") please warn:
Remember that anything else you put *on the same line* with $(MAKE) on it will
also get executed despite -n:
w:
beep; beep; beep; $(MAKE) qq
will beep in the middle of the night, despite
$ make -n w
If you don't want
$ make x
to suddenly invo
> "PS" == Paul Smith writes:
PS> In the second example, the "Z" command is by itself so it's "simple" so
PS> make uses its fast path solution, which is to fork and exec "Z"
PS> directly without a shell. Thus you get an error from make.
OK, but please have the message distinguish like these d
> "PS" == Paul Smith writes:
PS> I think the behavior you're seeing is due to a bug in the older version
PS> of gnulib that was used to build your version of GNU make, which as
PS> since been fixed.
OK. I hope so. P.S.,
$ make --version
GNU Make 4.3
Built for x86_64-pc-linux-gnu
Copyright (C)
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