Hi Amit,
I think I will need more detailed information in order to assist. First
some questions:
1) In terms of "deprogrammed", do you mean each time you connect to the
SKARAB using "casperfpga.Casperfpga("skarab"), the Virtex 7 FPGA
reconfigures to the Multi-boot image or is it the Golden image? I need
specifics. By the way, it should never deprogram itself just connecting to
the board.
2) Please can you highlight the steps you used to create this issue?
It is possible that something is going wrong with the programming of the
toolflow image and this is causing the golden image to be loaded as a fault
has occurred - this should be the only reason the FPGA reconfigures, in my
opinion.
Please run the commands "casperfpga.transport.get_skarab_version_info()"
and let me know what you see - before the connect and after the connect.
Kind regards,
Adam
On Wed, Jan 10, 2018 at 1:54 PM, Amit Bansod <aban...@mpifr-bonn.mpg.de>
wrote:
> Hi Adam,
>
> Thanks for the updates!
>
> The SKARAB is deprogrammed whenever I use "casperfpga.Casperfpga("skarab")
> to connect either from same server or different one. Can this be related to
> microblaze reconfiguration ?
>
> Kind regards,
> Amit
>
> On 09-Jan-18 8:02 PM, Adam Isaacson wrote:
>
> Hi Amit,
>
> Great, thanks for letting me know. We have also connected with a 10GbE
> card and splitter cable. It definitely works.
>
> Good to know this works on Debian 8 too.
>
> Happy to have supported. I wish you all the best with your development on
> SKARAB. We are working on making the SKARAB more robust.
>
> Current issues:
>
> 1) the ublaze hangs after reconfiguration. Seems to be an issue with the
> clock and reset. The programming memory becomes corrupted. DHCP fails, ARP
> fails and comms fails. We are working on a solution. This works 90 % of the
> time, so do not be worried.
>
> 2) HMC fails to initialise on occassions. Works 99.8 percent of the time.
> We are working on a solution.
>
> Just be aware of this for now.
>
> Kind regards,
>
> Adam
>
> On 09 Jan 2018 20:07, "Amit Bansod" <aban...@mpifr-bonn.mpg.de> wrote:
>
> Hi Adam,
>
> I changed to a linux server with 40GbE link and Debian 8 and the issue is
> resolved. :)
>
> I then reinstalled casperfpga and dependencies on the older linux server
> with 10GbE port and it worked as well.
>
> I think the casperfpga installation was corrupted (probably me trying too
> many things at once) which lead these errors.
>
> Thanks a lot for your support!!
>
> Kind Regards,
> Amit
>
>
> On 09-Jan-18 4:34 PM, Adam Isaacson wrote:
>
> Hi Amit,
>
> Here are a few questions to help me debug:
>
> 1) You said you are able to program via the 1GbE interface correctly, is
> that correct? I am assuing that you are able to continuously program your
> toolflow image ('s_edd_full_res_2018-01-04_1358.fpg') via the 1GbE
> interface?
> 2) Are you sure the QSFP cable is plugged into the right slot i.e. if you
> are looking at the QSFP module the cable needs to be plugged into the very
> left hand slot (port 0)? Are you able to ping the 40GbE interface? Can you
> program via the 1GbE and then connect using casperfpga via the 40GbE? If
> so, can you read back registers via the 40GbE? This will help me to see
> what the issue is.
> 3) Are you sure the MTU size for the 40 GbE Ethernet on the linux server
> is set 9000? It could be that you set the 1GbE MTU to 9000 and forgot to
> set the 40GbE ethernet MTU?
> 4) Can you bypass the 40GbE switch and connect the SKARAB directly to the
> linux server? See if the switch is blocking packets.
> 5) What OS are you using? It should work work with ubuntu 14.04LTS,
> 16.04LTS and RedHat 6.6.
> 6) Please send me your fpg file, so I can try on my side. It could be that
> you have compiled an image that doesn't meet the timing on the 40GbE path.
> Does it meet timing? What design are you compiling? Please send me the slx
> file too - Google Drive link works best. Have you tried compiling the slx
> files in the test_models folder, which are known to work?
> 7) When you configure via the 40GbE the first time then it is fine, right?
> The reason your design worked the first time is because the multiboot image
> was running and that will load, but the second time you tried your image
> was loaded and so I am suspecting there is an issue with your compiled
> image that affects the 40GbE interface. Please can you try one of the
> existing slx models and see if the same issue occurs? I am correct in
> assuming that you can program via the 40GbE on power up just once and then
> you can't again? Try connect via casperfpga the first time you power the
> board on and the second time you program. My guess is the first time you
> power up it will be fine and the second time you won't be able to ping the
> 40GbE and connect. Please confirm, thanks.
> 8) Compare how you have connected your 40GbE yellow block to the way it is
> done in the test_model/*.slx files. It may be a connection that is not
> right. Send to me and I will have a look.
>
>
> Your log looks fine or rather, this is what I expect to see. The
> bootloader is started everytime the FPGA is programmed. I would expect this
> behaviour as the microblaze gets booted everytime the FPGA is reprogrammed.
>
> Sorry if some of the above questions seem trivial, but I want to make sure
> I have all the information.
>
> Kind regards,
>
> Adam
>
>
>
>
>
> On Tue, Jan 9, 2018 at 3:28 PM, Amit Bansod <aban...@mpifr-bonn.mpg.de>
> wrote:
>
>> Hi Adam,
>>
>> Unfortunately it did not solve the problem. Here are the steps I followed:
>>
>> 1. I upgraded casperfpga (version:0.1.dev508+head.16fec79) and rebooted
>> SKARAB (both 1GbE and 40GbE ports are connected)
>>
>> 2. I connected via casperfpga tools and programmed the fpga.
>> It worked for the first time. I was monitoring the skarab console log
>> which showed the bootloader is restarted on
>> programming the fpga. Is this an expected behaviour ?
>>
>> 3. I tried programming again and it failed with messages enclosed in the
>> text file.
>>
>> Please let me know if you need more information on the setup.
>>
>> Kind Regards,
>> Amit
>>
>>
>> On 09-Jan-18 8:40 AM, Adam Isaacson wrote:
>>
>> Hi Amit,
>>
>> Great, I hope that does the trick. It should do, but let me know if it
>> doesn't.
>>
>> In terms of the 40GbE core, we are only using 256 bits and so the signal
>> processing team (CBF) have packed the data to 256 bits. I would suggest you
>> pack your data to 256 bits and pad the end of the packet so that it fits
>> within a 256 bit boundary. This should only affect the end of the packet.
>>
>> Peralex has made provision for 64 bits, 128 bits, 192 bits and 256 bits
>> (4 x 64 bit words). In the firmware there is a data valid comprised of 4
>> bits - each bit represents the one of the 64 bit words. The firmware
>> currently assumes that all data valids are set, so it expects 256 bits
>> words. There are also some FIFO read state machines in the application
>> layer that assume 256 bit. Therefore, I would suggest you pack your data to
>> 256 bits.
>>
>> NB: Please note that the reset for the 40GbE yellow block will currently
>> cause the data to stop flowing. We are working on fixing this.
>>
>> Kind regards,
>>
>> Adam
>>
>> On Mon, Jan 8, 2018 at 5:06 PM, Amit Bansod <aban...@mpifr-bonn.mpg.de>
>> wrote:
>>
>>> Hi Adam,
>>>
>>> Thanks a lot! The SKA-SA BSP versions are latest.
>>>
>>> I cloned the master branch of casperfpga which might be the issue. I
>>> will switch to devel and test again.
>>>
>>> I do have one question regarding 40GbE core development. If I am not
>>> taking too much of your time, do you think it will easy to modify the
>>> current 40GbE yellow block to work with UDP packets which do not fit
>>> 256-bits window. We have a packet size of 4168 bytes which I am not sure
>>> if the current 40GbE core supports.
>>>
>>> Kind regards,
>>> Amit
>>>
>>>
>>>
>>>
>>> On 08-Jan-18 3:07 PM, Adam Isaacson wrote:
>>>
>>> Hi Amit,
>>>
>>> I am assuming you are compiling a CASPER toolflow image and that you are
>>> able to program the CASPER toolflow image on the SKARAB via the 1GbE? If
>>> so, then your MTU sizes are fine and then it should work for the 40GbE as
>>> well
>>>
>>> You should have the following versions for the SKA-SA BSP as shown below
>>> when you read back via python using casperfpga - please confirm:
>>>
>>> In [9]: fpga2.transport.get_skarab_version_info()
>>> Out[9]: {'emdedded_software_version': '3.4.0',
>>> 'golden_image': False,
>>> 'microblaze_hardware_version': '2.5',
>>> 'multiboot_image': True,
>>> 'spartan_firmware_version': '1.6',
>>> 'toolflow_image': False,
>>> 'virtex7_firmware_version': '2.5'}
>>>
>>> If any of the above is different then let me know.
>>>
>>> What version of casperfpga are you using? You should be using the latest
>>> from devel branch https://github.com/ska-sa/casperfpga/tree/devel. I am
>>> using this version:
>>>
>>> In [2]: casperfpga.__version__ (this is the command to read back the
>>> casperfpga version)
>>> Out[2]: '0.4.4.dev508+devel.16fce79'
>>>
>>> Please confirm if this is different then try update to the latest.
>>>
>>> Kind regards,
>>>
>>> Adam
>>>
>>>
>>>
>>>
>>> On Mon, Jan 8, 2018 at 3:12 PM, Amit Bansod <aban...@mpifr-bonn.mpg.de>
>>> wrote:
>>>
>>>> Hi Adam,
>>>>
>>>> Thanks for the updates.
>>>>
>>>> I have one issue with casperfpga tools. After I changed the golden and
>>>> boot images as well as Spartan fpga firmware (from
>>>> https://github.com/ska-sa/skarab_bsp_images) to support CASPER
>>>> toolflow (https://github.com/ska-sa/mlib_devel), I am able to compile
>>>> and program the SKARAB using casperfpga with 1GbE port but connection via
>>>> 40GbE needs reprogramming of the fpga. It also often complains about the
>>>> MTU to be set to 9000 even though it is already set on our switch as well
>>>> as linux machine. Does the 40G core MTU needs to be manually set as well ?
>>>>
>>>> Kind regards,
>>>> Amit
>>>>
>>>>
>>>> On 08-Jan-18 1:41 PM, Adam Isaacson wrote:
>>>>
>>>> Hi Amit,
>>>>
>>>> Yes, I can confirm that no porting has been done regarding the SKARAB
>>>> ADC here at SKA-SA. We are planning on holding a yellow block creation
>>>> workshop here at SKA some time later this year - date TBC. The user can
>>>> bring their hardware with firmware and get it running during the workshop.
>>>>
>>>> I can confirm that the rest of the SKARAB is fully supported using the
>>>> CASPER tools. The only other limitation, is that the CASPER tools are
>>>> supporting only one 40GbE TX/RX link on the SKARAB. If you desire more than
>>>> one link then it should not require much effort to update. We are chasing
>>>> deadlines at the moment, so it is not possible for us to address the above
>>>> at this time.
>>>>
>>>> Kind regards,
>>>>
>>>> Adam
>>>>
>>>>
>>>>
>>>> On Mon, Jan 8, 2018 at 12:16 PM, Clifford van Dyk <
>>>> cliffordvan...@gmail.com> wrote:
>>>>
>>>>> Hello Amit
>>>>>
>>>>> Thanks, and Happy New Year to you too!
>>>>>
>>>>> I am fairly certain that no one has started porting the SKARAB ADC
>>>>> firmware into a CASPER "yellow block" just yet. I would be happy to
>>>>> support
>>>>> you on this. I don't see any limitations due to the new ADC interface.
>>>>>
>>>>> The Peralex-supplied JESD receiver core (included in the BSP) may need
>>>>> to be adapted depending on your application (how the ADC is configured) -
>>>>> the Peralex core is not currently a "generic" JESD core, rather it is
>>>>> designed to receive JESD packets from the specific ADC configured with
>>>>> specific mode/options (most notably output bandwidth). It may be easiest
>>>>> to
>>>>> start porting this to yellow block directly first, and then
>>>>> parameterise/extend the firmware/yellow block to support other ADC modes
>>>>> (decimation rates, DDC bypass, etc) as needed.
>>>>>
>>>>> There are a few restrictions that you need to be aware of in terms of
>>>>> bandwidth/resolution trade-off if you change the ADC modes, particularly
>>>>> when bypassing the ADC's built-in DDCs. If you can give me an idea of how
>>>>> you specifically intend to use the ADC (mode/bandwidth/frequency band), I
>>>>> can perhaps offer you some further advice.
>>>>>
>>>>> Kind regards,
>>>>> Clifford
>>>>>
>>>>>
>>>>>
>>>>> On 1/8/2018 10:30 AM, Amit Bansod wrote:
>>>>>
>>>>> Hi Clifford,
>>>>>
>>>>> Happy New Year!
>>>>>
>>>>> Thanks a lot for the BSP Package. I am going through the documentation
>>>>> now and have one SKARAB with casper firmware and one with Peralex.
>>>>>
>>>>> I would be interested to develop a Casper "yellow block" for SKARAB
>>>>> since most of our development is using CASPER toolflow. Do you know if
>>>>> anybody is already working on it or if there are any limitations due to
>>>>> the
>>>>> new ADC interface ?
>>>>>
>>>>> Regards,
>>>>> Amit
>>>>>
>>>>>
>>>>> On 20-Dec-17 7:15 PM, Clifford van Dyk wrote:
>>>>>
>>>>> Hi Amit
>>>>>
>>>>> Your Skarab would have been shipped with a firmware that supports DHCP
>>>>> on all GbE interfaces and bootloading over 1GbE (only). It includes
>>>>> support
>>>>> for the ADC mezzanine. You will probably need to use the Peralex BSP tools
>>>>> to access and boot the Skarab over 1GbE, rather than the CASPER toolflow.
>>>>>
>>>>> If you would like to work with the CASPER tools, then you will need to
>>>>> overwrite the Peralex boot image with the CASPER boot image. This will
>>>>> provide additional support for booting the Skarab over 40GbE, but you will
>>>>> loose support for the ADC. The ADC firmware is currently provided as HDL
>>>>> code only-it has yet to be ported into a CASPER yellow block.
>>>>>
>>>>> I will pop by the office tomorrow to provide you with a link where you
>>>>> can download the Peralex BSP.
>>>>>
>>>>> Kind regards,
>>>>> Clifford
>>>>>
>>>>> On 20 Dec 2017 6:05 PM, "Amit Bansod" <aban...@mpifr-bonn.mpg.de>
>>>>> wrote:
>>>>>
>>>>>> Dear All,
>>>>>>
>>>>>> I am trying to boot SKARAB and the it gets stuck at "ARP ENTRY ID:0
>>>>>> IP:....". Is there any way to force a static ip address or boot via
>>>>>> 1GbE
>>>>>> interface as well ?
>>>>>>
>>>>>> Many Thanks!
>>>>>>
>>>>>> Regards,
>>>>>> Amit
>>>>>>
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>>>>
>>>>
>>>>
>>>> --
>>>> [image: SKA_banner]
>>>>
>>>> Best Regards / Vriendelike Groete
>>>>
>>>> *Adam Isaacson*
>>>> Hardware Manager
>>>>
>>>> [image: SKA_banner][image: SKA_banner]
>>>> [image: SKA_banner] (+27) 82 563 9602 [image: SKA_banner] 3rd
>>>> Floor, The Park, Park Road,
>>>> [image: SKA_banner] (+27) 21 506 7300 Pinelands
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>>>
>>>
>>>
>>> --
>>> [image: SKA_banner]
>>>
>>> Best Regards / Vriendelike Groete
>>>
>>> *Adam Isaacson*
>>> Hardware Manager
>>>
>>> [image: SKA_banner][image: SKA_banner]
>>> [image: SKA_banner] (+27) 82 563 9602 [image: SKA_banner] 3rd
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>>
>>
>> --
>> [image: SKA_banner]
>>
>> Best Regards / Vriendelike Groete
>>
>> *Adam Isaacson*
>> Hardware Manager
>>
>> [image: SKA_banner][image: SKA_banner]
>> [image: SKA_banner] (+27) 82 563 9602 [image: SKA_banner] 3rd Floor,
>> The Park, Park Road,
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>> [image: SKA_banner] (+27) 21 506 7375 7405
>> [image: SKA_banner] www.ska.ac.za South Africa
>>
>>
>>
>
>
> --
> [image: SKA_banner]
>
> Best Regards / Vriendelike Groete
>
> *Adam Isaacson*
> Hardware Manager
>
> [image: SKA_banner][image: SKA_banner]
> [image: SKA_banner] (+27) 82 563 9602 [image: SKA_banner] 3rd Floor,
> The Park, Park Road,
> [image: SKA_banner] (+27) 21 506 7300
>
> ...
>
>
>
>
--
[image: SKA_banner]
Best Regards / Vriendelike Groete
*Adam Isaacson*
Hardware Manager
[image: SKA_banner][image: SKA_banner]
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The Park, Park Road,
[image: SKA_banner] (+27) 21 506 7300 Pinelands
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