Well, if Dave, Glenn and Aaron all agree, then I'm sold.
Thanks.
On Wed, Feb 21, 2018, 10:50 PM David MacMahon wrote:
> Hi, Jack,
>
> I haven’t used the biplex_core block in a while, but I believe the inputs,
> pol1 and pol2, are two independent complex input signals. The
Hi, Jack,
I haven’t used the biplex_core block in a while, but I believe the inputs, pol1
and pol2, are two independent complex input signals. The outputs, out1 and
out2, first output the frequency channels for input pol1, with the low half of
the band being output in bit reversed order on
Thanks Glenn,
Now I get to mess with weird CASPER grey blocks *and* buy things from
Amazon. It's such a joy when my two favorite pastimes come together :)
J
On Wed, Feb 21, 2018, 9:32 PM G Jones wrote:
> If I recall correctly, this book gives a very nice description
Thanks Aaron,
That seems pretty plausible based on what the downstream logic appears to
be trying to do. Maybe.
If I can verify this, maybe I'll add a docstring...
Cheers
Jack
On Wed, Feb 21, 2018, 9:27 PM Aaron Parsons wrote:
> My recollection is that Pol1 outputs
My recollection is that Pol1 outputs come for the first N/2 clocks out both
output ports, even channels on top (in bit reversed order) and odd on
bottom (also bit reversed order). Pol2 outputs follow for the next N/2
clocks, same order.
On Wed, Feb 21, 2018 at 6:04 PM Jack Hickish
Howdy,
Partly motivated by a search for RAM savings, and partly for fun, I'm
looking through the innards of the fft_biplex_real_4x block. Can someone
tell me, using short words and/or pictures, what the the relationship
between the inputs (pol1, pol2) and the outputs (out1, out2) on the
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