Re: [casper] Black box compilation error using Casper XPS flow

I'm not sure what's causing your problem, but here are some other ideas... Did you use the Black Box Wizard to create a "...config.m" file for your HDL or did you hand code it? Does your top level HDL have a single clock input and a clock enable input? Does your config.m file list all the HDL

Re: [casper] Black box compilation error using Casper XPS flow

Hi David, Yes, the normal designs that don't have black boxes compile without any problem. I am not sure why this "Possible deprecated ..." warning is given. I have seen it in few emails for other Casperites, so I thought it was normal. The OS is: Red Hat (release 6.7) Thanks for your help on

Re: [casper] Black box compilation error using Casper XPS flow

Hi, Vijay, Are you able to compile a simple model without using the back box block? The "Possible deprecated use of get on a Java object with an HG Property 'UserData'" waning seems like a simulink and/or system generator issue. And the segmentation fault when running xps is not a good sign a

Re: [casper] Black box compilation error using Casper XPS flow

Hi Jack, Thanks a lot for your reply. I am trying to incorporate a verilog design with the Casper design. It's a simple test design and works in simulation. So probably no HDL syntax issues. The setup I am using is Xilinx 14.4 based one with Matlab 2012b and unfortunately, I don't have the 14.7 s

Re: [casper] Black box compilation error using Casper XPS flow

Hi Vijay, Are you trying to black box a system generator model, or plain verilog/vhdl? In the latter case, any error in the HDL syntax or issues with port declarations will probably cause the tools to implode like you see. Do you still get this error with the latest (14.7) of the xilinx tools, an