Re: [casper] MKID ADC-4x problem the clock rate of FPGA

hi ZHANG Laiyu, from rick, who designed that ADC board: "The ADC produces full-parallel data at 550 or 400MHz DDR, so the ADC core would normally run at half of this- I don't see any reason to run it slower. I can't remember who did the yellow block; I have code that runs on a mini-roach for

Re: [casper] ADCs in CASPER

hi gareth, can you tell us a bit more about your project? sample rate? number of ADC bits? number of ADC's? ADC analog bandwidth ? then people might be able to provide better advice. some random thoughts: you probably know the SNAP board has a ZDOC connector on it, so the old CASPER ZDOC

[casper] Re: ADCs in CASPER

Gareth, I’m working on next-generation wideband digitizing with the Black Hole PIRE group. We at the U of Arizona have taken the approach of using the most readily available ADC, the one in the Xilinx RFSoCs. The platform is currently the ZCU111. We plan to migrate to its follow-on, the

Re: [casper] ADCs in CASPER

On 10/26/2020 10:38 AM, Jack Hickish wrote: Hi Gareth, On Mon, 26 Oct 2020 at 12:49, Gareth Callanan > wrote: Hi Casper Community Now that roach2 has been deprecated, I have been wondering where the CASPER community is heading in terms of future ADC

Re: [casper] ADCs in CASPER

Hi Glen, The CASPER tools support the Red Pitaya -- https://www.redpitaya.com/Catalog/p57/stemlab-125-10-starter-kit?cat=c99 -- which is ~200 EUR. Somewhat similar in price to the Pluto but admittedly without the RF front end. This support was added in the last couple of years by our South

Re: [casper] ADCs in CASPER

Hello Casperites, I’ve been following quietly, since I’ve not built any useful Casper-like-devices since we built “Ruppi” a decade ago. It was a clone of the Green Bank Observatory’s Guppi pulsar device (now deceased I think). We did publish a few pulsar results using the NRAO 140ft. As

RE: [casper] ADCs in CASPER

Jack, Should anyone in the group need any Xilinx FPGA, we can supply at a steep discount off of Digikey pricing, if Xilinx will not provide them for free. We have supplied Xilinx for both the Cameras on the Orion space mission, and for Harvard Smithsonian on the EHT (Digicom), and also for the

Re: [casper] ADCs in CASPER

Hi Gareth, On Mon, 26 Oct 2020 at 12:49, Gareth Callanan wrote: > Hi Casper Community > > Now that roach2 has been deprecated, I have been wondering where the > CASPER community is heading in terms of future ADC work. > > As far as I can tell there are three options available: > >1. SNAP

Re: [casper] ADCs in CASPER

Hi Gareth, Jack, Jonathon, Nima, and I have been discussing a low-cost board to serve the N>1000 space, w/ digitization at the antenna (2 ch; ≤ 500 GS/s; ≥ 12 bits; SOC; low power; 10 GbE out). Do the above parameters overlap what you'd like to see, and do you have a price point in mind?

[casper] ADCs in CASPER

Hi Casper Community Now that roach2 has been deprecated, I have been wondering where the CASPER community is heading in terms of future ADC work. As far as I can tell there are three options available: 1. SNAP boards - The SNAP boards seem to support the largest number of options 12 x 250