[casper] Question About The ADC Clock Frequency

Hi, All, In our model, We need ADC clock frequency up to 250Mhz. Our ADC boards are ADC16*250-8.We are using adc16*250-8 yellow block in our model modified based PAPER model .However when I changed the XSG core config/User IP Clock Rate(MHz) to 250 Mhz and System Generator/FPGA Clock

Re: [casper] Question About The ADC Clock Frequency

Hi, Peter, On Jan 12, 2015, at 1:11 AM, Peter Niu wrote: In our model, We need ADC clock frequency up to 250Mhz. Our ADC boards are ADC16*250-8.We are using adc16*250-8 yellow block in our model modified based PAPER model .However when I changed the XSG core config/User IP Clock