Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-11 Thread David MacMahon
Hi Nilan, I think the problem is that your design appears (based on the timing report) to require a signal to propagate from the output of “delay42” through “convert8” through “mult2” through “addsub1" through “addsub2" and through “mult1” all within one clock cycle. That is simply asking too

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-10 Thread Jack Hickish
You could always just try just throwing delays in there just to check it fixes the compile, then at least you know that's the issue. Worrying about making a filter implementation that is both valid and meets timing can then come later. Good Luck! Jack On Fri, 11 Mar 2016 at 01:52 Nilan

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-10 Thread Jack Hickish
Hi Nilan, Yeah, I figured that would be a problem... :) Does something like this (which i confess I haven't read, but Fig 14 looks potentially relevent) help? -- http://www.xilinx.com/support/documentation/white_papers/wp330.pdf Jack On Fri, 11 Mar 2016 at 01:21 Nilan Udayanga

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-10 Thread Jack Hickish
I think if you can add latency in those multipliers / adders you'll probably find your problem will go away. It's the blow path that's breaking, so I don;t think you can get around ijnserting some registers to split up thje logic stages --

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-10 Thread Jack Hickish
Also, I don't think the problem is the software register, I think the problem is present in both your designs, but in the "working" model the compiler is optimizing away all the failing logic paths, which presumably aren't actually doing anything given the way the blocks in the model are connected

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-10 Thread Jack Hickish
Hi Nilan, It looks like there's a block called (something like) ppcm12/block_t_z2 with a huge logic delay -- from line 135 of the failing twr file -- Data Path Delay: 20.585ns (Levels of Logic = 12)(Component delays alone exceeds constraint) What is this block? It looks like it has some

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-09 Thread Jack Hickish
Hi Nilan, You'd need to look at the interface firmware to see exactly how the clock is generated on the FPGA, but essentially, yes, the 240 mhz clock is derived by dividing down the clock the ADC chip passes to the FPGA (which may or may not be equal to the sampling rate, depending on the exact

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-09 Thread Jack Hickish
With regards to the demux option, for the system you describe you want -d 2 (I.e. demux by = run the FPGA at half the sample rate, and process two samples in parallel on every FPGA clock cycle). Basically, provided you have the up to date ruby package, all you need to do is run adc16_init.rb with

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-09 Thread David MacMahon
Hi Vishwa, I am not at my computer right now, so this is from memory, but I think you want to specify an IP clock rate of 240 MHz and supply a 480 MHz clock to the ADC card(s). The IP clock rate is sometimes called the fabric clock rate. It is the rate at which the FPGA logic elements (aka

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-03-09 Thread Vishwa Seneviratne
Hi David/Jack, We are working on a beam former and we use the 'ADC16x250-8 coax rev 2' to sample RF signals using ROACH2-Rev 2. The operating BW is 240MHz. Thus, we need to sample the signals at 480 MSamples/s. We have few queries regarding the adc16 yellow block and how to setup the input clock.

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-02-03 Thread David MacMahon
What does "adc16_init.rb -h" show? What does "gem list adc16" show? Maybe you need a newer version of the adc16 code. Dave > On Feb 3, 2016, at 18:20, Vishwa Seneviratne wrote: > > Hi Jack, > > I'm thinking that the ruby script 'adc16_init.rb' does not identify the

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-02-03 Thread Vishwa Seneviratne
Hi Jack, I did try all the combinations. The error remains the same. $ adc16_init.rb -v --demux=1 192.168.10.5 poly_design.bof /var/lib/gems/1.9.1/gems/adc16-0.3.6/bin/adc16_init.rb:40:in `': invalid option: --demux=2 (OptionParser::InvalidOption) from /usr/local/bin/adc16_init.rb:19:in `load'

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-02-03 Thread Vishwa Seneviratne
Hi Jack, I'm thinking that the ruby script 'adc16_init.rb' does not identify the '--demux' parameter. I used the code at 'git:// github.com/david-macmahon/casper_adc16.git'. What can I do to set the parameter? Thank you Sincerely, *Vishwa Seneviratne* *Graduate Student* *Dept. of

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-02-03 Thread Vishwa Seneviratne
Hi Dave, Here is the output. vishwa@server3:~/Desktop/roach/poly$ adc16_init.rb -h Usage: adc16_init.rb [OPTIONS] HOSTNAME BOF Programs HOSTNAME with ADC16-based design BOF and then calibrates the serdes receivers. Options: -i, --iters=NNumber of snaps per tap [1]

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-02-03 Thread David MacMahon
Hi, Vishwa, The software installed by following the ADC16 user guide had not been updated with the newer version of the adc16 code that supports demux mode. I have updated the software that the user guide points to, so if you reinstall the adc16 gem as per the user guide you should get

Re: [casper] Working with demux modes of 'ADC16x250-8 coax rev 2'

2016-02-02 Thread Jack Hickish
Hi Vishwa, Is the syntax definitely -demux=1 andnot either --demux=1 or -d 1 ? Jack On Wed, 3 Feb 2016, 12:39 a.m. Vishwa Seneviratne wrote: > Hi, > > I am working on how to work with different operating of the 'ADC16x250-8 > coax rev 2' for a very simple design to