Hi Homin,
Both Jack and myself have worked on this and Jack seems to have found a fix
to get the QDRs working at any frequency!
Read this thread for more details about the issues we had
https://www.mail-archive.com/casper@lists.berkeley.edu/msg05924.html
This is an issue from when the board was
Dear All:
Recently i found out the locations I/O pins for qdr2/ROACH2 are not in the
same FPGA area.(from the Planahead/device map). Some of them are in the
left edge of the device, and some of them are in the middle of the device.
Is there someone experienced this problem and have constraints in
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