Re: [casper] PAPER Correlater's Corner Turner Modes and MIRIAD Channel Mapping

2022-11-26 Thread Dan Werthimer
hi wang, a bit more about the corner turner - you probably know about this, but just in case: for an FX correlator, there's an F engine for each antenna and each polarization to break the time domain signal into frequency channels. for large antenna arrays or large bandwidths, the correlation

[casper] The deadline to submit abstracts to URSI radio science meeting in Japan has been extended until 10 February

2023-01-25 Thread Dan Werthimer
*Submission Deadline Extension URSI GASS 2023* View this email in your browser *SUBMISSION DEADLINE EXTENSION* *for Regular Paper Submission, Young Scientist

[casper] abstracts due january 25, for URSI General Assembly in Japan August 023

2023-01-23 Thread Dan Werthimer
Dear CASPER collaborators, reminder, abstracts are due january 25: Danny Price, Andrew Van Der Byl, and I are organizing a session on "real-time processing for radio astronomy" for the International Union of Radio Science (URSI) general assembly in Sapporo, Japan, August 19-26, 2023.

Re: [casper] Convert from 100GbE QSFP28 at RFSoC4x2 to 10gbE sfp+

2023-07-19 Thread Dan Werthimer
hi parham, one way to do this would be to buy a switch with a 100Gbit port, and a 10Gbit port. but this would cost about $1K for the switch, and you'd need to purchase a pair of 100Gbit transceivers and cable. another way is to buy a 100Gbit NIC, and throw away your 10Gbit NIC, but this has a

[casper] casper instrumentation discovers gravitational waves constantly churn space and time

2023-06-29 Thread Dan Werthimer
dear casper collaboration, you might have read about the discovery of the stochastic background of gravitational waves. "the cosmic hum of gravitational waves". i'm appending some media coverage from yesterday and today, from science and the washington post. there's a live video public

Re: [casper] state of the art single bit correlators

2023-11-14 Thread Dan Werthimer
t; > > Altera (Intel) do the Stratix 10 GX with a maximum of 1152 LVDS pairs > running at 1.4 Gbps. > > > > Thanks, Neil > > > > *From:* casper@lists.berkeley.edu *On Behalf > Of *Dan Werthimer > *Sent:* 11 November 2023 21:30 > *To:* casper@lists.berkeley.

Re: [casper] state of the art single bit correlators

2023-11-11 Thread Dan Werthimer
hi neil, by number of receiver channels, i presume you mean number of antennas? are these single or dual polarization? how many spectral channels do you need in your correlator ? for a large number of spectral channels, you'll likely want to use an FX architecture correlator (not XF). in an FX

Re: [casper] state of the art single bit correlators

2023-11-11 Thread Dan Werthimer
with more LVDS inputs, but there's no market. best wishes, dan Dan Werthimer Astronomy Dept and Space Sciences Lab University of California, Berkeley On Sat, Nov 11, 2023 at 1:39 PM salmon.na via casper@lists.berkeley.edu < casper@lists.berkeley.edu> wrote: > Hi Dan, > > > >

Re: [casper] state of the art single bit correlators

2023-11-11 Thread Dan Werthimer
11, 2023 at 12:22 PM Dan Werthimer wrote: > > hi neil, > > by number of receiver channels, i presume you mean number of antennas? > are these single or dual polarization? > > how many spectral channels do you need in your correlator ? > > for a large number of spectra

Re: [casper] state of the art single bit correlators

2023-11-11 Thread Dan Werthimer
correlator would manage making the > cross-correlations of 512 single bit channels at 1 GbpS, on say a single > FPGA, Xilinx or Altera ? > > > > Cheers, > > Neil > > > > *From:* casper@lists.berkeley.edu *On Behalf > Of *Dan Werthimer > *Sent:* 11 No

Re: [casper] state of the art single bit correlators

2023-11-11 Thread Dan Werthimer
, 2^18 counters, and you'll also need 2^18 registers (for readout), assuming a 500 MHz clock. i think that will all fit into a giant FPGA, but it will be tight. i suggest you compile it and see. best wishes, dan Dan Werthimer Astronomy Dept and Space Sciences Lab University of California

Re: [casper] Regarding 32 channel ADC channel calibration in ROACH2

2024-03-18 Thread 'Dan Werthimer' via casper@lists.berkeley.edu
hi sivakumar, for low sample rate FFT's (where the FPGA clock = sample rate), i suggest you consider: fft_biplex_real_2x (Real-sampled Biplex FFT, with Output Demuxed by 2) fft_biplex_real_4x

Re: [casper] Regarding 32 channel ADC channel calibration in ROACH2

2024-03-18 Thread 'Dan Werthimer' via casper@lists.berkeley.edu
no? > > I am using ROACH2 revision 2 board. It has two 16 channel ADC cards. I > want to calibrate both the ADC cards at the same time. That’s why I > mentioned as 32 channel ADC calibration. > > Thank you. > > Sivasankar.S > > On Mon, Mar 18, 2024 at 11:10 PM 'Dan W

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