I'm using Zynq SOMs (System on a module) that will plug into a "base
board" (with hilrose connectors). It is the base board that will have
the "personality" of the emulator. The baseboard will be fairly simple
(level shifters, a small bit of logic and the drive interface
transceivers). So
Guy,
I agree that accessing data in blockram (synchronous with fixed latency) is
really easier than accessing it from RAM (asynchronous with variable latency).
Anyway I'm weighting the "cost" of additional complexity, which in change would
allow to spare on Zynq cost.
In any case memory access
