https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From 441f060fee2f624e1940f04ade9272cb50b0b33e Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/8] [Headers][X86] Enable constexpr handling for
MMX/
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From 441f060fee2f624e1940f04ade9272cb50b0b33e Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/8] [Headers][X86] Enable constexpr handling for
MMX/
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From 441f060fee2f624e1940f04ade9272cb50b0b33e Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/7] [Headers][X86] Enable constexpr handling for
MMX/
markbhasawut wrote:
Thanks for your time to review this! @RKSimon
https://github.com/llvm/llvm-project/pull/157464
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https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From 441f060fee2f624e1940f04ade9272cb50b0b33e Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/8] [Headers][X86] Enable constexpr handling for
MMX/
@@ -24,6 +24,7 @@ typedef float __m128_u __attribute__((__vector_size__(16),
__aligned__(1)));
/* Unsigned types */
typedef unsigned int __v4su __attribute__((__vector_size__(16)));
typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
+typedef unsigned char __v1
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From 441f060fee2f624e1940f04ade9272cb50b0b33e Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/6] [Headers][X86] Enable constexpr handling for
MMX/
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From 441f060fee2f624e1940f04ade9272cb50b0b33e Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/8] [Headers][X86] Enable constexpr handling for
MMX/
https://github.com/markbhasawut ready_for_review
https://github.com/llvm/llvm-project/pull/157464
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@@ -496,9 +496,8 @@ _mm256_andnot_si256(__m256i __a, __m256i __b)
/// \param __b
///A 256-bit integer vector.
/// \returns A 256-bit integer vector containing the result.
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_avg_epu8(__m256i __a, __m256i __b)
-{
+static
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From 70b779e23b1b0866e9bdd5ff2b2f6cc86feebd31 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/5] [Headers][X86] Enable constexpr handling for
MMX/
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From c30c57337978904f756031a173816c1cc238e958 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/3] [Headers][X86] Enable constexpr handling for
MMX/
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From c30c57337978904f756031a173816c1cc238e958 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/2] [Headers][X86] Enable constexpr handling for
MMX/
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/157464
>From d75f603b05f569173f198f852ac16e31bb4652c1 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Mon, 8 Sep 2025 15:51:33 +0700
Subject: [PATCH 1/2] [Headers][X86] Enable constexpr handling for
MMX/
https://github.com/markbhasawut created
https://github.com/llvm/llvm-project/pull/157464
This PR updates the avg builtins to support constant expression handling, by
extending the VectorExprEvaluator::VisitCallExpr that handles elementwise
integer binop builtins.
Closes #155390
>From 6a34a55
https://github.com/markbhasawut edited
https://github.com/llvm/llvm-project/pull/156833
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markbhasawut wrote:
> we still need to handle the mask/maskz variants in avx512vlintrin.h +
> avx512vlbwintrin.h
My bad, I forgot to add them. 😅
https://github.com/llvm/llvm-project/pull/156901
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markbhasawut wrote:
Thank you for reviewing! @RKSimon
https://github.com/llvm/llvm-project/pull/156901
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https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/156901
>From 2b91d9f709d8bfbeac5f1157d76945896f7dbfc3 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 4 Sep 2025 21:41:54 +0700
Subject: [PATCH 1/2] [Headers][X86] Allow AVX512 integer min/max mask/m
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/156901
>From 2b91d9f709d8bfbeac5f1157d76945896f7dbfc3 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 4 Sep 2025 21:41:54 +0700
Subject: [PATCH 1/2] [Headers][X86] Allow AVX512 integer min/max mask/m
https://github.com/markbhasawut ready_for_review
https://github.com/llvm/llvm-project/pull/156901
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https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/156901
>From 2b91d9f709d8bfbeac5f1157d76945896f7dbfc3 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 4 Sep 2025 21:41:54 +0700
Subject: [PATCH] [Headers][X86] Allow AVX512 integer min/max mask/maskz
https://github.com/markbhasawut created
https://github.com/llvm/llvm-project/pull/156833
Update the AVX2/AVX512 min/max integer intrinsics to be constexpr compatible.
This PR is a follow-up of #156678. The AVX512 mask/maskz variants will be in
the next follow-up.
Part of #153153.
>From 4bf6d
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/156901
>From 7147ee319ecbf309042c25b9483ba1fea9161778 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 4 Sep 2025 21:41:54 +0700
Subject: [PATCH] [Headers][X86] Allow AVX512 integer min/max mask/maskz
https://github.com/markbhasawut ready_for_review
https://github.com/llvm/llvm-project/pull/156722
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https://github.com/markbhasawut edited
https://github.com/llvm/llvm-project/pull/156833
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https://github.com/markbhasawut created
https://github.com/llvm/llvm-project/pull/156901
Update the AVX512 integer min/max mask/maskz variants intrinsics to be
constexpr compatible.
This is a follow-up to #156833, and the last in the 'Allow MMX/SSE/AVX2/AVX512
integer min/max intrinsics to be
https://github.com/markbhasawut ready_for_review
https://github.com/llvm/llvm-project/pull/156833
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markbhasawut wrote:
Thanks! @RKSimon
https://github.com/llvm/llvm-project/pull/156722
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https://github.com/markbhasawut created
https://github.com/llvm/llvm-project/pull/156722
This PR fixes #155411, add constexpr support for the AVX512F mullox intrinsics:
- _mm512_mullox_epi64
- _mm512_mask_mullox_epi64
Closes #156632.
>From c6d19e89ea5c4878cb04dd30bc410237a53646eb Mon Sep
markbhasawut wrote:
Thanks for reviewing! @RKSimon
https://github.com/llvm/llvm-project/pull/156678
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https://github.com/markbhasawut ready_for_review
https://github.com/llvm/llvm-project/pull/156678
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https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/156678
>From 5bdb914dc978150575a82f48e087f732f0e833ec Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Wed, 3 Sep 2025 20:44:26 +0700
Subject: [PATCH] [Headers][X86] Allow MMX/SSE integer min/max intrinsic
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/156678
>From b25aeee23673304b2b3c086805873f10eebdbf8e Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Wed, 3 Sep 2025 20:44:26 +0700
Subject: [PATCH] [Headers][X86] Allow MMX/SSE integer min/max intrinsic
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/156678
>From 803db31e6ef717e63ae7f5ad81ea823ec6a0e945 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Wed, 3 Sep 2025 20:44:26 +0700
Subject: [PATCH] [Headers][X86] Allow MMX/SSE integer min/max intrinsic
https://github.com/markbhasawut created
https://github.com/llvm/llvm-project/pull/156678
Update the MMX/SSE integer min/max intrinsics to be constexpr compatible.
This is a part of #153153.
>From 85ead561ec1522a673fe0d4bf55a3a9a7de13df6 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date:
https://github.com/markbhasawut created
https://github.com/llvm/llvm-project/pull/153060
While working on PR #152910, I discovered some incorrectly defined
`__DEFAULT_FN_ATTRS*_CONSTEXPR` macros for non-constexpr contexts.
>From 4924552f7b1c585a613943ab65050e73e6525bb4 Mon Sep 17 00:00:00 2001
https://github.com/markbhasawut ready_for_review
https://github.com/llvm/llvm-project/pull/152910
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@@ -13,12 +14,14 @@ __m128h test_mm_setzero_ph(void) {
// CHECK: zeroinitializer
return _mm_setzero_ph();
}
+TEST_CONSTEXPR(match_m128(_mm_setzero_ph(), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f,
+0.0f, +0.0f, +0.0f));
markbhasawut wrote:
Done.
https://github.co
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From e54e04113c97f9ebd877f45d39a5b1347d08d468 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/7] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From e54e04113c97f9ebd877f45d39a5b1347d08d468 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/7] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut converted_to_draft
https://github.com/llvm/llvm-project/pull/152910
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https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From e54e04113c97f9ebd877f45d39a5b1347d08d468 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/5] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
@@ -13,12 +14,14 @@ __m128h test_mm_setzero_ph(void) {
// CHECK: zeroinitializer
return _mm_setzero_ph();
}
+TEST_CONSTEXPR(match_m128(_mm_setzero_ph(), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f,
+0.0f, +0.0f, +0.0f));
markbhasawut wrote:
Ok, thanks for your advi
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/5] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/5] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/5] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/5] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/4] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut ready_for_review
https://github.com/llvm/llvm-project/pull/152910
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https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/4] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/4] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/3] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/152910
>From 2acdc563199b93b3a9f6d0a4ae4c8ef4f12d1c25 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan
Date: Thu, 7 Aug 2025 20:54:16 +0700
Subject: [PATCH 1/2] [Headers][X86] Allow AVX512 _mm512_set* intrinsics
https://github.com/markbhasawut created
https://github.com/llvm/llvm-project/pull/152910
This PR adds constexpr support for the following AVX512F/BW/FP16 set intrinsics:
- _mm512_set4_pd
- _mm512_set4_ps
- _mm512_set4_epi32
- _mm512_set4_epi64
- _mm512_set_pd
- _mm512_set_ps
- _m
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