[PATCH] D155081: Specify the developer policy around links to external resources

reames added inline comments. Comment at: llvm/docs/DeveloperPolicy.rst:349 -* If the patch has been reviewed, add a link to its review page, as shown - `here `_. aaron.ballman wrote: > reames

[PATCH] D155081: Specify the developer policy around links to external resources

reames added inline comments. Comment at: llvm/docs/DeveloperPolicy.rst:349 -* If the patch has been reviewed, add a link to its review page, as shown - `here `_. aaron.ballman wrote: >

[PATCH] D155081: Specify the developer policy around links to external resources

reames added inline comments. Comment at: llvm/docs/DeveloperPolicy.rst:349 -* If the patch has been reviewed, add a link to its review page, as shown - `here `_. Removing this item seems very

[PATCH] D157362: [RISCV] Add MC layer support for Zicfilp.

reames added inline comments. Comment at: llvm/docs/RISCVUsage.rst:120 ``Zicboz`` Assembly Support + ``Zicfilp`` Assembly Support ``Zicntr`` (`See Note <#riscv-i2p1-note>`__) This in the wrong place; this is not a ratified

[PATCH] D151730: [RISCV] Support target attribute for function

reames added a comment. In D151730#4491786 , @craig.topper wrote: > In D151730#4491773 , @jrtc27 wrote: > >> Isn't multiversioning a separate thing that builds on top of per-function >> target attributes? > >

[PATCH] D151730: [RISCV] Support target attribute for function

reames added a comment. FYI, this change appears to be a partial diff. Locally, I need to add RISCV to supportsMultiVersioning() to get this to work at all. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151730/new/

[PATCH] D151730: [RISCV] Support target attribute for function

reames added a comment. Can you separate the change to RISCVAsmPrinter.cpp into it's own review? This looks useful for any case where we have functions in the same model with different function attributes. The __attribute__((target...) syntax is one way to have that, but there are also

[PATCH] D149248: [RISCV][MC] MC layer support for the experimental zacas extension

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:3338 +unsigned Rs2 = Inst.getOperand(2).getReg(); +if (Rd % 2 == 1) { + SMLoc Loc =

[PATCH] D149495: [RISCV] Add support for V extension in SiFive7

reames added a comment. In D149495#4373796 , @michaelmaitland wrote: > In D149495#4373768 , @reames wrote: > >> Let's go ahead and land this as is, we can rework the stylistic pieces once >> the linked patches

[PATCH] D149495: [RISCV] Add support for V extension in SiFive7

reames added a comment. Let's go ahead and land this as is, we can rework the stylistic pieces once the linked patches land. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D149495/new/ https://reviews.llvm.org/D149495

[PATCH] D147612: [RISCV][MC] Add support for experimental Zvfbfwma extension

reames accepted this revision. reames added a comment. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147612/new/ https://reviews.llvm.org/D147612 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D147611: [RISCV][MC] Add support for experimental Zvfbfmin extension

reames accepted this revision. reames added a comment. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147611/new/ https://reviews.llvm.org/D147611 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D147610: [RISCV][MC] Add support for experimental Zfbfmin extension

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147610/new/ https://reviews.llvm.org/D147610 ___ cfe-commits mailing list

[PATCH] D149495: [RISCV] Add support for V extension in SiFive7

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM, thought please wait for other review feedback to settle. I am very very happy to have this upstream, thank you! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D149710: [RISCV] Add sifive-x280 processor with all of its extensions

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. Mechanically, this looks fine. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D149710/new/ https://reviews.llvm.org/D149710

[PATCH] D149314: [RISCV] Remove support for attribute interrupt("user").

reames added a comment. In D149314#4302300 , @aaron.ballman wrote: > In D149314#4302266 , @asb wrote: > >> In D149314#4302203 , >> @aaron.ballman wrote: >> >>> Is this

[PATCH] D148066: [RISCV] Add Smaia and Ssaia extensions support

reames added a comment. In D148066#4294924 , @kito-cheng wrote: >> My concern would be that as we don't gate CSR names on enabling the relevant >> extension, people could start using CSR names and encodings that could >> change, without opting in via

[PATCH] D149246: [RISCV] Relax rules for ordering s/z/x prefixed extensions in ISA naming strings

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. I generally think this is a good idea. I'd ask you add this to RISCVUsage under "The current known variances from the specification are", and mention it at the next sync up call, but

[PATCH] D148066: [RISCV] Add Smaia and Ssaia extensions support

reames added a comment. I would be fine landing this as experimental before ratification. I see no real downside to doing that, and would essentially leave it the judgement of the patch author as to whether just waiting until ratification or doing the extra work for staging as experimental is

[PATCH] D141672: [RISCV] Support vector crypto extension ISA string and assembly

reames added a comment. FYI, zvkb was discussed at the Architectural Review Committee this week and they've asked for some significant changes and expansions. See the notes shared here: https://lists.riscv.org/g/tech-unprivileged/message/450 I actively do not think we need to wait on landing

[PATCH] D146146: [Clang] Stop demoting ElementCount/TypeSize conversion errors to warnings.

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. This makes perfect sense to me. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146146/new/ https://reviews.llvm.org/D146146

[PATCH] D144914: [Clang][Driver] Add -mcpu=help to clang

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144914/new/ https://reviews.llvm.org/D144914

[PATCH] D144914: [Clang][Driver] Add -mcpu=help to clang

reames added a comment. Code and description appear out of sync. (help != list) Personally, I like the help naming a lot better. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144914/new/ https://reviews.llvm.org/D144914

[PATCH] D144288: [RISCV] Add missing plumbing and tests for zfa

This revision was automatically updated to reflect the committed changes. Closed by commit rG495b65348023: [RISCV] Add missing plumbing and tests for zfa (authored by reames). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144288/new/

[PATCH] D144288: [RISCV] Add missing plumbing and tests for zfa

reames updated this revision to Diff 498512. reames added a comment. Address review comment CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144288/new/ https://reviews.llvm.org/D144288 Files: clang/test/Preprocessor/riscv-target-features.c llvm/lib/Support/RISCVISAInfo.cpp

[PATCH] D144288: [RISCV] Add missing plumbing and tests for zfa

reames created this revision. reames added reviewers: craig.topper, asb, Joshua-401, kito-cheng, lbenes, jrtc27. Herald added subscribers: luke, VincentWu, vkmr, frasercrmck, jdoerfert, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o,

[PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG22e199e6afb1: [RISCV] Accept zicsr and zifencei command line options (authored by reames). Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options

reames added a comment. This was discussed at today's RISCV sync-up call. We have a large conversion pending on the topic of isa compatibility checking, but there was a consensus that this was reasonable and could move forward. I'm going to be landing this change in the near future.

[PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options

reames added a comment. We seem to have rough consensus here, but I'm going to wait roughly 24 hours before landing to give others time to comment. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D143953/new/ https://reviews.llvm.org/D143953

[PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options

reames updated this revision to Diff 497336. reames added a comment. Address @jrtc27's comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D143953/new/ https://reviews.llvm.org/D143953 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs/RISCVUsage.rst

[PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options

reames updated this revision to Diff 497328. reames edited the summary of this revision. reames added a comment. Add docs, and rework description. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D143953/new/ https://reviews.llvm.org/D143953 Files:

[PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options

reames added a comment. In D143953#4124649 , @jrtc27 wrote: > In D143953#4124636 , @reames wrote: > >> @jrtc27 Not sure if this changes your take, but I realized the variant being >> introduced is maybe much

[PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options

reames added a comment. @jrtc27 Not sure if this changes your take, but I realized the variant being introduced is maybe much less interesting than I'd first thought. We generally make no effort to make sure an extension was defined in the spec version corresponding to our base revision.

[PATCH] D143953: [RISCV] Accept zicsr and zifencei command line options

reames created this revision. reames added reviewers: asb, frasercrmck, kito-cheng, jrtc27, craig.topper. Herald added subscribers: luke, VincentWu, vkmr, jdoerfert, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck,

[PATCH] D141666: [RISCV] Proper support of extensions Zicsr and Zifencei

reames added a comment. JFYI, I have a change out which just documents current status while we wait for a resolution. https://reviews.llvm.org/D143924 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D141666/new/ https://reviews.llvm.org/D141666

[PATCH] D143507: [RISCV][MC] Mark Zawrs extension as non-experimental

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D143507/new/ https://reviews.llvm.org/D143507

[PATCH] D141672: [RISCV] Support vector crypto extension ISA string and assembly

reames added a comment. This was brought up in today's RISCV sync call; I want to summarize the major points of discussion. This patch is now behind the current most recent revision on the vector-crypto spec.

[PATCH] D142144: [RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=

reames added a comment. Generally supportive of having such an option, but going to defer to others on the review. I don't work enough on clang to have an opinion on code here. Comment at: clang/docs/ReleaseNotes.rst:844 take architecture extensions from ``-march`` if

[PATCH] D136817: [RISCV] Add H extension

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136817/new/ https://reviews.llvm.org/D136817

[PATCH] D138807: [RISCV] Support vector crypto extension ISA string and assembly

reames added a comment. Some very high level comments for the moment. Until the spec is frozen, these need to be moved into the experimental namespace. You should also add a mention of them under the experimental list in docs/RISCVUsage. A link to the current spec version - along with an

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG780c53984449: [RISCV] Implement assembler support for XVentanaCondOps (authored by reames). Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames updated this revision to Diff 474782. reames added a comment. Address comments from @craig.topper CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137350/new/ https://reviews.llvm.org/D137350 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs/RISCVUsage.rst

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames updated this revision to Diff 474620. reames added a comment. Address Kito's review comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137350/new/ https://reviews.llvm.org/D137350 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs/RISCVUsage.rst

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames updated this revision to Diff 473285. reames added a comment. Rebase CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137350/new/ https://reviews.llvm.org/D137350 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs/RISCVUsage.rst

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames updated this revision to Diff 473272. reames added a comment. Add a decoder namespace. I did one per vendor - i.e. used a Ventana table rather than a VentanaCondOps one. In theory, we could have a vendor who ships incompatible extensions (in two different pieces of hardware), but if we

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames updated this revision to Diff 473022. reames added a comment. Address review comments from @craig.topper CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137350/new/ https://reviews.llvm.org/D137350 Files: clang/test/Preprocessor/riscv-target-features.c

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames added a comment. In D137350#3906126 , @craig.topper wrote: > Do these need their own DecoderNameSpace? What is a decoder namespace? Some quick grepping and googling isn't very informative. Comment at:

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames updated this revision to Diff 473001. reames added a comment. Fix silly typo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137350/new/ https://reviews.llvm.org/D137350 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs/RISCVUsage.rst

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames added inline comments. Comment at: clang/test/Preprocessor/riscv-target-features.c:437 + +// RUN: %clang -target riscv64 -march=rv64ixventanacondops -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-XVENTANACONDOPS-EXT %s Naming wise, is

[PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps

reames created this revision. reames added reviewers: craig.topper, asb, frasercrmck, kito-cheng, jrtc27. Herald added subscribers: sunshaoce, VincentWu, StephenFan, vkmr, jdoerfert, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult,

[PATCH] D137280: [RISCV] Prevent autovectorization using vscale with Zvl32b.

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM I'm fine with this, but I thought we didn't support zve32f during compilation at all right now? Is this the only issue which needs fixed. Repository: rG LLVM Github Monorepo

[PATCH] D137266: [RISCV] Move RVVBitsPerBlock to TargetParser.h so we can use it in clang. NFC

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137266/new/ https://reviews.llvm.org/D137266

[PATCH] D136817: [RISCV] Add H extension

reames added inline comments. Comment at: llvm/docs/RISCVUsage.rst:54 ``F``Supported + ``H``Supported ``M``Supported If I'm reading the code right here, we only have assembly support here. Given that,

[PATCH] D136571: [RISCV] add svinval extension

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136571/new/ https://reviews.llvm.org/D136571

[PATCH] D136571: [RISCV] add svinval extension

reames added inline comments. Comment at: llvm/docs/RISCVUsage.rst:56 ``V``Supported + ``Svinval`` Assembly Support ``Zba`` Supported This table is sorted alphabetically, please move above V. Repository: rG LLVM

[PATCH] D136511: [RISCV][clang] Support RISC-V vectors in UninitializedValues.

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136511/new/ https://reviews.llvm.org/D136511

[PATCH] D136571: [RISCV] add svinval extension

reames added a comment. Please update https://llvm.org/docs/RISCVUsage.html#extensions It seems like we'd previously accept these instruction without the extension being explicitly named? If so, this is probably worth a release note to document the change in user behavior. Repository: rG

[PATCH] D136570: [RISCV] Add Svnapot extension

reames added a comment. https://llvm.org/docs/RISCVUsage.html#extensions needs to updated after this change. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136570/new/ https://reviews.llvm.org/D136570

[PATCH] D116735: [RISCV] Adjust RISCV data layout by using n32:64 in layout string

reames added a comment. Just want to note that I have no strong opinion on this patch. It doesn't seem unreasonable, and I'm comfortable with this being an empirically driven decision. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116735/new/

[PATCH] D136106: [clang][RISCV] Set vscale_range attribute based on VLEN

reames added a comment. In D136106#3863202 , @reames wrote: > In D136106#3863147 , @craig.topper > wrote: > >>> In the original review, I'd mentioned that MinVLEN was sometimes zero. >>> That's still true, but

[PATCH] D136106: [clang][RISCV] Set vscale_range attribute based on VLEN

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG9a8f3b113d05: [clang][RISCV] Set vscale_range attribute based on VLEN (authored by reames). Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D136106: [clang][RISCV] Set vscale_range attribute based on VLEN

reames updated this revision to Diff 468344. reames edited the summary of this revision. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136106/new/ https://reviews.llvm.org/D136106 Files: clang/lib/Basic/Targets/RISCV.cpp clang/test/CodeGen/riscv-vector-bits-vscale-range.c

[PATCH] D136106: [clang][RISCV] Set vscale_range attribute based on VLEN

reames added a comment. In D136106#3863147 , @craig.topper wrote: >> In the original review, I'd mentioned that MinVLEN was sometimes zero. >> That's still true, but apparently only happens if you specify multiple >> extensions in the -target_feature

[PATCH] D136106: [clang][RISCV] Set vscale_range attribute based on VLEN

reames created this revision. reames added a reviewer: craig.topper. Herald added subscribers: sunshaoce, VincentWu, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01,

[PATCH] D135894: [clang][RISCV] Set vscale_range attribute based on presence of "v" extension

This revision was automatically updated to reflect the committed changes. Closed by commit rG4467c781d7bb: [clang][RISCV] Set vscale_range attribute based on presence of v extension (authored by reames). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D135894: [clang][RISCV] Set vscale_range attribute based on presence of "v" extension

reames updated this revision to Diff 468239. reames added a comment. fix typo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D135894/new/ https://reviews.llvm.org/D135894 Files: clang/lib/Basic/Targets/RISCV.cpp clang/lib/Basic/Targets/RISCV.h

[PATCH] D107290: [RISCV] Add support for the vscale_range attribute

reames added a comment. Herald added subscribers: sunshaoce, StephenFan, arichardson. Herald added a project: All. Not knowing about this patch, I posted D135894 which addresses a small sub-set of this. If that goes in, I plan to iterative split off some

[PATCH] D135894: [clang][RISCV] Set vscale_range attribute based on presence of "v" extension

reames added a comment. In D135894#3856229 , @craig.topper wrote: > There's also this patch from @frasercrmck https://reviews.llvm.org/D107290 So there is; had not seen that. Looking at it, that patch seems to roll several items together. I'd

[PATCH] D135894: [clang][RISCV] Set vscale_range attribute based on presence of "v" extension

reames created this revision. reames added reviewers: asb, frasercrmck, craig.topper. Herald added subscribers: sunshaoce, VincentWu, ctetreau, StephenFan, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck,

[PATCH] D133863: [RISCV] Add MC support of RISCV zcmt Extension

reames added a comment. Please add to the review description a link to the appropriate specification. Please update docs/RISCVUsage.rst to add Zcmt, and link to the specification. It's impossible to review e.g. encoding without knowing what you're implementing. Comment

[PATCH] D133834: [RISCV] Remove support for the unratified Zbt extension.

reames accepted this revision. reames added a comment. LGTM as well. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D133834/new/ https://reviews.llvm.org/D133834 ___ cfe-commits mailing list

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

reames added a comment. In D133443#3801899 , @asb wrote: > It looks like they're still missing in this updated version of the patch? I have no idea what's going wrong here. I had been very careful to make sure the patch contained the new test file,

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rGeda2af575fdf: [RISCV][MC] Add support for experimental Zawrs extension (authored by reames). Changed prior to commit:

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

reames updated this revision to Diff 461345. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D133443/new/ https://reviews.llvm.org/D133443 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs/RISCVUsage.rst llvm/lib/Support/RISCVISAInfo.cpp

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

reames added a comment. In D133443#3795603 , @asb wrote: > Everything that's in this patch looks good to me - it's just missing some > simple round-trip tests in the style of rv32zicboz-valid.s (and perhaps an > -invalid.s that shows a sensible error

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

reames updated this revision to Diff 460447. reames added a comment. Add docs. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D133443/new/ https://reviews.llvm.org/D133443 Files: clang/test/Preprocessor/riscv-target-features.c llvm/docs/RISCVUsage.rst

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

reames added a comment. In D133443#3792627 , @asb wrote: > I think the summary of our discussion on this was: > > - The versioning confusion is unfortunate - ideally there would be discussion > elsewhere at RVI on improving the situation (either ELF

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

reames added a comment. In D133443#3790420 , @asb wrote: > The change in set of instructions without changing the version number is > concerning - do you know anyone involved in that group? It would be good to > feedback the difficulties this can cause

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

reames added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:709 + +let Predicates = [HasStdExtZawrs] in { +def WRS_NTO : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "wrs.nto", "">, jrtc27 wrote: > This doesn't really belong here, but a

[PATCH] D133443: [RISCV][MC] Add support for experimental Zawrs extension

reames created this revision. reames added reviewers: palmer-dabbelt, sunshaoce, craig.topper, kito-cheng, jrtc27, frasercrmck, asb, luismarques. Herald added subscribers: VincentWu, luke957, StephenFan, vkmr, jdoerfert, evandro, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei,

[PATCH] D133239: [RISCV][MC] Add minimal support for Ztso extension

This revision was automatically updated to reflect the committed changes. Closed by commit rGa4a29438f451: [RISCV][MC] Add minimal support for Ztso extension (authored by reames). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo

[PATCH] D132197: [RISCV] Use Triple::isRISCV/isRISCV32/isRISCV64 helps in some places. NFC

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM w/ optional comment. Comment at: clang/lib/Driver/ToolChains/Linux.cpp:741 getTriple().getArch() == llvm::Triple::thumbeb; - const bool

[PATCH] D131708: [RISCV] Change how mtune aliases are implemented.

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Comment at: clang/docs/ReleaseNotes.rst:197 + +- ``sifive-7-rv32`` and ``sifive-7-rv64`` are no longer supported for `-mcpu`. + Can you given any

[PATCH] D130311: [RISCV] Enable strict FP in clang as long as Zve* or V are not enabled.

reames added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:286 + // StrictFP support for vectors is incomplete. + if (ISAInfo->hasExtension("zve32x")) +HasStrictFP = false; craig.topper wrote: > reames wrote: > > craig.topper wrote: > > >

[PATCH] D130311: [RISCV] Enable strict FP in clang as long as Zve* or V are not enabled.

reames added a comment. In D130311#3691146 , @craig.topper wrote: > In D130311#3691029 , @reames wrote: > >> I'm not fluent on strict FP, so let me summarize my understanding. This is >> mostly so you can

[PATCH] D130311: [RISCV] Enable strict FP in clang as long as Zve* or V are not enabled.

reames added a comment. I'm not fluent on strict FP, so let me summarize my understanding. This is mostly so you can easily correct me if one my assumptions is wrong. - Under strict FP, clang will emit constrained fp intrinsics instead of normal floating point ops. - To my knowledge, clang

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

reames added a comment. This was very briefly discussed at today's sync up call. We were running short on time, so we didn't get a chance to talk through it, but there did seem to be a consensus that discussion on the interface implications was needed. This should hopefully be on the agenda

[PATCH] D126461: [RISCV] Extract and store new vl of vleff/vlsegff iff new_vl output pointer isn't null

reames added a comment. Ok, with the revised description, let me start anew in my response. I don't have any particular problem with this change. I do think it would be good to explicitly update the docs to indicate whether the param can be null or not, but given a) gcc has allowed it, and b)

[PATCH] D126461: [RISCV] Extract and store new vl of vleff/vlsegff iff new_vl output pointer isn't null

reames added a comment. @craig.topper Much clearer, thank you. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126461/new/ https://reviews.llvm.org/D126461 ___ cfe-commits mailing list

[PATCH] D126461: [RISCV] Extract and store new vl of vleff/vlsegff iff destination isn't null

reames added a comment. In D126461#3597862 , @craig.topper wrote: > `dst` in the patch description is not the pointer being loaded, it's the > pointer of where to store the new_vl. That is only thing being checked for > null in this patch. I agree

[PATCH] D126461: [RISCV] Extract and store new vl of vleff/vlsegff iff destination isn't null

reames requested changes to this revision. reames added a comment. This revision now requires changes to proceed. Despite the comments above, the purpose of this patch remains unclear. Per the draft spec, the relevant wording is: "These instructions execute as a regular load except that they

[PATCH] D125893: [RISCV][NFC] Change interface of RVVIntrinsic::getSuffixStr

reames accepted this revision. reames added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125893/new/ https://reviews.llvm.org/D125893

[PATCH] D125557: [APInt] Remove all uses of zextOrSelf, sextOrSelf and truncOrSelf

reames added a comment. Coming into this late, but I'd have preferred to see this separated into at least two pieces. One for each "non-obvious" adjustment, and one final one which just did the replace on the renaming sites. This differs from feedback from other reviewers above, so don't

[PATCH] D117091: [Clang] Add attributes alloc_size and alloc_align to mm_malloc

reames added a comment. In D117091#3265986 , @xbolva00 wrote: > Ping @reames Not qualified to review clang/c++ library semantic changes. Also, did we implement allocalign in LLVM? Last I knew it was a clang only attribute. If we did, it's missing

[PATCH] D115003: [funcattrs] Infer writeonly argument attribute [part 2]

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG0b09313cd533: [funcattrs] Infer writeonly argument attribute [part 2] (authored by reames). Changed prior to commit:

[PATCH] D115003: [funcattrs] Infer writeonly argument attribute [part 2]

reames added inline comments. Comment at: llvm/lib/Transforms/IPO/FunctionAttrs.cpp:728 + } else if (CB.hasFnAttr(Attribute::WriteOnly) || + CB.dataOperandHasImpliedAttr(UseIndex, Attribute::WriteOnly)) { +IsWrite = true; nikic

[PATCH] D115003: [funcattrs] Infer writeonly argument attribute [part 2]

reames updated this revision to Diff 397124. reames edited the summary of this revision. reames added a comment. Rework account for only being to infer on nocapture arguments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115003/new/ https://reviews.llvm.org/D115003 Files:

[PATCH] D115021: [funcatts] Rewrite callsite operand handling in memory access inference

reames abandoned this revision. reames added a comment. This has been replaced by a series of smaller patches implementing individual parts. The last of which - parameter attributes on indirect calls - is out for review as D116118 . Repository: rG LLVM

[PATCH] D115021: [funcatts] Rewrite callsite operand handling in memory access inference

reames added a comment. D115961 and D115964 were the next two pieces of this, both have now landed. The last bit is honoring call site parameter attributes on indirect calls outside the SCC. I'll post that separately and

[PATCH] D115916: [funcattrs] Consistently treat calling a function pointer as a non-capturing read

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG33cbaab1416b: [funcattrs] Consistently treat calling a function pointer as a non-capturing… (authored by reames). Herald added a project: clang.

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