https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/93064
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>From 1f5353d9539e42cbd6e7bd70d948041001373d2a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 23 May 2024 10:04:26 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/93064
>From e12473d466d7b354ecff0b8ea553b64d3059e1cf Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 23 May 2024 09:07:31 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/93064
>From 6096d6a7a672786807173f2cbe3c08beb1b9ad74 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 22 May 2024 16:11:04 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/93064
>From cc1b4f7ac1a4c0a827e843068547aa5c9748ca3e Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 22 May 2024 16:09:53 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/93064
>From 0ac36053bada98dc0f9e5eb2f3b215acc06b07a5 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 22 May 2024 16:06:51 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
@@ -2537,6 +2537,47 @@ static RValue
EmitHipStdParUnsupportedBuiltin(CodeGenFunction *CGF,
return RValue::get(CGF->Builder.CreateCall(UBF, Args));
}
+static void buildInstrinsicCallArgs(CodeGenFunction , const CallExpr *E,
shiltian wrote:
Yeah, no need of
@@ -19040,6 +19040,48 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
CGM.getIntrinsic(Intrinsic::amdgcn_s_sendmsg_rtn, {ResultType});
return Builder.CreateCall(F, {Arg});
}
+ case AMDGPU::BI__builtin_amdgcn_global_load_lds: {
+
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/93064
>From 630adf5665f6e030f924b8da864b139382c30dea Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 22 May 2024 12:51:42 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
@@ -19040,6 +19040,48 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
CGM.getIntrinsic(Intrinsic::amdgcn_s_sendmsg_rtn, {ResultType});
return Builder.CreateCall(F, {Arg});
}
+ case AMDGPU::BI__builtin_amdgcn_global_load_lds: {
+
@@ -19040,6 +19040,48 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
CGM.getIntrinsic(Intrinsic::amdgcn_s_sendmsg_rtn, {ResultType});
return Builder.CreateCall(F, {Arg});
}
+ case AMDGPU::BI__builtin_amdgcn_global_load_lds: {
+
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/93064
>From cf074221241e4d5c83426c58f70438fb592ca7ad Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 22 May 2024 12:36:33 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
@@ -19040,6 +19040,48 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
CGM.getIntrinsic(Intrinsic::amdgcn_s_sendmsg_rtn, {ResultType});
return Builder.CreateCall(F, {Arg});
}
+ case AMDGPU::BI__builtin_amdgcn_global_load_lds: {
+
@@ -19040,6 +19040,48 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
CGM.getIntrinsic(Intrinsic::amdgcn_s_sendmsg_rtn, {ResultType});
return Builder.CreateCall(F, {Arg});
}
+ case AMDGPU::BI__builtin_amdgcn_global_load_lds: {
+
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/93064
None
>From 0ed9d89d65277d5af2bad72ba7834fc0bebb7236 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 22 May 2024 12:19:49 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/92962
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>From 539c48a5a44392821547335bdfc3942cc03e1540 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 21 May 2024 18:26:25 -0400
Subject: [PATCH] [AMDGPU] Clang builtin for GLOBAL_LOAD_LDS on MI3XX
Fixes:
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/92962
>From a9e9fa27022738b6f7b8c5c2cbba0fb9900cd993 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 21 May 2024 18:25:38 -0400
Subject: [PATCH] [AMDGPU] Clang builtin for GLOBAL_LOAD_LDS on MI3XX
Fixes:
@@ -2466,23 +2466,24 @@ def int_amdgcn_perm :
// GFX9 Intrinsics
//===--===//
-class AMDGPUGlobalLoadLDS : Intrinsic <
- [],
- [LLVMQualPointerType<1>, // Base global pointer to load from
-
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/92962
>From 741d71e456825c156d4a34020c6f7d8f28e11a1d Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 21 May 2024 16:57:22 -0400
Subject: [PATCH] [AMDGPU] Clang builtin for GLOBAL_LOAD_LDS on MI3XX
Fixes:
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/92962
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>From 05044c94265e51f81967fd0ed783b4ed163bc003 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 21 May 2024 16:41:23 -0400
Subject: [PATCH] [AMDGPU] Clang builtin for GLOBAL_LOAD_LDS on MI3XX
Fixes:
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/92962
Fixes: SWDEV-459212
>From 5c342cbb389d32468695a925a6db3b42b09b15c4 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 21 May 2024 16:40:41 -0400
Subject: [PATCH] [AMDGPU] Clang builtin for GLOBAL_LOAD_LDS
shiltian wrote:
> > > > If `-march` is the wrong option then let's start deprecating it and
> > > > remove it altogether in the next llvm release. But, as long as it is
> > > > here, it should be equivalent to `--offload-arch`.
> > >
> > >
> > > Honestly not a bad idea. I could make a patch
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/92210
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https://github.com/llvm/llvm-project/pull/89567
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>From 041574d22c2debb5299926b58aed529919905902 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 22 Apr 2024 01:09:47 -0400
Subject: [PATCH] [Clang] Fix a crash introduced in PR#88666
The unroll value can
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/89567
>From 3503f2bfd28af5be8e87835c47207d770659db3c Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 22 Apr 2024 00:06:31 -0400
Subject: [PATCH] [Clang] Fix a crash introduced in PR#88666
The unroll value can
shiltian wrote:
@alexfh @ronlieb @Endilll fix in
https://github.com/llvm/llvm-project/pull/89567.
https://github.com/llvm/llvm-project/pull/88666
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The unroll value can be a template variable such that we need to check it before
we verify if it is constant value.
>From 8f14bcc2ea3d4badb63b953dc23b27b49b0a6521 Mon Sep 17 00:00:00 2001
From: Shilei Tian
shiltian wrote:
How about `llvm.offload`? This might need broader discussion but I'm fine
either way.
https://github.com/llvm/llvm-project/pull/88071
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https://github.com/shiltian approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/88007
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@@ -16,4 +16,12 @@ typedef unsigned __INTPTR_TYPE__ uintptr_t;
#error Every target should have __INTPTR_TYPE__
#endif
+#ifdef __INTPTR_MAX__
+#define INTPTR_MAX__INTPTR_MAX__
+#endif
+
+#ifdef __UINTPTR_MAX__
+#define UINTPTR_MAX __UINTPTR_MAX__
+#endif
+
@@ -10,12 +10,19 @@
include(ExtendPath)
+# The generated headers will be placed in clang's resource directory if
present.
+if(${OPENMP_STANDALONE_BUILD})
+ set(LIBOMP_HEADERS_INTDIR ${CMAKE_CURRENT_BINARY_DIR})
+else()
+ set(LIBOMP_HEADERS_INTDIR
@@ -10,12 +10,19 @@
include(ExtendPath)
+# The generated headers will be placed in clang's resource directory if
present.
+if(${OPENMP_STANDALONE_BUILD})
+ set(LIBOMP_HEADERS_INTDIR ${CMAKE_CURRENT_BINARY_DIR})
+else()
+ set(LIBOMP_HEADERS_INTDIR
https://github.com/shiltian approved this pull request.
LG
https://github.com/llvm/llvm-project/pull/87695
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@@ -4791,6 +4791,9 @@ void OpenMPIRBuilder::writeTeamsForKernel(const Triple
, Function ,
updateNVPTXMetadata(Kernel, "maxclusterrank", UB, true);
updateNVPTXMetadata(Kernel, "minctasm", LB, false);
}
+ if (T.isAMDGPU()) {
shiltian wrote:
shiltian wrote:
I'm not familiar with that section of code. Maybe @jdoerfert could give you
more insights.
https://github.com/llvm/llvm-project/pull/86457
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shiltian wrote:
> > > > Do you want to rename intrinsics as well? Because now intrinsic names
> > > > do not match builtin names.
> > >
> > >
> > > Do we have to match builtins with intrinsics? Renaming intrinsics here
> > > means we will have to duplicate the intrinsics.
> >
> >
> > Is
@@ -432,13 +432,15 @@ TARGET_BUILTIN(__builtin_amdgcn_s_wakeup_barrier, "vi",
"n", "gfx12-insts")
TARGET_BUILTIN(__builtin_amdgcn_s_barrier_leave, "b", "n", "gfx12-insts")
TARGET_BUILTIN(__builtin_amdgcn_s_get_barrier_state, "Uii", "n", "gfx12-insts")
@@ -0,0 +1,8 @@
+// RUN: %clang_cc1 -emit-obj -verify -fopenmp %s
shiltian wrote:
You can use `-emit-llvm` instead.
https://github.com/llvm/llvm-project/pull/84135
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@@ -0,0 +1,8 @@
+// RUN: %clang_cc1 -emit-obj -verify -fopenmp %s
shiltian wrote:
`emit-obj` is not needed
https://github.com/llvm/llvm-project/pull/84135
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https://github.com/shiltian approved this pull request.
LG with one nit
https://github.com/llvm/llvm-project/pull/84135
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https://github.com/llvm/llvm-project/pull/82044
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>From a769826f1ff424dab5377fff249bfdd1465633bb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 19 Feb 2024 23:06:14 -0500
Subject: [PATCH] [AMDGPU] Fix operand types for `V_DOT2_F32_BF16`
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/82044
>From c78fe7c5e3de222539d6ac324fedf55e0d01d321 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 19 Feb 2024 22:52:26 -0500
Subject: [PATCH] [AMDGPU] Fix operand types for `V_DOT2_F32_BF16`
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/82044
>From b964fee8219e655d3c7df34cd01e5650ae357f6b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 16 Feb 2024 17:49:23 -0500
Subject: [PATCH] [AMDGPU] Fix operand types for `V_DOT2_F32_BF16`
---
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/80908
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>From 5b66bb22a91690078a955cea6c02b6b746b6502b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 16 Feb 2024 15:08:35 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/80908
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@@ -0,0 +1,8 @@
+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1200 -show-encoding %s | FileCheck %s
+
+v_dot2_bf16_bf16 v5, v1, v2, 100.0
+// CHECK: v_dot2_bf16_bf16 v5, v1, v2, 0x42c8 ; encoding:
@@ -157,6 +157,27 @@ static uint32_t getLit16Encoding(uint16_t Val, const
MCSubtargetInfo ) {
return 255;
}
+static uint32_t getLitBF16Encoding(uint16_t Val) {
+ uint16_t IntImm = getIntInlineImmEncoding(static_cast(Val));
+ if (IntImm != 0)
+return IntImm;
+
+ //
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From d95e99ebcefa76ba2e8068f663be86340c14ab5b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 16 Feb 2024 11:29:47 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/80908
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shiltian wrote:
IMHO I prefer to ask/request users to do the right thing. Vendors are totally
free to do whatever to be convenient for their customers via their compiler
wrappers/drivers, but for the community version, following the convention would
be good.
shiltian wrote:
I'll create a ticket about the decoder.
https://github.com/llvm/llvm-project/pull/80908
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>From 9fbb1e610b0de65ae51bb90bd35146b5f927a46a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 15 Feb 2024 19:13:44 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From 784670dd98c3727d8d8aa25f865b7b299f114bf4 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 14 Feb 2024 13:11:01 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/81669
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https://github.com/llvm/llvm-project/pull/80908
>From 1488b4e54982be4d3f5bc7f35617effcab52be48 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 14 Feb 2024 09:41:00 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
shiltian wrote:
> Don't see how that could be related; you can losslessly bitconvert between
> i16 and bfloat
Yes, `canLosslesslyBitCastTo` doesn't allow cast between `i16` and `bfloat`,
but it does between two vectors, as long as their sizes are the same.
> A cast between float and int
shiltian wrote:
> I can't tell what you're trying to fix here. Is this fixing a crash? Or is
> the check redundant? Or is it necessary for some followup change you want to
> make?
Sorry, I should have clearly mentioned that. Yes, it is for my followup change
#80908. In #80908, we changed the
@@ -0,0 +1,8 @@
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s |
FileCheck %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -disassemble -show-encoding < %s |
FileCheck %s
+
+# CHECK: v_dot2_bf16_bf16 v5, v1, v2, 0x42c8
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From 7a517eeab81b45616dd7a1511380f4696304375a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 13 Feb 2024 21:59:52 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From 47b96d282d5416f9dd4c41013d44f8865a1a0d31 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 13 Feb 2024 21:34:44 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
@@ -4185,9 +4185,17 @@ bool SIInstrInfo::isInlineConstant(const MachineOperand
,
case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
case AMDGPU::OPERAND_REG_INLINE_AC_V2FP16:
return AMDGPU::isInlinableLiteralV2F16(Imm);
+ case AMDGPU::OPERAND_REG_IMM_V2BF16:
+ case
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From 22fd628687652e7f9d8795c48e9f794fdd684c45 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 13 Feb 2024 21:27:17 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From d72bf8bb9d1091ba76e17bf09b0aad9073e18caa Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 13 Feb 2024 19:02:41 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
@@ -4185,9 +4185,17 @@ bool SIInstrInfo::isInlineConstant(const MachineOperand
,
case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
case AMDGPU::OPERAND_REG_INLINE_AC_V2FP16:
return AMDGPU::isInlinableLiteralV2F16(Imm);
+ case AMDGPU::OPERAND_REG_IMM_V2BF16:
+ case
@@ -488,6 +488,49 @@ static bool printImmediateFloat16(uint32_t Imm, const
MCSubtargetInfo ,
return true;
}
+static bool printImmediateBFloat16(uint32_t Imm, const MCSubtargetInfo ,
+ raw_ostream ) {
+ if (Imm == 0x3F80)
+O << "1.0";
@@ -2819,11 +2819,11 @@ def int_amdgcn_fdot2_f16_f16 :
def int_amdgcn_fdot2_bf16_bf16 :
ClangBuiltin<"__builtin_amdgcn_fdot2_bf16_bf16">,
DefaultAttrsIntrinsic<
-[llvm_i16_ty], // %r
+[llvm_bfloat_ty], // %r
shiltian wrote:
The cast will be
https://github.com/shiltian edited
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@@ -1,8 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s |
FileCheck %s --check-prefixes=GFX11,SDAG-GFX11
-; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From bfd3170dc5e4d6e53fb98b46b37f2bf3c3ebf86d Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 13 Feb 2024 17:39:23 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
@@ -79,17 +79,17 @@ define amdgpu_ps void @test_llvm_amdgcn_fdot2_bf16_bf16_sis(
; GFX11: ; %bb.0: ; %entry
; GFX11-NEXT:v_mov_b32_e32 v2, s1
; GFX11-NEXT:s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT:v_dot2_bf16_bf16 v2, s0, 0x10001, v2
+; GFX11-NEXT:
shiltian wrote:
The patch is in a good shape now. I have made two other prime patches (#81674
and #81669). I'll rebase this one once they are landed.
This patch only changes one bf16 instruction with the necessary infrastructure
for others. I'll update all of them once this patch is landed.
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/81669
This patch looses the cast check (`canLosslesslyBitCastTo`) and leaves it to the
one inside `CreateBitCast`. It seems too conservative for the use case here.
>From 813441fd3106a0069346aabd0dd828d8feb8ea53 Mon
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From c556e40c13adb9d253ef7c5ebb2b46cb12969d46 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 13 Feb 2024 15:30:51 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
https://github.com/shiltian approved this pull request.
LG
https://github.com/llvm/llvm-project/pull/81331
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From df3dbb6b9c257157c4afb407e40447a25c27a2a8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 12 Feb 2024 18:03:57 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
@@ -2660,15 +2660,34 @@ bool isInlinableLiteral16(int16_t Literal, bool
HasInv2Pi) {
return true;
uint16_t Val = static_cast(Literal);
- return Val == 0x3C00 || // 1.0
- Val == 0xBC00 || // -1.0
- Val == 0x3800 || // 0.5
- Val == 0xB800 || //
@@ -2730,6 +2749,12 @@ std::optional getInlineEncodingV2I16(uint32_t
Literal) {
return getInlineEncodingV216(false, Literal);
}
+// Encoding of the literal as an inline constant for a V_PK_*_BF16 instruction
+// or nullopt.
+std::optional getInlineEncodingV2BF16(uint32_t
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/80908
>From 4196e998349d663a9a9922937cc4bedbec95fe5f Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 12 Feb 2024 13:48:39 -0500
Subject: [PATCH] [RFC][WIP][AMDGPU] Use `bf16` instead of `i16` for bfloat
@@ -79,17 +79,17 @@ define amdgpu_ps void @test_llvm_amdgcn_fdot2_bf16_bf16_sis(
; GFX11: ; %bb.0: ; %entry
; GFX11-NEXT:v_mov_b32_e32 v2, s1
; GFX11-NEXT:s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT:v_dot2_bf16_bf16 v2, s0, 0x10001, v2
+; GFX11-NEXT:
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/81331
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@@ -312,6 +312,12 @@ void IntrinsicLowering::LowerIntrinsicCall(CallInst *CI) {
CI->replaceAllUsesWith(ConstantInt::get(Type::getInt64Ty(Context), 0));
break;
}
+ case Intrinsic::readfixedtimer: {
+errs() << "WARNING: this target does not support the
https://github.com/shiltian commented:
Generally looks good to me. Just not sure about the name. "fixed timer" sounds
pretty confusing to me. probably `readfixedfreqtimer`?
https://github.com/llvm/llvm-project/pull/81331
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@@ -4181,13 +4181,20 @@ bool SIInstrInfo::isInlineConstant(const MachineOperand
,
case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
case AMDGPU::OPERAND_REG_INLINE_AC_V2INT16:
return AMDGPU::isInlinableLiteralV2I16(Imm);
+ case AMDGPU::OPERAND_REG_IMM_V2BF16:
@@ -5908,8 +5908,6 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
}
}
-assert(ArgValue->getType()->canLosslesslyBitCastTo(PTy) &&
shiltian wrote:
This change might need to go to a separate
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/80908
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@@ -0,0 +1,8 @@
+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1200 -show-encoding %s | FileCheck %s
+
+v_dot2_bf16_bf16 v5, v1, v2, 100.0
shiltian wrote:
The two instructions are from #79369
https://github.com/shiltian ready_for_review
https://github.com/llvm/llvm-project/pull/80908
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https://github.com/llvm/llvm-project/pull/80908
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