[PATCH] D46892: [X86] Lowering addus/subus intrinsics to native IR (Clang part)

This revision was automatically updated to reflect the committed changes. Closed by commit rC339651: [X86] Lowering addus/subus intrinsics to native IR (authored by tkrupa, committed by ). Changed prior to commit: https://reviews.llvm.org/D46892?vs=159461=160523#toc Repository: rC Clang

[PATCH] D46892: [X86] Lowering adds/addus/subs/subus intrinsics to native IR (Clang part)

tkrupa updated this revision to Diff 159461. tkrupa added a comment. Removed signed intrinsics lowering due to the pattern being too complicated - instead some minor optimizations were introduced on LLVM side. Repository: rC Clang https://reviews.llvm.org/D46892 Files:

[PATCH] D48288: Fix a bug introduced by rL334850

This revision was automatically updated to reflect the committed changes. Closed by commit rC334964: Fix a bug introduced by rL334850 (authored by tkrupa, committed by ). Changed prior to commit: https://reviews.llvm.org/D48288?vs=151742=151752#toc Repository: rC Clang

[PATCH] D48288: Fix a bug introduced by rL334850

tkrupa created this revision. tkrupa added a reviewer: itaraban. Herald added a subscriber: cfe-commits. All *_sqrt_round_s[s|d] intrinsics should execute a square root on zeroth element from B (Ops[1]) and insert in to A (Ops[0]), not the other way around. Repository: rC Clang

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rL334850: [X86] Lowering sqrt intrinsics to native IR (authored by tkrupa, committed by ). Herald added a subscriber:

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa updated this revision to Diff 151382. tkrupa added a comment. Fixed rounding mode calls. Repository: rC Clang https://reviews.llvm.org/D41168 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-builtins.c test/CodeGen/avx512f-builtins.c test/CodeGen/avx512vl-builtins.c

[PATCH] D47979: [X86] Lowering Mask Scalar add/sub/mul/div intrinsics to native IR (Clang part)

This revision was automatically updated to reflect the committed changes. Closed by commit rC334741: [X86] Lowering Mask Scalar intrinsics to native IR (Clang part) (authored by tkrupa, committed by ). Changed prior to commit: https://reviews.llvm.org/D47979?vs=150617=151381#toc Repository:

[PATCH] D47979: [X86] Lowering Mask Scalar add/sub/mul/div intrinsics to native IR (Clang part)

tkrupa added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:9926 +Value *Div = Builder.CreateFDiv(A, B); +llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), + cast(Mask->getType())->getBitWidth());

[PATCH] D47979: [X86] Lowering Mask Scalar add/sub/mul/div intrinsics to native IR (Clang part)

tkrupa created this revision. tkrupa added reviewers: craig.topper, RKSimon, spatel, sroland. Herald added a subscriber: cfe-commits. I did the div differently because it got split to three basic blocks with a branch condition (due to div being an expensive operation) and couldn't be combined

[PATCH] D47724: [X86] Add back _mask, _maskz, and _mask3 builtins for some 512-bit fmadd/fmsub/fmaddsub/fmsubadd builtins.

tkrupa accepted this revision. tkrupa added a comment. This revision is now accepted and ready to land. LGTM Repository: rC Clang https://reviews.llvm.org/D47724 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D47724: [X86] Add back _mask, _maskz, and _mask3 builtins for some 512-bit fmadd/fmsub/fmaddsub/fmsubadd builtins.

tkrupa added inline comments. Comment at: lib/Sema/SemaChecking.cpp:2388 + case X86::BI__builtin_ia32_vfmaddsubps512_maskz: + case X86::BI__builtin_ia32_vfmaddsubps512_mask3: ArgNum = 4; vfmsubps512_mask3, vfmsubpd512_mask3, vfmsubaddps512_mask3 and

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa updated this revision to Diff 149693. tkrupa added a comment. Removed CHECK-NOTs for consistency. Repository: rC Clang https://reviews.llvm.org/D41168 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-builtins.c test/CodeGen/avx512f-builtins.c test/CodeGen/avx512vl-builtins.c

[PATCH] D46892: [X86] Lowering adds/addus/subs/subus intrinsics to native IR (Clang part)

tkrupa updated this revision to Diff 149420. Repository: rC Clang https://reviews.llvm.org/D46892 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx2-builtins.c test/CodeGen/avx512bw-builtins.c test/CodeGen/avx512vlbw-builtins.c test/CodeGen/sse2-builtins.c Index:

[PATCH] D46892: [X86] Lowering adds/addus/subs/subus intrinsics to native IR (Clang part)

tkrupa added a comment. Whoops, that's a wrong revision. I'll revert it shortly. Repository: rC Clang https://reviews.llvm.org/D46892 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa updated this revision to Diff 149419. tkrupa added a comment. Added missing scalar intrinsics without rounding. Repository: rC Clang https://reviews.llvm.org/D41168 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-builtins.c test/CodeGen/avx512f-builtins.c

[PATCH] D46892: [X86] Lowering adds/addus/subs/subus intrinsics to native IR (Clang part)

tkrupa updated this revision to Diff 149417. tkrupa added a comment. Added missing scalar intrinsics without rounding. Repository: rC Clang https://reviews.llvm.org/D46892 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-builtins.c test/CodeGen/avx512f-builtins.c

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa added a comment. Mask scalar case is closed and doesn't have any effects on this revision. Besides, I resolved issues connected to lowering scalar sqrt intrinsics without rounding (that is, if https://reviews.llvm.org/D47621 is accepted). Should I add them here to have everything sqrt

[PATCH] D46892: [X86] Lowering adds/addus/subs/subus intrinsics to native IR (Clang part)

tkrupa created this revision. Herald added a subscriber: cfe-commits. tkrupa added reviewers: craig.topper, RKSimon, spatel. This is the patch that lowers x86 intrinsics to native IR in order to enable optimizations. Corresponding LLVM part: https://reviews.llvm.org/D46179 Previous

[PATCH] D46742: [X86] Use __builtin_convertvector to replace some of the avx512 truncate builtins.

tkrupa added a comment. Nevermind - these four are not strictly truncating. Sorry for the confusion. Repository: rC Clang https://reviews.llvm.org/D46742 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D46742: [X86] Use __builtin_convertvector to replace some of the avx512 truncate builtins.

tkrupa added a comment. There are four other similar intrinsics which convert to 128/256-bit vectors: __m128i _mm256_cvtepi32_epi8 (__m256i a) __m128i _mm256_cvtepi64_epi16 (__m256i a) __m128i _mm256_cvtepi64_epi8 (__m256i a) __m128i _mm512_cvtepi64_epi8 (__m512i a) Can you also include them?

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa added a comment. I'll wait with upstreaming this patch until there's an agreement on mask scalar approach. Repository: rC Clang https://reviews.llvm.org/D41168 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa updated this revision to Diff 140937. tkrupa added a comment. I did the suggested corrections and improved the tests. Repository: rC Clang https://reviews.llvm.org/D41168 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-builtins.c test/CodeGen/avx512f-builtins.c

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa marked 4 inline comments as done. tkrupa added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:8901 } - + case X86::BI__builtin_ia32_sqrtsd_round_mask: + case X86::BI__builtin_ia32_sqrtss_round_mask: { craig.topper wrote: > What about

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa updated this revision to Diff 140409. tkrupa added a comment. Removed renaming of the builtins (also in corresponding llvm patch). Repository: rC Clang https://reviews.llvm.org/D41168 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-builtins.c test/CodeGen/avx512f-builtins.c

[PATCH] D41168: [X86] Lowering X86 avx512 sqrt intrinsics to IR

tkrupa commandeered this revision. tkrupa added a reviewer: uriel.k. tkrupa added a comment. I was assigned to finish this task. https://reviews.llvm.org/D41168 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D44786: Lowering x86 adds/addus/subs/subus intrinsics (clang)

tkrupa updated this revision to Diff 140401. Repository: rC Clang https://reviews.llvm.org/D44786 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx2-builtins.c test/CodeGen/avx512bw-builtins.c test/CodeGen/avx512vlbw-builtins.c test/CodeGen/sse2-builtins.c Index:

[PATCH] D44786: Lowering x86 adds/addus/subs/subus intrinsics (clang)

tkrupa updated this revision to Diff 140244. Repository: rC Clang https://reviews.llvm.org/D44786 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx2-builtins.c test/CodeGen/avx512bw-builtins.c test/CodeGen/avx512vlbw-builtins.c test/CodeGen/sse2-builtins.c Index:

[PATCH] D44786: Lowering x86 adds/addus/subs/subus intrinsics (clang)

tkrupa marked 3 inline comments as done. tkrupa added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:7897 + Value *MaxVec = CGF.Builder.CreateVectorSplat(NumElements, Max); + Value *ExtMaxVec = Signed ? CGF.Builder.CreateSExt(MaxVec, ExtType) +