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Closed by commit rG352453569b2b: [AARCH64] ssbs should be enabled by default
for cortex-x1, cortex-x1c, cortex… (authored by stuij).
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rG LLVM Github Monor
amilendra added a comment.
LGTM.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D121206/new/
https://reviews.llvm.org/D121206
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amilendra added inline comments.
Comment at: llvm/lib/Target/AArch64/AArch64.td:978
FeatureNEON, FeatureRCPC, FeaturePerfMon,
FeatureSPE, FeatureFullFP16, FeatureDotProd];
list X1C = [HasV8_2aOps, FeatureCryp
stuij marked 2 inline comments as done.
stuij added inline comments.
Comment at: llvm/lib/Target/AArch64/AArch64.td:978
FeatureNEON, FeatureRCPC, FeaturePerfMon,
FeatureSPE, FeatureFullFP16, FeatureDotProd];
l
amilendra accepted this revision.
amilendra added inline comments.
This revision is now accepted and ready to land.
Comment at: llvm/lib/Target/AArch64/AArch64.td:978
FeatureNEON, FeatureRCPC, FeaturePerfMon,
Fea
stuij marked 2 inline comments as done.
stuij added inline comments.
Comment at: clang/test/Preprocessor/aarch64-target-features.c:288
// CHECK-MCPU-CORTEX-A73: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"
"-target-feature" "+v8a" "-target-feature" "+fp-armv8" "-target-feature"
"+ne