[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

kmclaughlin added a comment. Thanks for reviewing this, @sdesmalen & @efriedma! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74912/new/ https://reviews.llvm.org/D74912 ___ cfe-commits mailing list

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

This revision was automatically updated to reflect the committed changes. Closed by commit rG9c859fc54d92: [AArch64][SVE] Add SVE2 intrinsics for bit permutation table lookup (authored by kmclaughlin). Changed prior to commit: https://reviews.llvm.org/D74912?vs=246487=246661#toc Repository:

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

efriedma accepted this revision. efriedma added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74912/new/ https://reviews.llvm.org/D74912 ___ cfe-commits mailing list

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

kmclaughlin updated this revision to Diff 246487. kmclaughlin added a comment. Addressed review comments: - Removed SelectTableSVE2 from AArch64ISelDAGToDAG.cpp and added tablegen patterns for the tbl2 intrinsic - Updated tests to use operands that are not consecutive to ensure that the result

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

efriedma added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:1220 +void AArch64DAGToDAGISel::SelectTableSVE2(SDNode *N, unsigned Opc) { + SDLoc DL(N); Is it possible to write this as a TableGen pattern? We manage for other

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

sdesmalen added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:1226 + // intrinsic currently, where NumVecs is always 2 + unsigned NumVecs = 2; + nit: You can just as well inline this value now. Comment at:

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

kmclaughlin marked 4 inline comments as done. kmclaughlin added a comment. Thanks for reviewing this, @andwar! Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:2035 + +def int_aarch64_sve_bdep_x : AdvSIMD_2VectorArg_Intrinsic; +def int_aarch64_sve_bext_x :

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

kmclaughlin updated this revision to Diff 245835. kmclaughlin added a comment. - Removed NumVecs parameter from SelectTableSVE2 as the value is always the same (2) - Removed unnecessary -asm-verbose=0 from the RUN line of sve2-intrinsics-bit-permutation.ll CHANGES SINCE LAST ACTION

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

andwar added a comment. Cheers for working on this @kmclaughlin! Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:2035 + +def int_aarch64_sve_bdep_x : AdvSIMD_2VectorArg_Intrinsic; +def int_aarch64_sve_bext_x : AdvSIMD_2VectorArg_Intrinsic; What does `_x`

[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup

kmclaughlin created this revision. kmclaughlin added reviewers: sdesmalen, andwar, dancgr, cameron.mcinally, efriedma. Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: LLVM. Implements the following