[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

dnsampaio added a comment. In D75169#1952159 , @pratlucas wrote: > > Why not just make half as an argument do the right thing for that case? > > That would be the ideal approach, but currently there's a limitation on the > backend's calling convention

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

pratlucas added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75169/new/ https://reviews.llvm.org/D75169 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

pratlucas added a comment. Herald added a subscriber: danielkiss. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75169/new/ https://reviews.llvm.org/D75169 ___ cfe-commits mailing list

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

pratlucas added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75169/new/ https://reviews.llvm.org/D75169 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

pratlucas added a comment. > Why not just make half as an argument do the right thing for that case? That would be the ideal approach, but currently there's a limitation on the backend's calling convention lowering that gets in the way. The lowering of calls in `SelectionDAGBuilder` includes a

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

rudkx resigned from this revision. rudkx added a comment. I did some refactoring here years ago but I'm not that familiar with the ABIs or the handling in clang. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75169/new/

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

rjmccall added a comment. In D75169#1928696 , @pratlucas wrote: > > Oh, wait, AAPCS wants half values to be passed in the *least* significant > > bits of a GPR, even on big-endian machines? That's certainly more > > convenient, but it's a weird

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

pratlucas added a comment. > Oh, wait, AAPCS wants half values to be passed in the *least* significant > bits of a GPR, even on big-endian machines? That's certainly more convenient, > but it's a weird inconsistency with the otherwise iron rule of the calling > convention, which that it's

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

rjmccall added a comment. In D75169#1926545 , @pratlucas wrote: > Hi @rjmccall, > I agree those kind of tweaks do not look good. The issue here, though, is > that argument coercion currently ignores the target's endian information when > performing

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

pratlucas added a comment. Hi @rjmccall, I agree those kind of tweaks do not look good. The issue here, though, is that argument coercion currently ignores the target's endian information when performing coercion through memory. This happens for any type that requires memory coercion, so

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

rjmccall added a comment. Ugh. I'd hate to introduce yet another weird little tweak to `ABIArgInfo` that's used on exactly one target. For 16-bit composite types, we seem to coerce to a type like `[1 x i32]`; would that be okay here? You don't have a test that checks that you get the IR you

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

lattner resigned from this revision. lattner added a comment. I'm not a qualified reviewer for this at this point. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75169/new/ https://reviews.llvm.org/D75169

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

pratlucas added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75169/new/ https://reviews.llvm.org/D75169 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

pratlucas created this revision. Herald added subscribers: cfe-commits, kristof.beyls. Herald added a project: clang. Half-precision floating point arguments and returns are currently promoted to either float or int32 in clang's CodeGen. As such promotions are implemented as coercion through