[clang] 90dc78b - [ARM, MVE] Add intrinsics for abs, neg and not operations.

[Simon Tatham via cfe-commits]

Author: Simon Tatham
Date: 2020-02-18T09:34:50Z
New Revision: 90dc78bc62784faaa55afb0320cf3c2187d80ac6

URL: 
https://github.com/llvm/llvm-project/commit/90dc78bc62784faaa55afb0320cf3c2187d80ac6
DIFF: 
https://github.com/llvm/llvm-project/commit/90dc78bc62784faaa55afb0320cf3c2187d80ac6.diff

LOG: [ARM,MVE] Add intrinsics for abs, neg and not operations.

Summary:
This commit adds the unpredicated intrinsics for the unary operations
vabsq (absolute value), vnegq (arithmetic negation), vmvnq (bitwise
complement), vqabsq and vqnegq (saturating versions of abs and neg for
signed integers, in the sense that they give INT_MAX if an input lane
is INT_MIN).

This is done entirely in clang: all of these operations have existing
isel patterns and existing tests for them on the LLVM side, so I've
just made clang emit the same IR that those patterns already match.

Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard

Reviewed By: MarkMurrayARM

Subscribers: kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74331

Added: 
clang/test/CodeGen/arm-mve-intrinsics/absneg.c

Modified: 
clang/include/clang/Basic/arm_mve.td
clang/include/clang/Basic/arm_mve_defs.td
clang/lib/CodeGen/CGBuiltin.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/arm_mve.td 
b/clang/include/clang/Basic/arm_mve.td
index 5cd88b07ebaa..dfc0ee87bb2f 100644
--- a/clang/include/clang/Basic/arm_mve.td
+++ b/clang/include/clang/Basic/arm_mve.td
@@ -234,6 +234,33 @@ let params = T.Unsigned in {
   defm vdwdup: vxdup_mc<(? u32:$limit, imm_1248:$step), (? $limit, $step)>;
 }
 
+let params = T.Int in {
+  def vmvnq: Intrinsic;
+}
+let params = T.Signed in {
+  def vnegq: Intrinsic;
+  def vabsq: Intrinsic;
+  def vqnegq: Intrinsic;
+  def vqabsq: Intrinsic;
+}
+let params = T.Float in {
+  def vnegq_f: Intrinsic,
+   NameOverride<"vnegq">;
+  def vabsq_f: Intrinsic $a)>, NameOverride<"vabsq">;
+}
+
 // The bitcasting below is not overcomplicating the IR because while
 // Vector and UVector may be 
diff erent vector types at the C level i.e.
 // vectors of same size signed/unsigned ints. Once they're lowered

diff  --git a/clang/include/clang/Basic/arm_mve_defs.td 
b/clang/include/clang/Basic/arm_mve_defs.td
index d4e821589cfd..2d080f2653aa 100644
--- a/clang/include/clang/Basic/arm_mve_defs.td
+++ b/clang/include/clang/Basic/arm_mve_defs.td
@@ -98,6 +98,9 @@ def extend: CGHelperFn<"SignOrZeroExtend"> {
   let special_params = [IRBuilderIntParam<2, "bool">];
 }
 def zeroinit: IRFunction<"llvm::Constant::getNullValue">;
+def int_min: CGHelperFn<"ARMMVEConstantSplat<1,0>">;
+def int_max: CGHelperFn<"ARMMVEConstantSplat<0,1>">;
+def uint_max: CGHelperFn<"ARMMVEConstantSplat<1,1>">;
 def undef: IRFunction<"UndefValue::get">;
 def icmp_eq: IRBuilder<"CreateICmpEQ">;
 def icmp_ne: IRBuilder<"CreateICmpNE">;
@@ -117,6 +120,7 @@ def fcmp_lt: IRBuilder<"CreateFCmpOLT">;
 def fcmp_le: IRBuilder<"CreateFCmpOLE">;
 def splat: CGHelperFn<"ARMMVEVectorSplat">;
 def select: IRBuilder<"CreateSelect">;
+def fneg: IRBuilder<"CreateFNeg">;
 
 // A node that makes an Address out of a pointer-typed Value, by
 // providing an alignment as the second argument.

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 5e411bc7aa93..0081740f7280 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -7056,6 +7056,19 @@ static llvm::Value *ARMMVEVectorReinterpret(CGBuilderTy 
,
   }
 }
 
+template
+static llvm::Value *ARMMVEConstantSplat(CGBuilderTy , llvm::Type *VT) {
+  // MVE-specific helper function to make a vector splat of a constant such as
+  // UINT_MAX or INT_MIN, in which all bits below the highest one are equal.
+  llvm::Type *T = VT->getVectorElementType();
+  unsigned LaneBits = T->getPrimitiveSizeInBits();
+  uint32_t Value = HighBit << (LaneBits - 1);
+  if (OtherBits)
+Value |= (1UL << (LaneBits - 1)) - 1;
+  llvm::Value *Lane = llvm::ConstantInt::get(T, Value);
+  return ARMMVEVectorSplat(Builder, Lane);
+}
+
 Value *CodeGenFunction::EmitARMMVEBuiltinExpr(unsigned BuiltinID,
   const CallExpr *E,
   ReturnValueSlot ReturnValue,

diff  --git a/clang/test/CodeGen/arm-mve-intrinsics/absneg.c 
b/clang/test/CodeGen/arm-mve-intrinsics/absneg.c
new file mode 100644
index ..db4253f3590b
--- /dev/null
+++ b/clang/test/CodeGen/arm-mve-intrinsics/absneg.c
@@ -0,0 +1,338 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi 

[clang] b6236e9 - [ARM, MVE] Add the vrev16q, vrev32q, vrev64q family.

[Simon Tatham via cfe-commits]

Author: Simon Tatham
Date: 2020-02-18T09:34:50Z
New Revision: b6236e94799e43fad1f024e84ed56a85d9a3623f

URL: 
https://github.com/llvm/llvm-project/commit/b6236e94799e43fad1f024e84ed56a85d9a3623f
DIFF: 
https://github.com/llvm/llvm-project/commit/b6236e94799e43fad1f024e84ed56a85d9a3623f.diff

LOG: [ARM,MVE] Add the vrev16q, vrev32q, vrev64q family.

Summary:
These intrinsics just reorder the lanes of a vector, so the natural IR
representation is as a shufflevector operation. Existing LLVM codegen
already recognizes those particular shufflevectors and generates the
MVE VREV instruction.

This commit adds the unpredicated forms only.

Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard

Reviewed By: dmgreen

Subscribers: kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74334

Added: 
clang/test/CodeGen/arm-mve-intrinsics/vrev.c

Modified: 
clang/include/clang/Basic/arm_mve.td
clang/include/clang/Basic/arm_mve_defs.td
clang/lib/CodeGen/CGBuiltin.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/arm_mve.td 
b/clang/include/clang/Basic/arm_mve.td
index a2bf7afad41e..126c2e2214ae 100644
--- a/clang/include/clang/Basic/arm_mve.td
+++ b/clang/include/clang/Basic/arm_mve.td
@@ -1180,6 +1180,13 @@ defm vrmlsldavh : MVEBinaryVectorHoriz64R;
 defm vrmlsldavh : MVEBinaryVectorHoriz64R;
 }
 
+let params = T.All8 in
+def vrev16q : Intrinsic;
+let params = !listconcat(T.All8, T.All16) in
+def vrev32q : Intrinsic;
+let params = T.Usual in
+def vrev64q : Intrinsic;
+
 foreach desttype = T.All in {
   // We want a vreinterpretq between every pair of supported vector types
   // _except_ that there shouldn't be one from a type to itself.

diff  --git a/clang/include/clang/Basic/arm_mve_defs.td 
b/clang/include/clang/Basic/arm_mve_defs.td
index c2e4a4232c23..9f245d0436c4 100644
--- a/clang/include/clang/Basic/arm_mve_defs.td
+++ b/clang/include/clang/Basic/arm_mve_defs.td
@@ -125,6 +125,9 @@ def sitofp: IRBuilder<"CreateSIToFP">;
 def uitofp: IRBuilder<"CreateUIToFP">;
 def fptosi: IRBuilder<"CreateFPToSI">;
 def fptoui: IRBuilder<"CreateFPToUI">;
+def vrev: CGHelperFn<"ARMMVEVectorElementReverse"> {
+  let special_params = [IRBuilderIntParam<1, "unsigned">];
+}
 
 // A node that makes an Address out of a pointer-typed Value, by
 // providing an alignment as the second argument.

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 0081740f7280..788f14b37123 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -7069,6 +7069,21 @@ static llvm::Value *ARMMVEConstantSplat(CGBuilderTy 
, llvm::Type *VT) {
   return ARMMVEVectorSplat(Builder, Lane);
 }
 
+static llvm::Value *ARMMVEVectorElementReverse(CGBuilderTy ,
+   llvm::Value *V,
+   unsigned ReverseWidth) {
+  // MVE-specific helper function which reverses the elements of a
+  // vector within every (ReverseWidth)-bit collection of lanes.
+  SmallVector Indices;
+  unsigned LaneSize = V->getType()->getScalarSizeInBits();
+  unsigned Elements = 128 / LaneSize;
+  unsigned Mask = ReverseWidth / LaneSize - 1;
+  for (unsigned i = 0; i < Elements; i++)
+Indices.push_back(i ^ Mask);
+  return Builder.CreateShuffleVector(V, llvm::UndefValue::get(V->getType()),
+ Indices);
+}
+
 Value *CodeGenFunction::EmitARMMVEBuiltinExpr(unsigned BuiltinID,
   const CallExpr *E,
   ReturnValueSlot ReturnValue,

diff  --git a/clang/test/CodeGen/arm-mve-intrinsics/vrev.c 
b/clang/test/CodeGen/arm-mve-intrinsics/vrev.c
new file mode 100644
index ..384d736d2a6d
--- /dev/null
+++ b/clang/test/CodeGen/arm-mve-intrinsics/vrev.c
@@ -0,0 +1,215 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg -sroa 
-early-cse | FileCheck %s
+
+#include 
+
+// CHECK-LABEL: @test_vrev16q_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> 
undef, <16 x i32> 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+int8x16_t test_vrev16q_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vrev16q(a);
+#else /* POLYMORPHIC */
+return vrev16q_s8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev16q_u8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector 

[clang] c8b3196 - [ARM, MVE] Add intrinsics for FP rounding operations.

[Simon Tatham via cfe-commits]

Author: Simon Tatham
Date: 2020-02-18T09:34:50Z
New Revision: c8b3196e54308b0113d2a0888d13ccc92e3b7ccc

URL: 
https://github.com/llvm/llvm-project/commit/c8b3196e54308b0113d2a0888d13ccc92e3b7ccc
DIFF: 
https://github.com/llvm/llvm-project/commit/c8b3196e54308b0113d2a0888d13ccc92e3b7ccc.diff

LOG: [ARM,MVE] Add intrinsics for FP rounding operations.

Summary:
This adds the unpredicated forms of six different MVE intrinsics which
all round a vector of floating-point numbers to integer values,
leaving them still in FP format, differing only in rounding mode and
exception settings.

Five of them map to existing target-independent intrinsics in LLVM IR,
such as @llvm.trunc and @llvm.rint. The sixth, mapping to the `vrintn`
instruction, is done by inventing a target-specific intrinsic.

(`vrintn` behaves the same as `vrintx` in terms of the output value:
the side effects on the FPSCR flags are the only difference between
the two. But ACLE specifies separate user-callable intrinsics for the
two, so the side effects matter enough to make sure we generate the
right one of the two instructions in each case.)

Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard

Reviewed By: miyuki

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74333

Added: 
clang/test/CodeGen/arm-mve-intrinsics/vrnd.c
llvm/test/CodeGen/Thumb2/mve-intrinsics/vrintn.ll

Modified: 
clang/include/clang/Basic/arm_mve.td
llvm/include/llvm/IR/IntrinsicsARM.td
llvm/lib/Target/ARM/ARMInstrMVE.td

Removed: 




diff  --git a/clang/include/clang/Basic/arm_mve.td 
b/clang/include/clang/Basic/arm_mve.td
index 5b20f23c75c7..a2bf7afad41e 100644
--- a/clang/include/clang/Basic/arm_mve.td
+++ b/clang/include/clang/Basic/arm_mve.td
@@ -417,6 +417,21 @@ defm : float_int_conversions;
 defm : float_int_conversions;
 defm : float_int_conversions;
 
+let params = T.Float in {
+  def vrndq: Intrinsic $a)>;
+  def vrndmq: Intrinsic $a)>;
+  def vrndpq: Intrinsic $a)>;
+  def vrndaq: Intrinsic $a)>;
+  def vrndxq: Intrinsic $a)>;
+  def vrndnq: Intrinsic $a)>;
+}
+
 multiclass compare_with_pred {
   // Make the predicated and unpredicated versions of a single comparison.

diff  --git a/clang/test/CodeGen/arm-mve-intrinsics/vrnd.c 
b/clang/test/CodeGen/arm-mve-intrinsics/vrnd.c
new file mode 100644
index ..a324c36ed838
--- /dev/null
+++ b/clang/test/CodeGen/arm-mve-intrinsics/vrnd.c
@@ -0,0 +1,173 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg -sroa 
-early-cse | FileCheck %s
+
+#include 
+
+// CHECK-LABEL: @test_vrndaq_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x half> @llvm.round.v8f16(<8 x half> 
[[A:%.*]])
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vrndaq_f16(float16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrndaq(a);
+#else /* POLYMORPHIC */
+return vrndaq_f16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrndaq_f32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x 
float> [[A:%.*]])
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vrndaq_f32(float32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vrndaq(a);
+#else /* POLYMORPHIC */
+return vrndaq_f32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrndmq_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x half> @llvm.floor.v8f16(<8 x half> 
[[A:%.*]])
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vrndmq_f16(float16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrndmq(a);
+#else /* POLYMORPHIC */
+return vrndmq_f16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrndmq_f32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x 
float> [[A:%.*]])
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vrndmq_f32(float32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vrndmq(a);
+#else /* POLYMORPHIC */
+return vrndmq_f32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrndpq_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x half> @llvm.ceil.v8f16(<8 x half> 
[[A:%.*]])
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vrndpq_f16(float16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrndpq(a);
+#else /* POLYMORPHIC */
+return vrndpq_f16(a);
+#endif /* POLYMORPHIC */
+}
+
+// 

[clang] df3ed6c - [ARM, MVE] Add intrinsics for int <-> float conversion.

[Simon Tatham via cfe-commits]

Author: Simon Tatham
Date: 2020-02-18T09:34:50Z
New Revision: df3ed6c0fe31094941e4cd814cdf924b63993c4e

URL: 
https://github.com/llvm/llvm-project/commit/df3ed6c0fe31094941e4cd814cdf924b63993c4e
DIFF: 
https://github.com/llvm/llvm-project/commit/df3ed6c0fe31094941e4cd814cdf924b63993c4e.diff

LOG: [ARM,MVE] Add intrinsics for int <-> float conversion.

Summary:
This adds the unpredicated versions of the family of vcvtq intrinsics
that convert between a vector of floats and a vector of the same size
of integer. These are represented in IR using the standard fptosi,
fptoui, sitofp and uitofp operations, which existing LLVM codegen
already handles.

Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard

Reviewed By: MarkMurrayARM

Subscribers: kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74332

Added: 


Modified: 
clang/include/clang/Basic/arm_mve.td
clang/include/clang/Basic/arm_mve_defs.td
clang/test/CodeGen/arm-mve-intrinsics/vcvt.c

Removed: 




diff  --git a/clang/include/clang/Basic/arm_mve.td 
b/clang/include/clang/Basic/arm_mve.td
index dfc0ee87bb2f..5b20f23c75c7 100644
--- a/clang/include/clang/Basic/arm_mve.td
+++ b/clang/include/clang/Basic/arm_mve.td
@@ -400,6 +400,23 @@ foreach half = [ "b", "t" ] in {
   } // params = [f32], pnt = PNT_None
 } // loop over half = "b", "t"
 
+multiclass float_int_conversions {
+  defvar FVector = VecOf;
+  defvar IVector = VecOf;
+
+  let params = [IScalar], pnt = PNT_2Type in
+def : Intrinsic,
+  NameOverride<"vcvtq_" # FScalar>;
+  let params = [FScalar], pnt = PNT_None in
+def : Intrinsic,
+  NameOverride<"vcvtq_" # IScalar>;
+}
+
+defm : float_int_conversions;
+defm : float_int_conversions;
+defm : float_int_conversions;
+defm : float_int_conversions;
+
 multiclass compare_with_pred {
   // Make the predicated and unpredicated versions of a single comparison.

diff  --git a/clang/include/clang/Basic/arm_mve_defs.td 
b/clang/include/clang/Basic/arm_mve_defs.td
index 2d080f2653aa..c2e4a4232c23 100644
--- a/clang/include/clang/Basic/arm_mve_defs.td
+++ b/clang/include/clang/Basic/arm_mve_defs.td
@@ -121,6 +121,10 @@ def fcmp_le: IRBuilder<"CreateFCmpOLE">;
 def splat: CGHelperFn<"ARMMVEVectorSplat">;
 def select: IRBuilder<"CreateSelect">;
 def fneg: IRBuilder<"CreateFNeg">;
+def sitofp: IRBuilder<"CreateSIToFP">;
+def uitofp: IRBuilder<"CreateUIToFP">;
+def fptosi: IRBuilder<"CreateFPToSI">;
+def fptoui: IRBuilder<"CreateFPToUI">;
 
 // A node that makes an Address out of a pointer-typed Value, by
 // providing an alignment as the second argument.

diff  --git a/clang/test/CodeGen/arm-mve-intrinsics/vcvt.c 
b/clang/test/CodeGen/arm-mve-intrinsics/vcvt.c
index a1c99de62ebb..3220100d7b89 100644
--- a/clang/test/CodeGen/arm-mve-intrinsics/vcvt.c
+++ b/clang/test/CodeGen/arm-mve-intrinsics/vcvt.c
@@ -4,6 +4,102 @@
 
 #include 
 
+// CHECK-LABEL: @test_vcvtq_f16_s16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = sitofp <8 x i16> [[A:%.*]] to <8 x half>
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vcvtq_f16_s16(int16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vcvtq(a);
+#else /* POLYMORPHIC */
+return vcvtq_f16_s16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vcvtq_f16_u16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = uitofp <8 x i16> [[A:%.*]] to <8 x half>
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vcvtq_f16_u16(uint16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vcvtq(a);
+#else /* POLYMORPHIC */
+return vcvtq_f16_u16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vcvtq_f32_s32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = sitofp <4 x i32> [[A:%.*]] to <4 x float>
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vcvtq_f32_s32(int32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vcvtq(a);
+#else /* POLYMORPHIC */
+return vcvtq_f32_s32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vcvtq_f32_u32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = uitofp <4 x i32> [[A:%.*]] to <4 x float>
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vcvtq_f32_u32(uint32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vcvtq(a);
+#else /* POLYMORPHIC */
+return vcvtq_f32_u32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vcvtq_s16_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = fptosi <8 x half> [[A:%.*]] to <8 x i16>
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+int16x8_t test_vcvtq_s16_f16(float16x8_t a)
+{
+return vcvtq_s16_f16(a);
+}
+
+// CHECK-LABEL: @test_vcvtq_s32_f32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = fptosi <4 x float> [[A:%.*]] to <4 x i32>
+// CHECK-NEXT:ret <4 x i32> [[TMP0]]
+//
+int32x4_t test_vcvtq_s32_f32(float32x4_t a)
+{
+return vcvtq_s32_f32(a);
+}
+
+// CHECK-LABEL: 

[PATCH] D70876: [clang-tidy] Add spuriously-wake-up-functions check

[Kocsis Ábel via Phabricator via cfe-commits]

abelkocsis updated this revision to Diff 245113.
abelkocsis added a comment.

Test cases adding, checker modifying to pass new cases.


Repository:
  rCTE Clang Tools Extra

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70876/new/

https://reviews.llvm.org/D70876

Files:
  clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
  clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
  clang-tools-extra/clang-tidy/bugprone/SpuriouslyWakeUpFunctionsCheck.cpp
  clang-tools-extra/clang-tidy/bugprone/SpuriouslyWakeUpFunctionsCheck.h
  clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
  clang-tools-extra/docs/ReleaseNotes.rst
  
clang-tools-extra/docs/clang-tidy/checks/bugprone-spuriously-wake-up-functions.rst
  clang-tools-extra/docs/clang-tidy/checks/cert-con36-c.rst
  clang-tools-extra/docs/clang-tidy/checks/cert-con54-cpp.rst
  clang-tools-extra/docs/clang-tidy/checks/list.rst
  clang-tools-extra/test/clang-tidy/bugprone-spuriously-wake-up-functions.c
  clang-tools-extra/test/clang-tidy/bugprone-spuriously-wake-up-functions.cpp

Index: clang-tools-extra/test/clang-tidy/bugprone-spuriously-wake-up-functions.cpp
===
--- /dev/null
+++ clang-tools-extra/test/clang-tidy/bugprone-spuriously-wake-up-functions.cpp
@@ -0,0 +1,191 @@
+// RUN: %check_clang_tidy %s bugprone-spuriously-wake-up-functions %t -- --
+#define NULL 0
+
+namespace std {
+using intmax_t = int;
+
+template 
+class ratio {
+public:
+  static constexpr intmax_t num = 0;
+  static constexpr intmax_t den = 0;
+  typedef ratio type;
+};
+typedef ratio<1, 1000> milli;
+namespace chrono {
+
+template >
+class duration {
+public:
+  using rep = Rep;
+  using period = Period;
+
+public:
+  constexpr duration() = default;
+  template 
+  constexpr explicit duration(const Rep2 );
+  template 
+  constexpr duration(const duration );
+  ~duration() = default;
+  duration(const duration &) = default;
+};
+
+template 
+class time_point {
+public:
+  using clock = Clock;
+  using duration = Duration;
+
+public:
+  constexpr time_point();
+  constexpr explicit time_point(const duration );
+  template 
+  constexpr time_point(const time_point );
+};
+
+using milliseconds = duration;
+
+class system_clock {
+public:
+  typedef milliseconds duration;
+  typedef duration::rep rep;
+  typedef duration::period period;
+  typedef chrono::time_point time_point;
+
+  static time_point now() noexcept;
+};
+} // namespace chrono
+
+class mutex;
+template 
+class unique_lock {
+public:
+  typedef Mutex mutex_type;
+
+  unique_lock() noexcept;
+  explicit unique_lock(mutex_type );
+};
+
+class mutex {
+public:
+  constexpr mutex() noexcept;
+  ~mutex();
+  mutex(const mutex &) = delete;
+  mutex =(const mutex &) = delete;
+};
+
+enum class cv_status {
+  no_timeout,
+  timeout
+};
+
+class condition_variable {
+public:
+  condition_variable();
+  ~condition_variable();
+  condition_variable(const condition_variable &) = delete;
+
+  void wait(unique_lock );
+  template 
+  void wait(unique_lock , Predicate pred);
+  template 
+  cv_status wait_until(unique_lock ,
+   const chrono::time_point _time){};
+  template 
+  bool wait_until(unique_lock ,
+  const chrono::time_point _time,
+  Predicate pred){};
+  template 
+  cv_status wait_for(unique_lock ,
+ const chrono::duration _time){};
+  template 
+  bool wait_for(unique_lock ,
+const chrono::duration _time,
+Predicate pred){};
+};
+
+} // namespace std
+
+struct Node1 {
+  void *Node1;
+  struct Node1 *next;
+};
+
+static Node1 list;
+static std::mutex m;
+static std::condition_variable condition;
+
+void consume_list_element(std::condition_variable ) {
+  std::unique_lock lk(m);
+
+  if (list.next == nullptr) {
+condition.wait(lk);
+// CHECK-MESSAGES: :[[@LINE-1]]:15: warning: 'wait' should be placed inside a while statement or used with a conditional parameter [bugprone-spuriously-wake-up-functions]
+  }
+
+  while (list.next == nullptr) {
+condition.wait(lk);
+  }
+
+  do {
+condition.wait(lk);
+  } while (list.next == nullptr);
+
+  for (;; list.next == nullptr) {
+condition.wait(lk);
+  }
+
+  if (list.next == nullptr) {
+while (list.next == nullptr) {
+  condition.wait(lk);
+}
+  }
+
+  if (list.next == nullptr) {
+do {
+  condition.wait(lk);
+} while (list.next == nullptr);
+  }
+
+  if (list.next == nullptr) {
+for (;; list.next == nullptr) {
+  condition.wait(lk);
+}
+  }
+  using durtype = std::chrono::duration;
+  durtype dur = std::chrono::duration();
+  if (list.next == nullptr) {
+condition.wait_for(lk, dur);
+// CHECK-MESSAGES: :[[@LINE-1]]:15: warning: 'wait_for' should be placed inside a while statement or used with a conditional parameter [bugprone-spuriously-wake-up-functions]
+  }
+  if (list.next == nullptr) {
+condition.wait_for(lk, dur, [] { return 1; });

[PATCH] D74735: [analyzer] Add support for CXXInheritedCtorInitExpr.

[Gabor Marton via Phabricator via cfe-commits]

martong added inline comments.



Comment at: 
clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h:872
+///
+/// Example: \c class T : public S { using S::S; }; T(1);
+class CXXInheritedConstructorCall : public AnyFunctionCall {

Perhaps the example could provide the definition of  the class `S` too.



Comment at: clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp:436
   case CXXConstructExpr::CK_Complete: {
+assert(CE && "Complete constructors cannot be inherited!");
 std::tie(State, Target) =

Should there be rather `CIE` in the assert? Or the text after `&&` is 
confusing. 



Comment at: clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp:494
   if (State != Pred->getState()) {
+assert(CE && "Inherited constructors do not have construction contexts!");
 static SimpleProgramPointTag T("ExprEngine",

`CIE` ?



Comment at: clang/lib/StaticAnalyzer/Core/SymbolManager.cpp:545
 
+// Anonymous parameters of an inheriting constructor are live for the 
entire
+// duration of the constructor.

`live` -> `alive` ?


Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74735/new/

https://reviews.llvm.org/D74735



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[PATCH] D74337: [ARM,MVE] Add the vmovnbq,vmovntq intrinsic family.

[Simon Tatham via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGc32af4447f79: [ARM,MVE] Add the vmovnbq,vmovntq intrinsic 
family. (authored by simon_tatham).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74337/new/

https://reviews.llvm.org/D74337

Files:
  clang/include/clang/Basic/arm_mve.td
  clang/include/clang/Basic/arm_mve_defs.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/arm-mve-intrinsics/vmovn.c
  clang/utils/TableGen/MveEmitter.cpp
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovn.ll

Index: llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovn.ll
===
--- /dev/null
+++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovn.ll
@@ -0,0 +1,170 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -verify-machineinstrs -o - %s | FileCheck --check-prefix=LE %s
+; RUN: llc -mtriple=thumbebv8.1m.main -mattr=+mve -verify-machineinstrs -o - %s | FileCheck --check-prefix=BE %s
+
+define arm_aapcs_vfpcc <16 x i8> @test_vmovnbq_s16(<16 x i8> %a, <8 x i16> %b) {
+; LE-LABEL: test_vmovnbq_s16:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovnb.i16 q0, q1
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovnbq_s16:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.16 q2, q1
+; BE-NEXT:vrev64.8 q1, q0
+; BE-NEXT:vmovnb.i16 q1, q2
+; BE-NEXT:vrev64.8 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> 
+  %1 = tail call <8 x i16> @llvm.arm.mve.vreinterpretq.v8i16.v16i8(<16 x i8> %0)
+  %2 = shufflevector <8 x i16> %b, <8 x i16> %1, <16 x i32> 
+  %3 = trunc <16 x i16> %2 to <16 x i8>
+  ret <16 x i8> %3
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vmovnbq_s32(<8 x i16> %a, <4 x i32> %b) {
+; LE-LABEL: test_vmovnbq_s32:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovnb.i32 q0, q1
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovnbq_s32:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.32 q2, q1
+; BE-NEXT:vrev64.16 q1, q0
+; BE-NEXT:vmovnb.i32 q1, q2
+; BE-NEXT:vrev64.16 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> 
+  %1 = tail call <4 x i32> @llvm.arm.mve.vreinterpretq.v4i32.v8i16(<8 x i16> %0)
+  %2 = shufflevector <4 x i32> %b, <4 x i32> %1, <8 x i32> 
+  %3 = trunc <8 x i32> %2 to <8 x i16>
+  ret <8 x i16> %3
+}
+
+define arm_aapcs_vfpcc <16 x i8> @test_vmovnbq_u16(<16 x i8> %a, <8 x i16> %b) {
+; LE-LABEL: test_vmovnbq_u16:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovnb.i16 q0, q1
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovnbq_u16:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.16 q2, q1
+; BE-NEXT:vrev64.8 q1, q0
+; BE-NEXT:vmovnb.i16 q1, q2
+; BE-NEXT:vrev64.8 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> 
+  %1 = tail call <8 x i16> @llvm.arm.mve.vreinterpretq.v8i16.v16i8(<16 x i8> %0)
+  %2 = shufflevector <8 x i16> %b, <8 x i16> %1, <16 x i32> 
+  %3 = trunc <16 x i16> %2 to <16 x i8>
+  ret <16 x i8> %3
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vmovnbq_u32(<8 x i16> %a, <4 x i32> %b) {
+; LE-LABEL: test_vmovnbq_u32:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovnb.i32 q0, q1
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovnbq_u32:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.32 q2, q1
+; BE-NEXT:vrev64.16 q1, q0
+; BE-NEXT:vmovnb.i32 q1, q2
+; BE-NEXT:vrev64.16 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> 
+  %1 = tail call <4 x i32> @llvm.arm.mve.vreinterpretq.v4i32.v8i16(<8 x i16> %0)
+  %2 = shufflevector <4 x i32> %b, <4 x i32> %1, <8 x i32> 
+  %3 = trunc <8 x i32> %2 to <8 x i16>
+  ret <8 x i16> %3
+}
+
+define arm_aapcs_vfpcc <16 x i8> @test_vmovntq_s16(<16 x i8> %a, <8 x i16> %b) {
+; LE-LABEL: test_vmovntq_s16:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovnt.i16 q0, q1
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovntq_s16:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.16 q2, q1
+; BE-NEXT:vrev64.8 q1, q0
+; BE-NEXT:vmovnt.i16 q1, q2
+; BE-NEXT:vrev64.8 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = tail call <8 x i16> @llvm.arm.mve.vreinterpretq.v8i16.v16i8(<16 x i8> %a)
+  %1 = shufflevector <8 x i16> %0, <8 x i16> %b, <16 x i32> 
+  %2 = trunc <16 x i16> %1 to <16 x i8>
+  ret <16 x i8> %2
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vmovntq_s32(<8 x i16> %a, <4 x i32> %b) {
+; LE-LABEL: test_vmovntq_s32:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovnt.i32 q0, q1
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovntq_s32:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.32 q2, q1
+; BE-NEXT:vrev64.16 q1, q0
+; BE-NEXT:vmovnt.i32 q1, q2
+; BE-NEXT:vrev64.16 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = tail call <4 x i32> 

[PATCH] D74336: [ARM,MVE] Add the vmovlbq,vmovltq intrinsic family.

[Simon Tatham via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG5e97940cd279: [ARM,MVE] Add the vmovlbq,vmovltq intrinsic 
family. (authored by simon_tatham).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74336/new/

https://reviews.llvm.org/D74336

Files:
  clang/include/clang/Basic/arm_mve.td
  clang/include/clang/Basic/arm_mve_defs.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/arm-mve-intrinsics/vmovl.c
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovl.ll
  llvm/test/CodeGen/Thumb2/mve-shuffleext.ll

Index: llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
===
--- llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
+++ llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
@@ -15,8 +15,7 @@
 define arm_aapcs_vfpcc <4 x i32> @sext_1357(<8 x i16> %src) {
 ; CHECK-LABEL: sext_1357:
 ; CHECK:   @ %bb.0: @ %entry
-; CHECK-NEXT:vrev32.16 q0, q0
-; CHECK-NEXT:vmovlb.s16 q0, q0
+; CHECK-NEXT:vmovlt.s16 q0, q0
 ; CHECK-NEXT:bx lr
 entry:
   %strided.vec = shufflevector <8 x i16> %src, <8 x i16> undef, <4 x i32> 
@@ -38,8 +37,7 @@
 define arm_aapcs_vfpcc <4 x i32> @zext_1357(<8 x i16> %src) {
 ; CHECK-LABEL: zext_1357:
 ; CHECK:   @ %bb.0: @ %entry
-; CHECK-NEXT:vrev32.16 q0, q0
-; CHECK-NEXT:vmovlb.u16 q0, q0
+; CHECK-NEXT:vmovlt.u16 q0, q0
 ; CHECK-NEXT:bx lr
 entry:
   %strided.vec = shufflevector <8 x i16> %src, <8 x i16> undef, <4 x i32> 
@@ -61,8 +59,7 @@
 define arm_aapcs_vfpcc <8 x i16> @sext_13579111315(<16 x i8> %src) {
 ; CHECK-LABEL: sext_13579111315:
 ; CHECK:   @ %bb.0: @ %entry
-; CHECK-NEXT:vrev16.8 q0, q0
-; CHECK-NEXT:vmovlb.s8 q0, q0
+; CHECK-NEXT:vmovlt.s8 q0, q0
 ; CHECK-NEXT:bx lr
 entry:
   %strided.vec = shufflevector <16 x i8> %src, <16 x i8> undef, <8 x i32> 
@@ -84,8 +81,7 @@
 define arm_aapcs_vfpcc <8 x i16> @zext_13579111315(<16 x i8> %src) {
 ; CHECK-LABEL: zext_13579111315:
 ; CHECK:   @ %bb.0: @ %entry
-; CHECK-NEXT:vrev16.8 q0, q0
-; CHECK-NEXT:vmovlb.u8 q0, q0
+; CHECK-NEXT:vmovlt.u8 q0, q0
 ; CHECK-NEXT:bx lr
 entry:
   %strided.vec = shufflevector <16 x i8> %src, <16 x i8> undef, <8 x i32> 
Index: llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovl.ll
===
--- /dev/null
+++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovl.ll
@@ -0,0 +1,147 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -verify-machineinstrs -o - %s | FileCheck --check-prefix=LE %s
+; RUN: llc -mtriple=thumbebv8.1m.main -mattr=+mve -verify-machineinstrs -o - %s | FileCheck --check-prefix=BE %s
+
+define arm_aapcs_vfpcc <8 x i16> @test_vmovlbq_s8(<16 x i8> %a) {
+; LE-LABEL: test_vmovlbq_s8:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovlb.s8 q0, q0
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovlbq_s8:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.8 q1, q0
+; BE-NEXT:vmovlb.s8 q1, q1
+; BE-NEXT:vrev64.16 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> 
+  %1 = sext <8 x i8> %0 to <8 x i16>
+  ret <8 x i16> %1
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmovlbq_s16(<8 x i16> %a) {
+; LE-LABEL: test_vmovlbq_s16:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovlb.s16 q0, q0
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovlbq_s16:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.16 q1, q0
+; BE-NEXT:vmovlb.s16 q1, q1
+; BE-NEXT:vrev64.32 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> 
+  %1 = sext <4 x i16> %0 to <4 x i32>
+  ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vmovlbq_u8(<16 x i8> %a) {
+; LE-LABEL: test_vmovlbq_u8:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovlb.u8 q0, q0
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovlbq_u8:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.8 q1, q0
+; BE-NEXT:vmovlb.u8 q1, q1
+; BE-NEXT:vrev64.16 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> 
+  %1 = zext <8 x i8> %0 to <8 x i16>
+  ret <8 x i16> %1
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmovlbq_u16(<8 x i16> %a) {
+; LE-LABEL: test_vmovlbq_u16:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovlb.u16 q0, q0
+; LE-NEXT:bx lr
+;
+; BE-LABEL: test_vmovlbq_u16:
+; BE:   @ %bb.0: @ %entry
+; BE-NEXT:vrev64.16 q1, q0
+; BE-NEXT:vmovlb.u16 q1, q1
+; BE-NEXT:vrev64.32 q0, q1
+; BE-NEXT:bx lr
+entry:
+  %0 = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> 
+  %1 = zext <4 x i16> %0 to <4 x i32>
+  ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vmovltq_s8(<16 x i8> %a) {
+; LE-LABEL: test_vmovltq_s8:
+; LE:   @ %bb.0: @ %entry
+; LE-NEXT:vmovlt.s8 q0, q0
+; LE-NEXT:bx lr
+;
+; 

[PATCH] D73462: [dwarf-5] Support DebugInfo for Defaulted parameters for C++ templates

[Awanish Pandey via Phabricator via cfe-commits]

awpandey added a comment.

Hi @aprantl, I have included all of your suggestions. Can I merge this?


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[PATCH] D74757: Fix compiler extension in standalone mode

[serge via Phabricator via cfe-commits]

serge-sans-paille added a comment.

I still need to test many configurations, I'll report here.


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[PATCH] D74757: Fix compiler extension in standalone mode

[serge via Phabricator via cfe-commits]

serge-sans-paille created this revision.
serge-sans-paille added reviewers: Meinersbur, Keruspe.
Herald added subscribers: llvm-commits, cfe-commits, mgorny.
Herald added projects: clang, LLVM.
serge-sans-paille added a comment.

I still need to test many configurations, I'll report here.


Use a dedicated cmake file to store the extension configured within LLVM.

This patch is related to https://reviews.llvm.org/D74602


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D74757

Files:
  clang/CMakeLists.txt
  llvm/CMakeLists.txt
  llvm/cmake/modules/AddLLVM.cmake
  llvm/cmake/modules/CMakeLists.txt
  llvm/cmake/modules/LLVMConfig.cmake.in

Index: llvm/cmake/modules/LLVMConfig.cmake.in
===
--- llvm/cmake/modules/LLVMConfig.cmake.in
+++ llvm/cmake/modules/LLVMConfig.cmake.in
@@ -112,3 +112,5 @@
 
 set_property(GLOBAL PROPERTY LLVM_TARGETS_CONFIGURED On)
 include(${LLVM_CMAKE_DIR}/LLVM-Config.cmake)
+
+
Index: llvm/cmake/modules/CMakeLists.txt
===
--- llvm/cmake/modules/CMakeLists.txt
+++ llvm/cmake/modules/CMakeLists.txt
@@ -136,6 +136,7 @@
 FILES_MATCHING PATTERN *.cmake
 PATTERN .svn EXCLUDE
 PATTERN LLVMConfig.cmake EXCLUDE
+PATTERN LLVMConfigExtensions.cmake EXCLUDE
 PATTERN LLVMConfigVersion.cmake EXCLUDE
 PATTERN LLVM-Config.cmake EXCLUDE
 PATTERN GetHostTriple.cmake EXCLUDE)
Index: llvm/cmake/modules/AddLLVM.cmake
===
--- llvm/cmake/modules/AddLLVM.cmake
+++ llvm/cmake/modules/AddLLVM.cmake
@@ -873,13 +873,13 @@
 if (TARGET intrinsics_gen)
   add_dependencies(obj.${name} intrinsics_gen)
 endif()
-message(STATUS "Registering ${name} as a pass plugin (static build: ${LLVM_${name_upper}_LINK_INTO_TOOLS})")
-set_property(GLOBAL APPEND PROPERTY LLVM_COMPILE_EXTENSIONS ${name})
+set_property(GLOBAL APPEND PROPERTY LLVM_STATIC_EXTENSIONS ${name})
   elseif(NOT ARG_NO_MODULE)
 add_llvm_library(${name} MODULE ${ARG_UNPARSED_ARGUMENTS})
   else()
 add_llvm_library(${name} OBJECT ${ARG_UNPARSED_ARGUMENTS})
   endif()
+  message(STATUS "Registering ${name} as a pass plugin (static build: ${LLVM_${name_upper}_LINK_INTO_TOOLS})")
 
 endfunction(add_llvm_pass_plugin)
 
@@ -888,48 +888,47 @@
 # Correctly set lib dependencies between plugins and tools, based on tools
 # registered with the ENABLE_PLUGINS option.
 #
-# Unless NO_GEN option is set, also generate X Macro file for extension
+# if GEN_CONFIG option is set, also generate X Macro file for extension
 # handling. It provides a HANDLE_EXTENSION(extension_namespace, ExtensionProject)
 # call for each extension allowing client code to define
 # HANDLE_EXTENSION to have a specific code be run for each extension.
 #
 function(process_llvm_pass_plugins)
   cmake_parse_arguments(ARG
-  "NO_GEN" "" ""
+  "GEN_CONFIG" "" ""
 ${ARGN})
 
+  if(ARG_GEN_CONFIG)
+  get_property(LLVM_STATIC_EXTENSIONS GLOBAL PROPERTY LLVM_STATIC_EXTENSIONS)
+  else()
+  include(LLVMConfigExtensions)
+  endif()
+
   # Add static plugins to each plugin target.
-  get_property(LLVM_EXTENSIONS GLOBAL PROPERTY LLVM_COMPILE_EXTENSIONS)
-  foreach(llvm_extension ${LLVM_EXTENSIONS})
-string(TOUPPER ${llvm_extension} llvm_extension_upper)
-string(TOLOWER ${llvm_extension} llvm_extension_lower)
-
-if(LLVM_${llvm_extension_upper}_LINK_INTO_TOOLS)
-  get_property(llvm_plugin_targets GLOBAL PROPERTY LLVM_PLUGIN_TARGETS)
-  foreach(llvm_plugin_target ${llvm_plugin_targets})
-set_property(TARGET ${llvm_plugin_target} APPEND PROPERTY LINK_LIBRARIES ${llvm_extension})
-set_property(TARGET ${llvm_plugin_target} APPEND PROPERTY INTERFACE_LINK_LIBRARIES ${llvm_extension})
-  endforeach()
-else()
-  add_llvm_library(${llvm_extension_lower} MODULE obj.${llvm_extension_lower})
-endif()
+  foreach(llvm_extension ${LLVM_STATIC_EXTENSIONS})
+get_property(llvm_plugin_targets GLOBAL PROPERTY LLVM_PLUGIN_TARGETS)
+foreach(llvm_plugin_target ${llvm_plugin_targets})
+  set_property(TARGET ${llvm_plugin_target} APPEND PROPERTY LINK_LIBRARIES ${llvm_extension})
+  set_property(TARGET ${llvm_plugin_target} APPEND PROPERTY INTERFACE_LINK_LIBRARIES ${llvm_extension})
+endforeach()
   endforeach()
 
-  # Eventually generate the extension header.
-  if(NOT ARG_NO_GEN)
-  file(WRITE "${LLVM_BINARY_DIR}/include/llvm/Support/Extension.def.tmp" "//extension handlers\n")
-  foreach(llvm_extension ${LLVM_EXTENSIONS})
-string(TOLOWER ${llvm_extension} llvm_extension_lower)
-
-string(TOUPPER ${llvm_extension} llvm_extension_upper)
-string(SUBSTRING ${llvm_extension_upper} 0 1 llvm_extension_upper_first)
-string(SUBSTRING ${llvm_extension_lower} 1 -1 llvm_extension_lower_tail)
-string(CONCAT llvm_extension_project 

[PATCH] D74704: Support -fuse-ld=lld for riscv

[serge via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGdd230142d8a0: Support -fuse-ld=lld for riscv (authored by 
serge-sans-paille).

Repository:
  rG LLVM Github Monorepo

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Files:
  clang/lib/Driver/ToolChains/RISCVToolchain.cpp
  clang/test/Driver/riscv32-toolchain.c


Index: clang/test/Driver/riscv32-toolchain.c
===
--- clang/test/Driver/riscv32-toolchain.c
+++ clang/test/Driver/riscv32-toolchain.c
@@ -3,6 +3,10 @@
 // RUN: %clang %s -### -no-canonical-prefixes -target riscv32 2>&1 | FileCheck 
-check-prefix=CC1 %s
 // CC1: clang{{.*}} "-cc1" "-triple" "riscv32"
 
+// Test interaction with -fuse-ld=lld
+// RUN: %clang %s -### -no-canonical-prefixes -target riscv32 -fuse-ld=lld 
2>&1 | FileCheck -check-prefix=LLD %s
+// LLD: ld.lld
+
 // In the below tests, --rtlib=platform is used so that the driver ignores
 // the configure-time CLANG_DEFAULT_RTLIB option when choosing the runtime lib
 
Index: clang/lib/Driver/ToolChains/RISCVToolchain.cpp
===
--- clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -142,7 +142,7 @@
 CmdArgs.push_back("elf32lriscv");
   }
 
-  std::string Linker = getToolChain().GetProgramPath(getShortName());
+  std::string Linker = getToolChain().GetLinkerPath();
 
   bool WantCRTs =
   !Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles);


Index: clang/test/Driver/riscv32-toolchain.c
===
--- clang/test/Driver/riscv32-toolchain.c
+++ clang/test/Driver/riscv32-toolchain.c
@@ -3,6 +3,10 @@
 // RUN: %clang %s -### -no-canonical-prefixes -target riscv32 2>&1 | FileCheck -check-prefix=CC1 %s
 // CC1: clang{{.*}} "-cc1" "-triple" "riscv32"
 
+// Test interaction with -fuse-ld=lld
+// RUN: %clang %s -### -no-canonical-prefixes -target riscv32 -fuse-ld=lld 2>&1 | FileCheck -check-prefix=LLD %s
+// LLD: ld.lld
+
 // In the below tests, --rtlib=platform is used so that the driver ignores
 // the configure-time CLANG_DEFAULT_RTLIB option when choosing the runtime lib
 
Index: clang/lib/Driver/ToolChains/RISCVToolchain.cpp
===
--- clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -142,7 +142,7 @@
 CmdArgs.push_back("elf32lriscv");
   }
 
-  std::string Linker = getToolChain().GetProgramPath(getShortName());
+  std::string Linker = getToolChain().GetLinkerPath();
 
   bool WantCRTs =
   !Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles);
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[PATCH] D74732: [ARM,CDE] Cosmetic changes, additonal driver tests

[Mikhail Maltsev via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG58f66f8af01d: [ARM,CDE] Cosmetic changes, additonal driver 
tests (authored by miyuki).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/test/Driver/arm-cde.c
  llvm/lib/Target/ARM/ARMInstrCDE.td
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===
--- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -8136,15 +8136,36 @@
 break;
   }
 
-  case ARM::CDE_CX1: case ARM::CDE_CX1A: case ARM::CDE_CX1D: case ARM::CDE_CX1DA:
-  case ARM::CDE_CX2: case ARM::CDE_CX2A: case ARM::CDE_CX2D: case ARM::CDE_CX2DA:
-  case ARM::CDE_CX3: case ARM::CDE_CX3A: case ARM::CDE_CX3D: case ARM::CDE_CX3DA:
-  case ARM::CDE_VCX1_vec:  case ARM::CDE_VCX1_fpsp:  case ARM::CDE_VCX1_fpdp:
-  case ARM::CDE_VCX1A_vec: case ARM::CDE_VCX1A_fpsp: case ARM::CDE_VCX1A_fpdp:
-  case ARM::CDE_VCX2_vec:  case ARM::CDE_VCX2_fpsp:  case ARM::CDE_VCX2_fpdp:
-  case ARM::CDE_VCX2A_vec: case ARM::CDE_VCX2A_fpsp: case ARM::CDE_VCX2A_fpdp:
-  case ARM::CDE_VCX3_vec:  case ARM::CDE_VCX3_fpsp:  case ARM::CDE_VCX3_fpdp:
-  case ARM::CDE_VCX3A_vec: case ARM::CDE_VCX3A_fpsp: case ARM::CDE_VCX3A_fpdp: {
+  case ARM::CDE_CX1:
+  case ARM::CDE_CX1A:
+  case ARM::CDE_CX1D:
+  case ARM::CDE_CX1DA:
+  case ARM::CDE_CX2:
+  case ARM::CDE_CX2A:
+  case ARM::CDE_CX2D:
+  case ARM::CDE_CX2DA:
+  case ARM::CDE_CX3:
+  case ARM::CDE_CX3A:
+  case ARM::CDE_CX3D:
+  case ARM::CDE_CX3DA:
+  case ARM::CDE_VCX1_vec:
+  case ARM::CDE_VCX1_fpsp:
+  case ARM::CDE_VCX1_fpdp:
+  case ARM::CDE_VCX1A_vec:
+  case ARM::CDE_VCX1A_fpsp:
+  case ARM::CDE_VCX1A_fpdp:
+  case ARM::CDE_VCX2_vec:
+  case ARM::CDE_VCX2_fpsp:
+  case ARM::CDE_VCX2_fpdp:
+  case ARM::CDE_VCX2A_vec:
+  case ARM::CDE_VCX2A_fpsp:
+  case ARM::CDE_VCX2A_fpdp:
+  case ARM::CDE_VCX3_vec:
+  case ARM::CDE_VCX3_fpsp:
+  case ARM::CDE_VCX3_fpdp:
+  case ARM::CDE_VCX3A_vec:
+  case ARM::CDE_VCX3A_fpsp:
+  case ARM::CDE_VCX3A_fpdp: {
 assert(Inst.getOperand(1).isImm() &&
"CDE operand 1 must be a coprocessor ID");
 int64_t Coproc = Inst.getOperand(1).getImm();
@@ -8157,17 +8178,48 @@
 break;
   }
 
-  case ARM::t2CDP: case ARM::t2CDP2:
-  case ARM::t2LDC2L_OFFSET: case ARM::t2LDC2L_OPTION: case ARM::t2LDC2L_POST: case ARM::t2LDC2L_PRE:
-  case ARM::t2LDC2_OFFSET: case ARM::t2LDC2_OPTION: case ARM::t2LDC2_POST: case ARM::t2LDC2_PRE:
-  case ARM::t2LDCL_OFFSET: case ARM::t2LDCL_OPTION: case ARM::t2LDCL_POST: case ARM::t2LDCL_PRE:
-  case ARM::t2LDC_OFFSET: case ARM::t2LDC_OPTION: case ARM::t2LDC_POST: case ARM::t2LDC_PRE:
-  case ARM::t2MCR: case ARM::t2MCR2: case ARM::t2MCRR: case ARM::t2MCRR2:
-  case ARM::t2MRC: case ARM::t2MRC2: case ARM::t2MRRC: case ARM::t2MRRC2:
-  case ARM::t2STC2L_OFFSET: case ARM::t2STC2L_OPTION: case ARM::t2STC2L_POST: case ARM::t2STC2L_PRE:
-  case ARM::t2STC2_OFFSET: case ARM::t2STC2_OPTION: case ARM::t2STC2_POST: case ARM::t2STC2_PRE:
-  case ARM::t2STCL_OFFSET: case ARM::t2STCL_OPTION: case ARM::t2STCL_POST: case ARM::t2STCL_PRE:
-  case ARM::t2STC_OFFSET: case ARM::t2STC_OPTION: case ARM::t2STC_POST: case ARM::t2STC_PRE: {
+  case ARM::t2CDP:
+  case ARM::t2CDP2:
+  case ARM::t2LDC2L_OFFSET:
+  case ARM::t2LDC2L_OPTION:
+  case ARM::t2LDC2L_POST:
+  case ARM::t2LDC2L_PRE:
+  case ARM::t2LDC2_OFFSET:
+  case ARM::t2LDC2_OPTION:
+  case ARM::t2LDC2_POST:
+  case ARM::t2LDC2_PRE:
+  case ARM::t2LDCL_OFFSET:
+  case ARM::t2LDCL_OPTION:
+  case ARM::t2LDCL_POST:
+  case ARM::t2LDCL_PRE:
+  case ARM::t2LDC_OFFSET:
+  case ARM::t2LDC_OPTION:
+  case ARM::t2LDC_POST:
+  case ARM::t2LDC_PRE:
+  case ARM::t2MCR:
+  case ARM::t2MCR2:
+  case ARM::t2MCRR:
+  case ARM::t2MCRR2:
+  case ARM::t2MRC:
+  case ARM::t2MRC2:
+  case ARM::t2MRRC:
+  case ARM::t2MRRC2:
+  case ARM::t2STC2L_OFFSET:
+  case ARM::t2STC2L_OPTION:
+  case ARM::t2STC2L_POST:
+  case ARM::t2STC2L_PRE:
+  case ARM::t2STC2_OFFSET:
+  case ARM::t2STC2_OPTION:
+  case ARM::t2STC2_POST:
+  case ARM::t2STC2_PRE:
+  case ARM::t2STCL_OFFSET:
+  case ARM::t2STCL_OPTION:
+  case ARM::t2STCL_POST:
+  case ARM::t2STCL_PRE:
+  case ARM::t2STC_OFFSET:
+  case ARM::t2STC_OPTION:
+  case ARM::t2STC_POST:
+  case ARM::t2STC_PRE: {
 unsigned Opcode = Inst.getOpcode();
 // Inst.getOperand indexes operands in the (oops ...) and (iops ...) dags,
 // CopInd is the index of the coprocessor operand.
@@ -8176,11 +8228,13 @@
   CopInd = 2;
 else if (Opcode == ARM::t2MRC || Opcode == ARM::t2MRC2)
   CopInd = 1;
-assert(Inst.getOperand(CopInd).isImm() && "Operand must be a coprocessor ID");
+assert(Inst.getOperand(CopInd).isImm() &&
+   "Operand must be a coprocessor ID");
 int64_t Coproc = Inst.getOperand(CopInd).getImm();
 

[clang] dd23014 - Support -fuse-ld=lld for riscv

[via cfe-commits]

Author: serge-sans-paille
Date: 2020-02-18T11:24:09+01:00
New Revision: dd230142d8a00f5f30c3930a2407000e845dcfbf

URL: 
https://github.com/llvm/llvm-project/commit/dd230142d8a00f5f30c3930a2407000e845dcfbf
DIFF: 
https://github.com/llvm/llvm-project/commit/dd230142d8a00f5f30c3930a2407000e845dcfbf.diff

LOG: Support -fuse-ld=lld for riscv

Differential Revision: https://reviews.llvm.org/D74704

Added: 


Modified: 
clang/lib/Driver/ToolChains/RISCVToolchain.cpp
clang/test/Driver/riscv32-toolchain.c

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp 
b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
index 24c2b37c4b77..21106d003859 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -142,7 +142,7 @@ void RISCV::Linker::ConstructJob(Compilation , const 
JobAction ,
 CmdArgs.push_back("elf32lriscv");
   }
 
-  std::string Linker = getToolChain().GetProgramPath(getShortName());
+  std::string Linker = getToolChain().GetLinkerPath();
 
   bool WantCRTs =
   !Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles);

diff  --git a/clang/test/Driver/riscv32-toolchain.c 
b/clang/test/Driver/riscv32-toolchain.c
index 2ff3a585bda3..1b765dba6b9a 100644
--- a/clang/test/Driver/riscv32-toolchain.c
+++ b/clang/test/Driver/riscv32-toolchain.c
@@ -3,6 +3,10 @@
 // RUN: %clang %s -### -no-canonical-prefixes -target riscv32 2>&1 | FileCheck 
-check-prefix=CC1 %s
 // CC1: clang{{.*}} "-cc1" "-triple" "riscv32"
 
+// Test interaction with -fuse-ld=lld
+// RUN: %clang %s -### -no-canonical-prefixes -target riscv32 -fuse-ld=lld 
2>&1 | FileCheck -check-prefix=LLD %s
+// LLD: ld.lld
+
 // In the below tests, --rtlib=platform is used so that the driver ignores
 // the configure-time CLANG_DEFAULT_RTLIB option when choosing the runtime lib
 



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[PATCH] D74732: [ARM,CDE] Cosmetic changes, additonal driver tests

[Sjoerd Meijer via Phabricator via cfe-commits]

SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.

Cheers, LGTM


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[PATCH] D74331: [ARM,MVE] Add intrinsics for abs, neg and not operations.

[Simon Tatham via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG90dc78bc6278: [ARM,MVE] Add intrinsics for abs, neg and not 
operations. (authored by simon_tatham).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74331/new/

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Files:
  clang/include/clang/Basic/arm_mve.td
  clang/include/clang/Basic/arm_mve_defs.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/arm-mve-intrinsics/absneg.c

Index: clang/test/CodeGen/arm-mve-intrinsics/absneg.c
===
--- /dev/null
+++ clang/test/CodeGen/arm-mve-intrinsics/absneg.c
@@ -0,0 +1,338 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+
+#include 
+
+// CHECK-LABEL: @test_vabsq_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x half> @llvm.fabs.v8f16(<8 x half> [[A:%.*]])
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vabsq_f16(float16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vabsq(a);
+#else /* POLYMORPHIC */
+return vabsq_f16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vabsq_f32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> [[A:%.*]])
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vabsq_f32(float32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vabsq(a);
+#else /* POLYMORPHIC */
+return vabsq_f32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vabsq_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = icmp slt <16 x i8> [[A:%.*]], zeroinitializer
+// CHECK-NEXT:[[TMP1:%.*]] = sub <16 x i8> zeroinitializer, [[A]]
+// CHECK-NEXT:[[TMP2:%.*]] = select <16 x i1> [[TMP0]], <16 x i8> [[TMP1]], <16 x i8> [[A]]
+// CHECK-NEXT:ret <16 x i8> [[TMP2]]
+//
+int8x16_t test_vabsq_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vabsq(a);
+#else /* POLYMORPHIC */
+return vabsq_s8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vabsq_s16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = icmp slt <8 x i16> [[A:%.*]], zeroinitializer
+// CHECK-NEXT:[[TMP1:%.*]] = sub <8 x i16> zeroinitializer, [[A]]
+// CHECK-NEXT:[[TMP2:%.*]] = select <8 x i1> [[TMP0]], <8 x i16> [[TMP1]], <8 x i16> [[A]]
+// CHECK-NEXT:ret <8 x i16> [[TMP2]]
+//
+int16x8_t test_vabsq_s16(int16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vabsq(a);
+#else /* POLYMORPHIC */
+return vabsq_s16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vabsq_s32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = icmp slt <4 x i32> [[A:%.*]], zeroinitializer
+// CHECK-NEXT:[[TMP1:%.*]] = sub <4 x i32> zeroinitializer, [[A]]
+// CHECK-NEXT:[[TMP2:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[TMP1]], <4 x i32> [[A]]
+// CHECK-NEXT:ret <4 x i32> [[TMP2]]
+//
+int32x4_t test_vabsq_s32(int32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vabsq(a);
+#else /* POLYMORPHIC */
+return vabsq_s32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vmvnq_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = xor <16 x i8> [[A:%.*]], 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+int8x16_t test_vmvnq_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vmvnq(a);
+#else /* POLYMORPHIC */
+return vmvnq_s8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vmvnq_s16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = xor <8 x i16> [[A:%.*]], 
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+int16x8_t test_vmvnq_s16(int16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vmvnq(a);
+#else /* POLYMORPHIC */
+return vmvnq_s16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vmvnq_s32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = xor <4 x i32> [[A:%.*]], 
+// CHECK-NEXT:ret <4 x i32> [[TMP0]]
+//
+int32x4_t test_vmvnq_s32(int32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vmvnq(a);
+#else /* POLYMORPHIC */
+return vmvnq_s32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vmvnq_u8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = xor <16 x i8> [[A:%.*]], 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+uint8x16_t test_vmvnq_u8(uint8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vmvnq(a);
+#else /* POLYMORPHIC */
+return vmvnq_u8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vmvnq_u16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = xor <8 x i16> [[A:%.*]], 
+// CHECK-NEXT:ret <8 x i16> 

[clang] 5e97940 - [ARM, MVE] Add the vmovlbq, vmovltq intrinsic family.

[Simon Tatham via cfe-commits]

Author: Simon Tatham
Date: 2020-02-18T09:34:50Z
New Revision: 5e97940cd27961a0b872ff551fc98135507288b3

URL: 
https://github.com/llvm/llvm-project/commit/5e97940cd27961a0b872ff551fc98135507288b3
DIFF: 
https://github.com/llvm/llvm-project/commit/5e97940cd27961a0b872ff551fc98135507288b3.diff

LOG: [ARM,MVE] Add the vmovlbq,vmovltq intrinsic family.

Summary:
These intrinsics take a vector of 2n elements, and return a vector of
n wider elements obtained by sign- or zero-extending every other
element of the input vector. They're represented in IR as a
shufflevector that extracts the odd or even elements of the input,
followed by a sext or zext.

Existing LLVM codegen already matches this pattern and generates the
VMOVLB instruction (which widens the even-index input lanes). But no
existing isel rule was generating VMOVLT, so I've added some. However,
the new rules currently only work in little-endian MVE, because the
pattern they expect from isel lowering includes a bitconvert which
doesn't have the right semantics in big-endian.

The output of one existing codegen test is improved by those new
rules.

This commit adds the unpredicated forms only.

Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard

Reviewed By: dmgreen

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74336

Added: 
clang/test/CodeGen/arm-mve-intrinsics/vmovl.c
llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovl.ll

Modified: 
clang/include/clang/Basic/arm_mve.td
clang/include/clang/Basic/arm_mve_defs.td
clang/lib/CodeGen/CGBuiltin.cpp
llvm/lib/Target/ARM/ARMInstrMVE.td
llvm/test/CodeGen/Thumb2/mve-shuffleext.ll

Removed: 




diff  --git a/clang/include/clang/Basic/arm_mve.td 
b/clang/include/clang/Basic/arm_mve.td
index 21801b4d448e..55ddfc22aa3d 100644
--- a/clang/include/clang/Basic/arm_mve.td
+++ b/clang/include/clang/Basic/arm_mve.td
@@ -420,6 +420,13 @@ defm : float_int_conversions;
 defm : float_int_conversions;
 defm : float_int_conversions;
 
+let params = [s8, u8, s16, u16] in {
+  def vmovlbq: Intrinsic;
+  def vmovltq: Intrinsic;
+}
+
 let params = T.Float in {
   def vrndq: Intrinsic $a)>;

diff  --git a/clang/include/clang/Basic/arm_mve_defs.td 
b/clang/include/clang/Basic/arm_mve_defs.td
index 9e5b7b32c511..f6816cdf45c9 100644
--- a/clang/include/clang/Basic/arm_mve_defs.td
+++ b/clang/include/clang/Basic/arm_mve_defs.td
@@ -128,6 +128,9 @@ def fptoui: IRBuilder<"CreateFPToUI">;
 def vrev: CGHelperFn<"ARMMVEVectorElementReverse"> {
   let special_params = [IRBuilderIntParam<1, "unsigned">];
 }
+def unzip: CGHelperFn<"VectorUnzip"> {
+  let special_params = [IRBuilderIntParam<1, "bool">];
+}
 
 // Helper for making boolean flags in IR
 def i1: IRBuilderBase {

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 788f14b37123..b30a79a0bf10 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -7056,6 +7056,17 @@ static llvm::Value *ARMMVEVectorReinterpret(CGBuilderTy 
,
   }
 }
 
+static llvm::Value *VectorUnzip(CGBuilderTy , llvm::Value *V, bool 
Odd) {
+  // Make a shufflevector that extracts every other element of a vector (evens
+  // or odds, as desired).
+  SmallVector Indices;
+  unsigned InputElements = V->getType()->getVectorNumElements();
+  for (unsigned i = 0; i < InputElements; i += 2)
+Indices.push_back(i + Odd);
+  return Builder.CreateShuffleVector(V, llvm::UndefValue::get(V->getType()),
+ Indices);
+}
+
 template
 static llvm::Value *ARMMVEConstantSplat(CGBuilderTy , llvm::Type *VT) {
   // MVE-specific helper function to make a vector splat of a constant such as

diff  --git a/clang/test/CodeGen/arm-mve-intrinsics/vmovl.c 
b/clang/test/CodeGen/arm-mve-intrinsics/vmovl.c
new file mode 100644
index ..0b8ef596faed
--- /dev/null
+++ b/clang/test/CodeGen/arm-mve-intrinsics/vmovl.c
@@ -0,0 +1,126 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve 
-mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S 
-emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve 
-mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone 
-DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+
+#include 
+
+// CHECK-LABEL: @test_vmovlbq_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> 
undef, <8 x i32> 
+// CHECK-NEXT:[[TMP1:%.*]] = sext <8 x i8> [[TMP0]] to <8 x i16>
+// CHECK-NEXT:ret <8 x i16> [[TMP1]]
+//
+int16x8_t test_vmovlbq_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vmovlbq(a);
+#else /* POLYMORPHIC */
+

[clang] c32af44 - [ARM, MVE] Add the vmovnbq, vmovntq intrinsic family.

[Simon Tatham via cfe-commits]

Author: Simon Tatham
Date: 2020-02-18T09:34:50Z
New Revision: c32af4447f79f5e7f246917fe1c3f58b2f6fc2a6

URL: 
https://github.com/llvm/llvm-project/commit/c32af4447f79f5e7f246917fe1c3f58b2f6fc2a6
DIFF: 
https://github.com/llvm/llvm-project/commit/c32af4447f79f5e7f246917fe1c3f58b2f6fc2a6.diff

LOG: [ARM,MVE] Add the vmovnbq,vmovntq intrinsic family.

Summary:
These are in some sense the inverse of vmovl[bt]q: they take a vector
of n wide elements and truncate each to half its width. So they only
write half a vector's worth of output data, and therefore they also
take an 'inactive' parameter to provide the other half of the data in
the output vector. So vmovnb overwrites the even lanes of 'inactive'
with the narrowed values from the main input, and vmovnt overwrites
the odd lanes.

LLVM had existing codegen which generates these MVE instructions in
response to IR that takes two vectors of wide elements, or two vectors
of narrow ones. But in this case, we have one vector of each. So my
clang codegen strategy is to narrow the input vector of wide elements
by simply reinterpreting it as the output type, and then we have two
narrow vectors and can represent the operation as a vector shuffle
that interleaves lanes from both of them.

Even so, not all the cases I needed ended up being selected as a
single MVE instruction, so I've added a couple more patterns that spot
combinations of the 'MVEvmovn' and 'ARMvrev32' SDNodes which can be
generated as a VMOVN instruction with operands swapped.

This commit adds the unpredicated forms only.

Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard

Reviewed By: dmgreen

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74337

Added: 
clang/test/CodeGen/arm-mve-intrinsics/vmovn.c
llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovn.ll

Modified: 
clang/include/clang/Basic/arm_mve.td
clang/include/clang/Basic/arm_mve_defs.td
clang/lib/CodeGen/CGBuiltin.cpp
clang/utils/TableGen/MveEmitter.cpp
llvm/lib/Target/ARM/ARMInstrMVE.td

Removed: 




diff  --git a/clang/include/clang/Basic/arm_mve.td 
b/clang/include/clang/Basic/arm_mve.td
index 55ddfc22aa3d..3a6b63199e39 100644
--- a/clang/include/clang/Basic/arm_mve.td
+++ b/clang/include/clang/Basic/arm_mve.td
@@ -427,6 +427,14 @@ let params = [s8, u8, s16, u16] in {
 (extend (unzip $a, 1), DblVector, (unsignedflag Scalar))>;
 }
 
+let params = [s16, u16, s32, u32] in {
+  def vmovnbq: Intrinsic;
+  def vmovntq: Intrinsic;
+}
+
 let params = T.Float in {
   def vrndq: Intrinsic $a)>;

diff  --git a/clang/include/clang/Basic/arm_mve_defs.td 
b/clang/include/clang/Basic/arm_mve_defs.td
index f6816cdf45c9..7f8f717e8163 100644
--- a/clang/include/clang/Basic/arm_mve_defs.td
+++ b/clang/include/clang/Basic/arm_mve_defs.td
@@ -131,6 +131,7 @@ def vrev: CGHelperFn<"ARMMVEVectorElementReverse"> {
 def unzip: CGHelperFn<"VectorUnzip"> {
   let special_params = [IRBuilderIntParam<1, "bool">];
 }
+def zip: CGHelperFn<"VectorZip">;
 
 // Helper for making boolean flags in IR
 def i1: IRBuilderBase {
@@ -187,6 +188,10 @@ def seq;
 // and 0 for a signed (or floating) one.
 def unsignedflag;
 
+// 'bitsize' also takes a scalar type, and expands into an integer
+// constant giving its size in bits.
+def bitsize;
+
 // If you put CustomCodegen<"foo"> in an intrinsic's codegen field, it
 // indicates that the IR generation for that intrinsic is done by handwritten
 // C++ and not autogenerated at all. The effect in the MVE builtin codegen

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index b30a79a0bf10..401c4d8e0539 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -7067,6 +7067,19 @@ static llvm::Value *VectorUnzip(CGBuilderTy , 
llvm::Value *V, bool Odd)
  Indices);
 }
 
+static llvm::Value *VectorZip(CGBuilderTy , llvm::Value *V0,
+  llvm::Value *V1) {
+  // Make a shufflevector that interleaves two vectors element by element.
+  assert(V0->getType() == V1->getType() && "Can't zip 
diff erent vector types");
+  SmallVector Indices;
+  unsigned InputElements = V0->getType()->getVectorNumElements();
+  for (unsigned i = 0; i < InputElements; i++) {
+Indices.push_back(i);
+Indices.push_back(i + InputElements);
+  }
+  return Builder.CreateShuffleVector(V0, V1, Indices);
+}
+
 template
 static llvm::Value *ARMMVEConstantSplat(CGBuilderTy , llvm::Type *VT) {
   // MVE-specific helper function to make a vector splat of a constant such as

diff  --git a/clang/test/CodeGen/arm-mve-intrinsics/vmovn.c 
b/clang/test/CodeGen/arm-mve-intrinsics/vmovn.c
new file mode 100644
index ..5d157de0feb8
--- /dev/null
+++ b/clang/test/CodeGen/arm-mve-intrinsics/vmovn.c
@@ -0,0 +1,199 @@
+// NOTE: Assertions have been 

[clang] 68b49f7 - [ARM,MVE] Add intrinsics vclzq and vclsq.

[Simon Tatham via cfe-commits]

Author: Simon Tatham
Date: 2020-02-18T09:34:50Z
New Revision: 68b49f7ef49eec068b7ddcf86c868e2a193e64e1

URL: 
https://github.com/llvm/llvm-project/commit/68b49f7ef49eec068b7ddcf86c868e2a193e64e1
DIFF: 
https://github.com/llvm/llvm-project/commit/68b49f7ef49eec068b7ddcf86c868e2a193e64e1.diff

LOG: [ARM,MVE] Add intrinsics vclzq and vclsq.

Summary:
vclzq maps nicely to the existing target-independent @llvm.ctlz IR
intrinsic. But vclsq ('count leading sign bits') has no corresponding
target-independent intrinsic, so I've made up @llvm.arm.mve.vcls.

This commit adds the unpredicated forms only.

Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard

Reviewed By: miyuki

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74335

Added: 
clang/test/CodeGen/arm-mve-intrinsics/vclz.c
llvm/test/CodeGen/Thumb2/mve-intrinsics/vcls.ll

Modified: 
clang/include/clang/Basic/arm_mve.td
clang/include/clang/Basic/arm_mve_defs.td
llvm/include/llvm/IR/IntrinsicsARM.td
llvm/lib/Target/ARM/ARMInstrMVE.td

Removed: 




diff  --git a/clang/include/clang/Basic/arm_mve.td 
b/clang/include/clang/Basic/arm_mve.td
index 126c2e2214ae..21801b4d448e 100644
--- a/clang/include/clang/Basic/arm_mve.td
+++ b/clang/include/clang/Basic/arm_mve.td
@@ -237,8 +237,11 @@ let params = T.Unsigned in {
 let params = T.Int in {
   def vmvnq: Intrinsic;
+  def vclzq: Intrinsic $a, (i1 0))>;
 }
 let params = T.Signed in {
+  def vclsq: Intrinsic $a)>;
   def vnegq: Intrinsic;
   def vabsq: Intrinsic {
   let special_params = [IRBuilderIntParam<1, "unsigned">];
 }
 
+// Helper for making boolean flags in IR
+def i1: IRBuilderBase {
+  let prefix = "llvm::ConstantInt::get(Builder.getInt1Ty(), ";
+  let special_params = [IRBuilderIntParam<0, "bool">];
+}
+
 // A node that makes an Address out of a pointer-typed Value, by
 // providing an alignment as the second argument.
 def address;

diff  --git a/clang/test/CodeGen/arm-mve-intrinsics/vclz.c 
b/clang/test/CodeGen/arm-mve-intrinsics/vclz.c
new file mode 100644
index ..7a2ebe0a627a
--- /dev/null
+++ b/clang/test/CodeGen/arm-mve-intrinsics/vclz.c
@@ -0,0 +1,132 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve 
-mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S 
-emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve 
-mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone 
-DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+
+#include 
+
+// CHECK-LABEL: @test_vclzq_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> 
[[A:%.*]], i1 false)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+int8x16_t test_vclzq_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+return vclzq_s8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vclzq_s16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> 
[[A:%.*]], i1 false)
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+int16x8_t test_vclzq_s16(int16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+return vclzq_s16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vclzq_s32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> 
[[A:%.*]], i1 false)
+// CHECK-NEXT:ret <4 x i32> [[TMP0]]
+//
+int32x4_t test_vclzq_s32(int32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+return vclzq_s32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vclzq_u8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> 
[[A:%.*]], i1 false)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+uint8x16_t test_vclzq_u8(uint8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+return vclzq_u8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vclzq_u16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> 
[[A:%.*]], i1 false)
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+uint16x8_t test_vclzq_u16(uint16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+return vclzq_u16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vclzq_u32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> 
[[A:%.*]], i1 false)
+// CHECK-NEXT:ret <4 x i32> [[TMP0]]
+//
+uint32x4_t test_vclzq_u32(uint32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+

[PATCH] D72857: [SYCL] Driver option to enable SYCL mode and select SYCL version

[Alexey Bader via Phabricator via cfe-commits]

bader marked 3 inline comments as done.
bader added inline comments.



Comment at: clang/include/clang/Basic/LangOptions.def:206
 LANGOPT(OpenCLCPlusPlusVersion , 32, 0, "C++ for OpenCL version")
+ENUM_LANGOPT(SYCLVersion, SYCLVersionList, 4, SYCLVersionList::undefined, 
"Version of the SYCL standard used")
 LANGOPT(NativeHalfType, 1, 0, "Native half type support")

Naghasan wrote:
> Ruyk wrote:
> > bader wrote:
> > > All other language options controlling standard versions are added as 
> > > "LANGOPT" i.e. `int`. Why SYCLVersion is different?
> > > @Ruyk, do you think we should convert other options (e.g. `OpenCL`) to 
> > > enums as well?
> > Thats a good point. I don't see strong reasons for the enum, basically I 
> > read the comment in 
> > https://code.woboq.org/llvm/clang/include/clang/Basic/LangOptions.def.html#22
> > 
> > 
> > ```
> > // ENUM_LANGOPT: for options that have enumeration, rather than unsigned, 
> > type.
> > ```
> > 
> > And since there is a known set of SYCL specifications, made more sense to 
> > enumerate it.
> > It also simplifies writing variants to 1.2.1 (e.g. 1.2.1-oneapi) in the 
> > code since then you can add another entry to the enum.
> > 
> > But no strong feelings, so feel free to change it.
> > 
> `int` allows the use of relational operators which should ease version 
> managements.
> 
> As `SYCLVersionList` is a strongly typed enum so this may not be the best, 
> and as the SYCL version are now meant to be a year `int` should do just fine.
Okay. I'll change the type from enum to int.



Comment at: clang/include/clang/Driver/Options.td:3401
+def sycl_std_EQ : Joined<["-"], "sycl-std=">, Group, 
Flags<[CC1Option]>,
+  HelpText<"SYCL language standard to compile for.">, Values<"1.2.1">;
 

Naghasan wrote:
> Ruyk wrote:
> > bader wrote:
> > > What do you think we integrate sycl versions to existing clang options 
> > > controlling language version: `-std`.
> > > As far as I can see it's used for all the C/C+ extensions like 
> > > OpenMP/OpenCL/CUDA/HIP/ObjC.
> > > 
> > > If I understand correctly clang supports `-cl-std` only because it's 
> > > required by OpenCL standard. Similar option (i.e. `-sycl-std`) is not 
> > > required by the SYCL specification, so using `-std` is more aligned with 
> > > existing clang design.
> > > 
> > > See clang/include/clang/Basic/LangStandard.h and 
> > > clang/include/clang/Basic/LangStandards.def.
> > In the case of SYCL, you may want to compile your code with C++17 and SYCL 
> > 2015, in which case you need both -std=c++17 and -sycl=sycl-2015 . 
> > SYCL specification mandates a minimum C++ version but users can write code 
> > on newer versions as long as the code in the kernel scope is still valid.
> +1 on this, ComputeCpp used to mix-up both and this proved to be complex to 
> manage. It also integrates better with build systems.
Okay. I'll leave it as a separate option.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:2548
+  Opts.SYCL = Args.hasFlag(options::OPT_fsycl, options::OPT_fno_sycl, false);
+  Opts.SYCLIsDevice = Args.hasArg(options::OPT_fsycl_is_device);
+  if (Opts.SYCL || Opts.SYCLIsDevice) {

Naghasan wrote:
> bader wrote:
> > ABataev wrote:
> > > bader wrote:
> > > > ABataev wrote:
> > > > > bader wrote:
> > > > > > ABataev wrote:
> > > > > > > bader wrote:
> > > > > > > > ABataev wrote:
> > > > > > > > > bader wrote:
> > > > > > > > > > ABataev wrote:
> > > > > > > > > > > This option also must be controlled by `-fsycl`:
> > > > > > > > > > > ```
> > > > > > > > > > > Opts.SYCLIsDevice =  Opts.SYCL && 
> > > > > > > > > > > Args.hasArg(options::OPT_fsycl_is_device);
> > > > > > > > > > > 
> > > > > > > > > > > ```
> > > > > > > > > > Does it really has to? This logic is already present in the 
> > > > > > > > > > driver and it makes front-end tests verbose `%clang_cc1 
> > > > > > > > > > -fsycl -fsycl-is-device`.
> > > > > > > > > > Can `-fsycl-is-device` imply `-fsycl`?
> > > > > > > > > > Looking how CUDA/OpenMP options are handled, not all of 
> > > > > > > > > > them are processed using this pattern.
> > > > > > > > > In general, this is how we handle it in OpenMP. Cuda works 
> > > > > > > > > differently, because it has its own kind of files (.cu) and 
> > > > > > > > > Cuda is triggered by the language switch (-x cu). Seems to 
> > > > > > > > > me, you're using something close to OpenMP model, no? Or do 
> > > > > > > > > you want to define your own language kind just like Cuda?
> > > > > > > > I applied you suggest, although I don't fully understand the 
> > > > > > > > need of using two options instead of two. I would prefer having 
> > > > > > > > following code:
> > > > > > > > ```
> > > > > > > > Opts.SYCLIsDevice = Args.hasArg(options::OPT_fsycl_is_device);
> > > > > > > > Opts.SYCL = Args.hasArg(options::OPT_fsycl) || 
> > > > > > > > Opts.SYCLIsDevice; // -fsycl-is-device enable SYCL 

[PATCH] D72523: [remark][diagnostics] Using clang diagnostic handler for IR input files

[Jeroen Dobbelaere via Phabricator via cfe-commits]

jeroen.dobbelaere added a comment.

This change triggers a crash in a release build of llvm:
See https://bugs.llvm.org/show_bug.cgi?id=44896


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[PATCH] D73903: [AArch64][SVE] Add remaining SVE2 intrinsics for widening DSP operations

[Sander de Smalen via Phabricator via cfe-commits]

sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

LGTM!




Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1100
 [IntrNoMem]>;
+
   class SVE2_2VectorArg_Narrowing_Intrinsic

nit: unnecessary change


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[PATCH] D73903: [AArch64][SVE] Add remaining SVE2 intrinsics for widening DSP operations

[Kerry McLaughlin via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGd4576080da72: [AArch64][SVE] Add remaining SVE2 intrinsics 
for widening DSP operations (authored by kmclaughlin).

Changed prior to commit:
  https://reviews.llvm.org/D73903?vs=244367=245114#toc

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Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-dsp.ll

Index: llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-dsp.ll
===
--- llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-dsp.ll
+++ llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-dsp.ll
@@ -193,6 +193,69 @@
 }
 
 ;
+; SADDWB
+;
+
+define  @saddwb_b( %a,  %b) {
+; CHECK-LABEL: saddwb_b:
+; CHECK: saddwb z0.h, z0.h, z1.b
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.saddwb.nxv8i16( %a,
+   %b)
+  ret  %out
+}
+
+define  @saddwb_h( %a,  %b) {
+; CHECK-LABEL: saddwb_h:
+; CHECK: saddwb z0.s, z0.s, z1.h
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.saddwb.nxv4i32( %a,
+   %b)
+  ret  %out
+}
+
+define  @saddwb_s( %a,  %b) {
+; CHECK-LABEL: saddwb_s:
+; CHECK: saddwb z0.d, z0.d, z1.s
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.saddwb.nxv2i64( %a,
+   %b)
+  ret  %out
+}
+
+;
+; SADDWT
+;
+
+define  @saddwt_b( %a,  %b) {
+; CHECK-LABEL: saddwt_b:
+; CHECK: saddwt z0.h, z0.h, z1.b
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.saddwt.nxv8i16( %a,
+   %b)
+  ret  %out
+}
+
+define  @saddwt_h( %a,  %b) {
+; CHECK-LABEL: saddwt_h:
+; CHECK: saddwt z0.s, z0.s, z1.h
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.saddwt.nxv4i32( %a,
+   %b)
+  ret  %out
+}
+
+define  @saddwt_s( %a,  %b) {
+; CHECK-LABEL: saddwt_s:
+; CHECK: saddwt z0.d, z0.d, z1.s
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.saddwt.nxv2i64( %a,
+   %b)
+  ret  %out
+}
+
+
+;
 ; SMULLB (Vectors)
 ;
 
@@ -224,6 +287,30 @@
 }
 
 ;
+; SMULLB (Indexed)
+;
+
+define  @smullb_lane_h( %a,  %b) {
+; CHECK-LABEL: smullb_lane_h:
+; CHECK: smullb z0.s, z0.h, z1.h[4]
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.smullb.lane.nxv4i32( %a,
+%b,
+   i32 4)
+  ret  %out
+}
+
+define  @smullb_lane_s( %a,  %b) {
+; CHECK-LABEL: smullb_lane_s:
+; CHECK: smullb z0.d, z0.s, z1.s[3]
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.smullb.lane.nxv2i64( %a,
+%b,
+   i32 3)
+  ret  %out
+}
+
+;
 ; SMULLT (Vectors)
 ;
 
@@ -255,6 +342,30 @@
 }
 
 ;
+; SMULLT (Indexed)
+;
+
+define  @smullt_lane_h( %a,  %b) {
+; CHECK-LABEL: smullt_lane_h:
+; CHECK: smullt z0.s, z0.h, z1.h[5]
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.smullt.lane.nxv4i32( %a,
+%b,
+   i32 5)
+  ret  %out
+}
+
+define  @smullt_lane_s( %a,  %b) {
+; CHECK-LABEL: smullt_lane_s:
+; CHECK: smullt z0.d, z0.s, z1.s[2]
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.smullt.lane.nxv2i64( %a,
+%b,
+   i32 2)
+  ret  %out
+}
+
+;
 ; SQDMULLB (Vectors)
 ;
 
@@ -286,6 +397,30 @@
 }
 
 ;
+; SQDMULLB (Indexed)
+;
+
+define  @sqdmullb_lane_h( %a,  %b) {
+; CHECK-LABEL: sqdmullb_lane_h:
+; CHECK: sqdmullb z0.s, z0.h, z1.h[2]
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( %a,
+  %b,
+ i32 2)
+  ret  %out
+}
+
+define  @sqdmullb_lane_s( %a,  %b) {
+; CHECK-LABEL: sqdmullb_lane_s:
+; CHECK: sqdmullb z0.d, z0.s, z1.s[1]
+; CHECK-NEXT: ret
+  %out = call  @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( %a,
+  %b,
+ i32 1)
+  ret  %out
+}
+
+;
 ; SQDMULLT (Vectors)
 ;
 
@@ -317,6 +452,30 @@
 }
 
 ;
+; SQDMULLT (Indexed)
+;
+
+define  

[PATCH] D74564: libclang: Add static build support for Windows

[Cristian Adam via Phabricator via cfe-commits]

cristian.adam added a comment.

I do not have commit rights, I need help to submit this patch.


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[PATCH] D74689: [clang-tidy] Better custom class support for performance-inefficient-vector-operation

[Nathan James via Phabricator via cfe-commits]

njames93 updated this revision to Diff 245115.
njames93 added a comment.

- Added support for converting loops over c style arrays


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Files:
  clang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.cpp
  clang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.h
  clang-tools-extra/docs/ReleaseNotes.rst
  
clang-tools-extra/docs/clang-tidy/checks/performance-inefficient-vector-operation.rst
  
clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp

Index: clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
===
--- clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
+++ clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
@@ -1,7 +1,11 @@
 // RUN: %check_clang_tidy %s performance-inefficient-vector-operation %t -- \
-// RUN: -format-style=llvm \
 // RUN: -config='{CheckOptions: \
-// RUN:  [{key: performance-inefficient-vector-operation.EnableProto, value: 1}]}'
+// RUN:  [{key: performance-inefficient-vector-operation.EnableProto, value: 1}, \
+// RUN:   {key: performance-inefficient-vector-operation.VectorLikeClasses, value : MyContainer}, \
+// RUN:   {key: performance-inefficient-vector-operation.SupportedRanges, value : MyContainer}, \
+// RUN:   {key: performance-inefficient-vector-operation.ReserveNames, value : Reserve}, \
+// RUN:   {key: performance-inefficient-vector-operation.AppendNames, value : PushBack}, \
+// RUN:   {key: performance-inefficient-vector-operation.SizeNames, value : Size}, ]}'
 
 namespace std {
 
@@ -359,3 +363,254 @@
 }
   }
 }
+
+namespace OptionsValidMatchDefault {
+template 
+class MyContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  MyContainer CC1;
+  // CHECK-FIXES: {{^}}  CC1.reserve(C.size());
+  for (auto I : C) {
+CC1.push_back(I);
+// CHECK-MESSAGES: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace OptionsValidMatchDefault
+
+namespace OptionsValidMatchDifferentMethods {
+template 
+class MyContainer {
+public:
+  unsigned Size() const;
+  T *begin() const;
+  T *end() const;
+  void PushBack(const T &);
+  void Reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  MyContainer CC2;
+  // CHECK-FIXES: {{^}}  CC2.Reserve(C.Size());
+  for (auto I : C) {
+CC2.PushBack(I);
+// CHECK-MESSAGES: :[[@LINE-1]]:5: warning: 'PushBack' is called
+  }
+}
+} // namespace OptionsValidMatchDifferentMethods
+
+namespace UnknownContainer {
+template 
+class MyUContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyUContainer ) {
+  // MyUContainer isn't specified as a VectorLikeClass in the Config Options
+  MyUContainer CC3;
+  // CHECK-FIXES-NOT: {{^}}  CC3.reserve(C.size());
+  for (auto I : C) {
+CC3.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace UnknownContainer
+
+namespace PrivateMethods {
+namespace Size {
+template 
+class MyContainer {
+  unsigned size() const;
+
+public:
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::size is private, so calling it will be invalid
+  MyContainer CC4;
+  // CHECK-FIXES-NOT: {{^}}  CC4.reserve(C.size());
+  for (auto I : C) {
+CC4.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace Size
+namespace Reserve {
+template 
+class MyContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+
+private:
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::reserve is private, so calling it will be invalid
+  MyContainer CC5;
+  // CHECK-FIXES-NOT: {{^}}  CC5.reserve(C.size());
+  for (auto I : C) {
+CC5.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace Reserve
+} // namespace PrivateMethods
+
+namespace BadSignatures {
+namespace Size {
+template 
+class MyContainer {
+public:
+  char *size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::size doesn't return an integral type(char *), so ignore this class
+  MyContainer CC6;
+  // CHECK-FIXES-NOT: {{^}}  CC6.reserve(C.size());
+  for (auto I : C) {
+CC6.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is 

[PATCH] D74564: libclang: Add static build support for Windows

[Ivan Donchevskii via Phabricator via cfe-commits]

yvvan accepted this revision.
yvvan added a comment.
This revision is now accepted and ready to land.

LGTM




Comment at: clang/include/clang-c/Platform.h:31
+#elif defined(CINDEX_EXPORTS)
+  #define CINDEX_LINKAGE __attribute__((visibility("default")))
+#endif

cristian.adam wrote:
> yvvan wrote:
> > Is it different from just leaving CINDEX_LINKAGE empty?
> On Windows the default symbol visibility is hidden and with CINDEX_LINKAGE we 
> make the symbols visible.
> 
> On Linux it's the other way around, everything is visible, but 
> with CMAKE_CXX_VISIBILITY_PRESET=hidden we will have the Windows behavior and 
> then we need to make CINDEX_LINKAGE point to something that will make the 
> symbols visible.
but this one happens only in non-Windows case (#elif) so it should not change 
anything I guess


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[PATCH] D74334: [ARM,MVE] Add the vrev16q, vrev32q, vrev64q family.

[Simon Tatham via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGb6236e94799e: [ARM,MVE] Add the vrev16q, vrev32q, vrev64q 
family. (authored by simon_tatham).

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Files:
  clang/include/clang/Basic/arm_mve.td
  clang/include/clang/Basic/arm_mve_defs.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/arm-mve-intrinsics/vrev.c

Index: clang/test/CodeGen/arm-mve-intrinsics/vrev.c
===
--- /dev/null
+++ clang/test/CodeGen/arm-mve-intrinsics/vrev.c
@@ -0,0 +1,215 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg -sroa -early-cse | FileCheck %s
+
+#include 
+
+// CHECK-LABEL: @test_vrev16q_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <16 x i32> 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+int8x16_t test_vrev16q_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vrev16q(a);
+#else /* POLYMORPHIC */
+return vrev16q_s8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev16q_u8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <16 x i32> 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+uint8x16_t test_vrev16q_u8(uint8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vrev16q(a);
+#else /* POLYMORPHIC */
+return vrev16q_u8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev32q_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <16 x i32> 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+int8x16_t test_vrev32q_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vrev32q(a);
+#else /* POLYMORPHIC */
+return vrev32q_s8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev32q_u8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <16 x i32> 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+uint8x16_t test_vrev32q_u8(uint8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vrev32q(a);
+#else /* POLYMORPHIC */
+return vrev32q_u8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev32q_s16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <8 x i16> [[A:%.*]], <8 x i16> undef, <8 x i32> 
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+int16x8_t test_vrev32q_s16(int16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrev32q(a);
+#else /* POLYMORPHIC */
+return vrev32q_s16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev32q_u16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <8 x i16> [[A:%.*]], <8 x i16> undef, <8 x i32> 
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+uint16x8_t test_vrev32q_u16(uint16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrev32q(a);
+#else /* POLYMORPHIC */
+return vrev32q_u16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev32q_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <8 x half> [[A:%.*]], <8 x half> undef, <8 x i32> 
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vrev32q_f16(float16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrev32q(a);
+#else /* POLYMORPHIC */
+return vrev32q_f16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev64q_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <16 x i32> 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+int8x16_t test_vrev64q_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vrev64q(a);
+#else /* POLYMORPHIC */
+return vrev64q_s8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev64q_u8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <16 x i32> 
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+uint8x16_t test_vrev64q_u8(uint8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vrev64q(a);
+#else /* POLYMORPHIC */
+return vrev64q_u8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrev64q_s16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = shufflevector <8 x i16> [[A:%.*]], <8 x i16> undef, <8 x i32> 
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+int16x8_t test_vrev64q_s16(int16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrev64q(a);
+#else /* POLYMORPHIC */
+return vrev64q_s16(a);
+#endif /* POLYMORPHIC */

[PATCH] D74332: [ARM,MVE] Add intrinsics for int <-> float conversion.

[Simon Tatham via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGdf3ed6c0fe31: [ARM,MVE] Add intrinsics for int - 
float conversion. (authored by simon_tatham).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74332/new/

https://reviews.llvm.org/D74332

Files:
  clang/include/clang/Basic/arm_mve.td
  clang/include/clang/Basic/arm_mve_defs.td
  clang/test/CodeGen/arm-mve-intrinsics/vcvt.c

Index: clang/test/CodeGen/arm-mve-intrinsics/vcvt.c
===
--- clang/test/CodeGen/arm-mve-intrinsics/vcvt.c
+++ clang/test/CodeGen/arm-mve-intrinsics/vcvt.c
@@ -4,6 +4,102 @@
 
 #include 
 
+// CHECK-LABEL: @test_vcvtq_f16_s16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = sitofp <8 x i16> [[A:%.*]] to <8 x half>
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vcvtq_f16_s16(int16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vcvtq(a);
+#else /* POLYMORPHIC */
+return vcvtq_f16_s16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vcvtq_f16_u16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = uitofp <8 x i16> [[A:%.*]] to <8 x half>
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vcvtq_f16_u16(uint16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vcvtq(a);
+#else /* POLYMORPHIC */
+return vcvtq_f16_u16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vcvtq_f32_s32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = sitofp <4 x i32> [[A:%.*]] to <4 x float>
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vcvtq_f32_s32(int32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vcvtq(a);
+#else /* POLYMORPHIC */
+return vcvtq_f32_s32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vcvtq_f32_u32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = uitofp <4 x i32> [[A:%.*]] to <4 x float>
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vcvtq_f32_u32(uint32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vcvtq(a);
+#else /* POLYMORPHIC */
+return vcvtq_f32_u32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vcvtq_s16_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = fptosi <8 x half> [[A:%.*]] to <8 x i16>
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+int16x8_t test_vcvtq_s16_f16(float16x8_t a)
+{
+return vcvtq_s16_f16(a);
+}
+
+// CHECK-LABEL: @test_vcvtq_s32_f32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = fptosi <4 x float> [[A:%.*]] to <4 x i32>
+// CHECK-NEXT:ret <4 x i32> [[TMP0]]
+//
+int32x4_t test_vcvtq_s32_f32(float32x4_t a)
+{
+return vcvtq_s32_f32(a);
+}
+
+// CHECK-LABEL: @test_vcvtq_u16_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = fptoui <8 x half> [[A:%.*]] to <8 x i16>
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+uint16x8_t test_vcvtq_u16_f16(float16x8_t a)
+{
+return vcvtq_u16_f16(a);
+}
+
+// CHECK-LABEL: @test_vcvtq_u32_f32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = fptoui <4 x float> [[A:%.*]] to <4 x i32>
+// CHECK-NEXT:ret <4 x i32> [[TMP0]]
+//
+uint32x4_t test_vcvtq_u32_f32(float32x4_t a)
+{
+return vcvtq_u32_f32(a);
+}
+
 // CHECK-LABEL: @test_vcvttq_f16_f32(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcvt.narrow(<8 x half> [[A:%.*]], <4 x float> [[B:%.*]], i32 1)
Index: clang/include/clang/Basic/arm_mve_defs.td
===
--- clang/include/clang/Basic/arm_mve_defs.td
+++ clang/include/clang/Basic/arm_mve_defs.td
@@ -121,6 +121,10 @@
 def splat: CGHelperFn<"ARMMVEVectorSplat">;
 def select: IRBuilder<"CreateSelect">;
 def fneg: IRBuilder<"CreateFNeg">;
+def sitofp: IRBuilder<"CreateSIToFP">;
+def uitofp: IRBuilder<"CreateUIToFP">;
+def fptosi: IRBuilder<"CreateFPToSI">;
+def fptoui: IRBuilder<"CreateFPToUI">;
 
 // A node that makes an Address out of a pointer-typed Value, by
 // providing an alignment as the second argument.
Index: clang/include/clang/Basic/arm_mve.td
===
--- clang/include/clang/Basic/arm_mve.td
+++ clang/include/clang/Basic/arm_mve.td
@@ -400,6 +400,23 @@
   } // params = [f32], pnt = PNT_None
 } // loop over half = "b", "t"
 
+multiclass float_int_conversions {
+  defvar FVector = VecOf;
+  defvar IVector = VecOf;
+
+  let params = [IScalar], pnt = PNT_2Type in
+def : Intrinsic,
+  NameOverride<"vcvtq_" # FScalar>;
+  let params = [FScalar], pnt = PNT_None in
+def : Intrinsic,
+  NameOverride<"vcvtq_" # IScalar>;
+}
+
+defm : float_int_conversions;
+defm : float_int_conversions;
+defm : float_int_conversions;
+defm : float_int_conversions;
+
 multiclass compare_with_pred {
   // Make the predicated and unpredicated versions of a single comparison.
___
cfe-commits mailing list
cfe-commits@lists.llvm.org

[PATCH] D74335: [ARM,MVE] Add intrinsics vclzq and vclsq.

[Simon Tatham via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG68b49f7ef49e: [ARM,MVE] Add intrinsics vclzq and vclsq. 
(authored by simon_tatham).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74335/new/

https://reviews.llvm.org/D74335

Files:
  clang/include/clang/Basic/arm_mve.td
  clang/include/clang/Basic/arm_mve_defs.td
  clang/test/CodeGen/arm-mve-intrinsics/vclz.c
  llvm/include/llvm/IR/IntrinsicsARM.td
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vcls.ll

Index: llvm/test/CodeGen/Thumb2/mve-intrinsics/vcls.ll
===
--- /dev/null
+++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vcls.ll
@@ -0,0 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -verify-machineinstrs -o - %s | FileCheck %s
+
+define arm_aapcs_vfpcc <16 x i8> @test_vclsq_s8(<16 x i8> %a) {
+; CHECK-LABEL: test_vclsq_s8:
+; CHECK:   @ %bb.0: @ %entry
+; CHECK-NEXT:vcls.s8 q0, q0
+; CHECK-NEXT:bx lr
+entry:
+  %0 = tail call <16 x i8> @llvm.arm.mve.vcls.v16i8(<16 x i8> %a)
+  ret <16 x i8> %0
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vclsq_s16(<8 x i16> %a) {
+; CHECK-LABEL: test_vclsq_s16:
+; CHECK:   @ %bb.0: @ %entry
+; CHECK-NEXT:vcls.s16 q0, q0
+; CHECK-NEXT:bx lr
+entry:
+  %0 = tail call <8 x i16> @llvm.arm.mve.vcls.v8i16(<8 x i16> %a)
+  ret <8 x i16> %0
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vclsq_s32(<4 x i32> %a) {
+; CHECK-LABEL: test_vclsq_s32:
+; CHECK:   @ %bb.0: @ %entry
+; CHECK-NEXT:vcls.s32 q0, q0
+; CHECK-NEXT:bx lr
+entry:
+  %0 = tail call <4 x i32> @llvm.arm.mve.vcls.v4i32(<4 x i32> %a)
+  ret <4 x i32> %0
+}
+
+declare <16 x i8> @llvm.arm.mve.vcls.v16i8(<16 x i8>)
+declare <8 x i16> @llvm.arm.mve.vcls.v8i16(<8 x i16>)
+declare <4 x i32> @llvm.arm.mve.vcls.v4i32(<4 x i32>)
Index: llvm/lib/Target/ARM/ARMInstrMVE.td
===
--- llvm/lib/Target/ARM/ARMInstrMVE.td
+++ llvm/lib/Target/ARM/ARMInstrMVE.td
@@ -2076,6 +2076,13 @@
 (v4i32 ( MVE_VCLZs32 (v4i32 MQPR:$val1)))>;
   def : Pat<(v8i16 ( ctlz (v8i16 MQPR:$val1))),
 (v8i16 ( MVE_VCLZs16 (v8i16 MQPR:$val1)))>;
+
+  def : Pat<(v16i8 ( int_arm_mve_vcls (v16i8 MQPR:$val1))),
+(v16i8 ( MVE_VCLSs8 (v16i8 MQPR:$val1)))>;
+  def : Pat<(v4i32 ( int_arm_mve_vcls (v4i32 MQPR:$val1))),
+(v4i32 ( MVE_VCLSs32 (v4i32 MQPR:$val1)))>;
+  def : Pat<(v8i16 ( int_arm_mve_vcls (v8i16 MQPR:$val1))),
+(v8i16 ( MVE_VCLSs16 (v8i16 MQPR:$val1)))>;
 }
 
 class MVE_VABSNEG_int size, bit negate,
Index: llvm/include/llvm/IR/IntrinsicsARM.td
===
--- llvm/include/llvm/IR/IntrinsicsARM.td
+++ llvm/include/llvm/IR/IntrinsicsARM.td
@@ -1161,5 +1161,7 @@
 
 def int_arm_mve_vrintn: Intrinsic<
   [llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>;
+def int_arm_mve_vcls: Intrinsic<
+  [llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>;
 
 } // end TargetPrefix
Index: clang/test/CodeGen/arm-mve-intrinsics/vclz.c
===
--- /dev/null
+++ clang/test/CodeGen/arm-mve-intrinsics/vclz.c
@@ -0,0 +1,132 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+
+#include 
+
+// CHECK-LABEL: @test_vclzq_s8(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> [[A:%.*]], i1 false)
+// CHECK-NEXT:ret <16 x i8> [[TMP0]]
+//
+int8x16_t test_vclzq_s8(int8x16_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+return vclzq_s8(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vclzq_s16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> [[A:%.*]], i1 false)
+// CHECK-NEXT:ret <8 x i16> [[TMP0]]
+//
+int16x8_t test_vclzq_s16(int16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+return vclzq_s16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vclzq_s32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[A:%.*]], i1 false)
+// CHECK-NEXT:ret <4 x i32> [[TMP0]]
+//
+int32x4_t test_vclzq_s32(int32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vclzq(a);
+#else /* POLYMORPHIC */
+return 

[PATCH] D74333: [ARM,MVE] Add intrinsics for FP rounding operations.

[Simon Tatham via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGc8b3196e5430: [ARM,MVE] Add intrinsics for FP rounding 
operations. (authored by simon_tatham).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74333/new/

https://reviews.llvm.org/D74333

Files:
  clang/include/clang/Basic/arm_mve.td
  clang/test/CodeGen/arm-mve-intrinsics/vrnd.c
  llvm/include/llvm/IR/IntrinsicsARM.td
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-intrinsics/vrintn.ll

Index: llvm/test/CodeGen/Thumb2/mve-intrinsics/vrintn.ll
===
--- /dev/null
+++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vrintn.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -verify-machineinstrs -o - %s | FileCheck %s
+
+define arm_aapcs_vfpcc <8 x half> @test_vrndnq_f16(<8 x half> %a) {
+; CHECK-LABEL: test_vrndnq_f16:
+; CHECK:   @ %bb.0: @ %entry
+; CHECK-NEXT:vrintn.f16 q0, q0
+; CHECK-NEXT:bx lr
+entry:
+  %0 = tail call <8 x half> @llvm.arm.mve.vrintn.v8f16(<8 x half> %a)
+  ret <8 x half> %0
+}
+
+define arm_aapcs_vfpcc <4 x float> @test_vrndnq_f32(<4 x float> %a) {
+; CHECK-LABEL: test_vrndnq_f32:
+; CHECK:   @ %bb.0: @ %entry
+; CHECK-NEXT:vrintn.f32 q0, q0
+; CHECK-NEXT:bx lr
+entry:
+  %0 = tail call <4 x float> @llvm.arm.mve.vrintn.v4f32(<4 x float> %a)
+  ret <4 x float> %0
+}
+
+declare <8 x half> @llvm.arm.mve.vrintn.v8f16(<8 x half>)
+declare <4 x float> @llvm.arm.mve.vrintn.v4f32(<4 x float>)
Index: llvm/lib/Target/ARM/ARMInstrMVE.td
===
--- llvm/lib/Target/ARM/ARMInstrMVE.td
+++ llvm/lib/Target/ARM/ARMInstrMVE.td
@@ -3179,6 +3179,10 @@
 (v4f32 (MVE_VRINTf32P (v4f32 MQPR:$val1)))>;
   def : Pat<(v8f16 (fceil (v8f16 MQPR:$val1))),
 (v8f16 (MVE_VRINTf16P (v8f16 MQPR:$val1)))>;
+  def : Pat<(v4f32 (int_arm_mve_vrintn (v4f32 MQPR:$val1))),
+(v4f32 (MVE_VRINTf32N (v4f32 MQPR:$val1)))>;
+  def : Pat<(v8f16 (int_arm_mve_vrintn (v8f16 MQPR:$val1))),
+(v8f16 (MVE_VRINTf16N (v8f16 MQPR:$val1)))>;
 }
 
 class MVEFloatArithNeon, llvm_anyvector_ty>;
+
+def int_arm_mve_vrintn: Intrinsic<
+  [llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>;
+
 } // end TargetPrefix
Index: clang/test/CodeGen/arm-mve-intrinsics/vrnd.c
===
--- /dev/null
+++ clang/test/CodeGen/arm-mve-intrinsics/vrnd.c
@@ -0,0 +1,173 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg -sroa -early-cse | FileCheck %s
+
+#include 
+
+// CHECK-LABEL: @test_vrndaq_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x half> @llvm.round.v8f16(<8 x half> [[A:%.*]])
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vrndaq_f16(float16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrndaq(a);
+#else /* POLYMORPHIC */
+return vrndaq_f16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrndaq_f32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> [[A:%.*]])
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vrndaq_f32(float32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vrndaq(a);
+#else /* POLYMORPHIC */
+return vrndaq_f32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrndmq_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x half> @llvm.floor.v8f16(<8 x half> [[A:%.*]])
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vrndmq_f16(float16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrndmq(a);
+#else /* POLYMORPHIC */
+return vrndmq_f16(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrndmq_f32(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> [[A:%.*]])
+// CHECK-NEXT:ret <4 x float> [[TMP0]]
+//
+float32x4_t test_vrndmq_f32(float32x4_t a)
+{
+#ifdef POLYMORPHIC
+return vrndmq(a);
+#else /* POLYMORPHIC */
+return vrndmq_f32(a);
+#endif /* POLYMORPHIC */
+}
+
+// CHECK-LABEL: @test_vrndpq_f16(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = call <8 x half> @llvm.ceil.v8f16(<8 x half> [[A:%.*]])
+// CHECK-NEXT:ret <8 x half> [[TMP0]]
+//
+float16x8_t test_vrndpq_f16(float16x8_t a)
+{
+#ifdef POLYMORPHIC
+return vrndpq(a);
+#else /* POLYMORPHIC */

[PATCH] D72857: [SYCL] Driver option to enable SYCL mode and select SYCL version

[Victor Lomuller via Phabricator via cfe-commits]

Naghasan added inline comments.



Comment at: clang/include/clang/Basic/LangOptions.def:206
 LANGOPT(OpenCLCPlusPlusVersion , 32, 0, "C++ for OpenCL version")
+ENUM_LANGOPT(SYCLVersion, SYCLVersionList, 4, SYCLVersionList::undefined, 
"Version of the SYCL standard used")
 LANGOPT(NativeHalfType, 1, 0, "Native half type support")

Ruyk wrote:
> bader wrote:
> > All other language options controlling standard versions are added as 
> > "LANGOPT" i.e. `int`. Why SYCLVersion is different?
> > @Ruyk, do you think we should convert other options (e.g. `OpenCL`) to 
> > enums as well?
> Thats a good point. I don't see strong reasons for the enum, basically I read 
> the comment in 
> https://code.woboq.org/llvm/clang/include/clang/Basic/LangOptions.def.html#22
> 
> 
> ```
> // ENUM_LANGOPT: for options that have enumeration, rather than unsigned, 
> type.
> ```
> 
> And since there is a known set of SYCL specifications, made more sense to 
> enumerate it.
> It also simplifies writing variants to 1.2.1 (e.g. 1.2.1-oneapi) in the code 
> since then you can add another entry to the enum.
> 
> But no strong feelings, so feel free to change it.
> 
`int` allows the use of relational operators which should ease version 
managements.

As `SYCLVersionList` is a strongly typed enum so this may not be the best, and 
as the SYCL version are now meant to be a year `int` should do just fine.



Comment at: clang/include/clang/Driver/Options.td:3401
+def sycl_std_EQ : Joined<["-"], "sycl-std=">, Group, 
Flags<[CC1Option]>,
+  HelpText<"SYCL language standard to compile for.">, Values<"1.2.1">;
 

Ruyk wrote:
> bader wrote:
> > What do you think we integrate sycl versions to existing clang options 
> > controlling language version: `-std`.
> > As far as I can see it's used for all the C/C+ extensions like 
> > OpenMP/OpenCL/CUDA/HIP/ObjC.
> > 
> > If I understand correctly clang supports `-cl-std` only because it's 
> > required by OpenCL standard. Similar option (i.e. `-sycl-std`) is not 
> > required by the SYCL specification, so using `-std` is more aligned with 
> > existing clang design.
> > 
> > See clang/include/clang/Basic/LangStandard.h and 
> > clang/include/clang/Basic/LangStandards.def.
> In the case of SYCL, you may want to compile your code with C++17 and SYCL 
> 2015, in which case you need both -std=c++17 and -sycl=sycl-2015 . 
> SYCL specification mandates a minimum C++ version but users can write code on 
> newer versions as long as the code in the kernel scope is still valid.
+1 on this, ComputeCpp used to mix-up both and this proved to be complex to 
manage. It also integrates better with build systems.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:2548
+  Opts.SYCL = Args.hasFlag(options::OPT_fsycl, options::OPT_fno_sycl, false);
+  Opts.SYCLIsDevice = Args.hasArg(options::OPT_fsycl_is_device);
+  if (Opts.SYCL || Opts.SYCLIsDevice) {

bader wrote:
> ABataev wrote:
> > bader wrote:
> > > ABataev wrote:
> > > > bader wrote:
> > > > > ABataev wrote:
> > > > > > bader wrote:
> > > > > > > ABataev wrote:
> > > > > > > > bader wrote:
> > > > > > > > > ABataev wrote:
> > > > > > > > > > This option also must be controlled by `-fsycl`:
> > > > > > > > > > ```
> > > > > > > > > > Opts.SYCLIsDevice =  Opts.SYCL && 
> > > > > > > > > > Args.hasArg(options::OPT_fsycl_is_device);
> > > > > > > > > > 
> > > > > > > > > > ```
> > > > > > > > > Does it really has to? This logic is already present in the 
> > > > > > > > > driver and it makes front-end tests verbose `%clang_cc1 
> > > > > > > > > -fsycl -fsycl-is-device`.
> > > > > > > > > Can `-fsycl-is-device` imply `-fsycl`?
> > > > > > > > > Looking how CUDA/OpenMP options are handled, not all of them 
> > > > > > > > > are processed using this pattern.
> > > > > > > > In general, this is how we handle it in OpenMP. Cuda works 
> > > > > > > > differently, because it has its own kind of files (.cu) and 
> > > > > > > > Cuda is triggered by the language switch (-x cu). Seems to me, 
> > > > > > > > you're using something close to OpenMP model, no? Or do you 
> > > > > > > > want to define your own language kind just like Cuda?
> > > > > > > I applied you suggest, although I don't fully understand the need 
> > > > > > > of using two options instead of two. I would prefer having 
> > > > > > > following code:
> > > > > > > ```
> > > > > > > Opts.SYCLIsDevice = Args.hasArg(options::OPT_fsycl_is_device);
> > > > > > > Opts.SYCL = Args.hasArg(options::OPT_fsycl) || Opts.SYCLIsDevice; 
> > > > > > > // -fsycl-is-device enable SYCL mode as well
> > > > > > > ```
> > > > > > I'm not quite familiar with SYCL model, maybe this the right 
> > > > > > approach. You'd better try to provide more details. Are there any 
> > > > > > differences between just SYCL and SYCL-device compilation modes? 
> > > > > > How do you see the compilation sequence in general? At first 

[PATCH] D69782: Summary: Instead of dropping all the ranges associated with a Diagnostic when converting them to a ClangTidy error, instead attach them to the ClangTidyError, so they can be consumed b

[Alexander Kornienko via Phabricator via cfe-commits]

alexfh added a comment.

Thanks for the update!

Please upload patches with full context. That makes navigating the code much 
easier during reviews. See https://llvm.org/docs/Phabricator.html

A few more comments inline.




Comment at: include/clang/Tooling/Core/Diagnostic.h:62-70
+/// Represents extra source ranges to be associated with a diagnostic.
+struct DiagnosticAssociatedRanges {
+  DiagnosticAssociatedRanges() = default;
+
+  DiagnosticAssociatedRanges(const SourceManager ,
+ ArrayRef SourceRanges);
+

Why is this needed? Shouldn't `LLVM_YAML_IS_SEQUENCE_VECTOR` be enough to allow 
for SmallVector to be yaml serializable? Seems 
to work with `DiagnosticMessage` and `Diagnostic::Notes`.



Comment at: lib/Tooling/Core/Diagnostic.cpp:51
+  for (const CharSourceRange  : SourceRanges) {
+Ranges.emplace_back(DiagnosticAssociatedRange(Sources, Range));
+  }

With emplace_back constructor parameters can be used directly:

  Ranges.emplace_back(Sources, Range);

That's the whole point of `emplace_back`.


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[clang] 8b65f79 - [OpenCL] Add Arm dot product builtin functions

[Sven van Haastregt via cfe-commits]

Author: Sven van Haastregt
Date: 2020-02-18T10:02:06Z
New Revision: 8b65f792a0a96a091c24fdacf4ce04686e0eefb2

URL: 
https://github.com/llvm/llvm-project/commit/8b65f792a0a96a091c24fdacf4ce04686e0eefb2
DIFF: 
https://github.com/llvm/llvm-project/commit/8b65f792a0a96a091c24fdacf4ce04686e0eefb2.diff

LOG: [OpenCL] Add Arm dot product builtin functions

Add the Arm dot product builtin functions from the OpenCL extension
available at
https://www.khronos.org/registry/OpenCL/extensions/arm/cl_arm_integer_dot_product.txt

Patch by Pierre Gondois and Sven van Haastregt.

Added: 


Modified: 
clang/lib/Sema/OpenCLBuiltins.td

Removed: 




diff  --git a/clang/lib/Sema/OpenCLBuiltins.td 
b/clang/lib/Sema/OpenCLBuiltins.td
index 888978dfdbd3..f0790dd32527 100644
--- a/clang/lib/Sema/OpenCLBuiltins.td
+++ b/clang/lib/Sema/OpenCLBuiltins.td
@@ -66,6 +66,12 @@ def FuncExtKhrGlMsaaSharing  : 
FunctionExtension<"cl_khr_gl_msaa_sha
 // Multiple extensions
 def FuncExtKhrMipmapWritesAndWrite3d : 
FunctionExtension<"cl_khr_mipmap_image_writes cl_khr_3d_image_writes">;
 
+// Arm extensions.
+def ArmIntegerDotProductInt8   : 
FunctionExtension<"cl_arm_integer_dot_product_int8">;
+def ArmIntegerDotProductAccumulateInt8 : 
FunctionExtension<"cl_arm_integer_dot_product_accumulate_int8">;
+def ArmIntegerDotProductAccumulateInt16: 
FunctionExtension<"cl_arm_integer_dot_product_accumulate_int16">;
+def ArmIntegerDotProductAccumulateSaturateInt8 : 
FunctionExtension<"cl_arm_integer_dot_product_accumulate_saturate_int8">;
+
 // Qualified Type.  These map to ASTContext::QualType.
 class QualType {
   // Name of the field or function in a clang::ASTContext
@@ -1350,3 +1356,30 @@ let Extension = FuncExtKhrGlMsaaSharing in {
 def : Builtin<"get_image_array_size", [Size, 
ImageType], Attr.Const>;
   }
 }
+
+//
+// Arm extensions.
+let Extension = ArmIntegerDotProductInt8 in {
+  foreach name = ["arm_dot"] in {
+def : Builtin, VectorType]>;
+def : Builtin, VectorType]>;
+  }
+}
+let Extension = ArmIntegerDotProductAccumulateInt8 in {
+  foreach name = ["arm_dot_acc"] in {
+def : Builtin, VectorType, 
UInt]>;
+def : Builtin, VectorType, Int]>;
+  }
+}
+let Extension = ArmIntegerDotProductAccumulateInt16 in {
+  foreach name = ["arm_dot_acc"] in {
+def : Builtin, VectorType, 
UInt]>;
+def : Builtin, VectorType, 
Int]>;
+  }
+}
+let Extension = ArmIntegerDotProductAccumulateSaturateInt8 in {
+  foreach name = ["arm_dot_acc_sat"] in {
+def : Builtin, VectorType, 
UInt]>;
+def : Builtin, VectorType, Int]>;
+  }
+}



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[clang] 58f66f8 - [ARM,CDE] Cosmetic changes, additonal driver tests

[Mikhail Maltsev via cfe-commits]

Author: Mikhail Maltsev
Date: 2020-02-18T10:23:09Z
New Revision: 58f66f8af01db7f7f349654793a2b88376644122

URL: 
https://github.com/llvm/llvm-project/commit/58f66f8af01db7f7f349654793a2b88376644122
DIFF: 
https://github.com/llvm/llvm-project/commit/58f66f8af01db7f7f349654793a2b88376644122.diff

LOG: [ARM,CDE] Cosmetic changes, additonal driver tests

Summary:
This is a follow-up patch addressing post-commit comments in
https://reviews.llvm.org/D74044:
* Add more Clang driver tests (-march=armv8.1m.main and 
-march=armv8.1m.main+mve.fp)
* Clang-format a chunk in ARMAsmParser.cpp
* Add a missing copyright header to ARMInstrCDE.td

Reviewers: SjoerdMeijer, simon_tatham, dmgreen

Reviewed By: SjoerdMeijer

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74732

Added: 


Modified: 
clang/test/Driver/arm-cde.c
llvm/lib/Target/ARM/ARMInstrCDE.td
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Removed: 




diff  --git a/clang/test/Driver/arm-cde.c b/clang/test/Driver/arm-cde.c
index 696bee46cc34..8dfa130da3fb 100644
--- a/clang/test/Driver/arm-cde.c
+++ b/clang/test/Driver/arm-cde.c
@@ -1,5 +1,7 @@
-// RUN: %clang -target arm-none-none-eabi -march=armv8m.main %s -### -c 2>&1 | 
FileCheck %s --check-prefix=CHECK-NOCDE
-// CHECK-NOCDE: "-triple" "thumbv8m.main-none-none-eabi"
+// RUN: %clang -target arm-none-none-eabi -march=armv8m.main %s -### -c 2>&1 | 
FileCheck %s --check-prefixes=CHECK-NOCDE,CHECK-NOCDE-V8
+// RUN: %clang -target arm-none-none-eabi -march=armv8.1m.main %s -### -c 2>&1 
| FileCheck %s --check-prefixes=CHECK-NOCDE,CHECK-NOCDE-V81
+// CHECK-NOCDE-V8: "-triple" "thumbv8m.main-none-none-eabi"
+// CHECK-NOCDE-V81: "-triple" "thumbv8.1m.main-none-none-eabi"
 // CHECK-NOCDE-NOT: "-target-feature" "+cdecp0"
 // CHECK-NOCDE-NOT: "-target-feature" "+cdecp1"
 // CHECK-NOCDE-NOT: "-target-feature" "+cdecp2"
@@ -9,13 +11,20 @@
 // CHECK-NOCDE-NOT: "-target-feature" "+cdecp6"
 // CHECK-NOCDE-NOT: "-target-feature" "+cdecp7"
 
-// RUN: %clang -target arm-none-none-eabi -march=armv8m.main+cdecp0+cdecp3 %s 
-### -c 2>&1 | FileCheck %s --check-prefix=CHECK-CDE1
-// CHECK-CDE1: "-triple" "thumbv8m.main-none-none-eabi"
+// RUN: %clang -target arm-none-none-eabi -march=armv8m.main+cdecp0+cdecp3 %s 
-### -c 2>&1 | FileCheck %s --check-prefixes=CHECK-CDE1,CHECK-CDE1-V8
+// RUN: %clang -target arm-none-none-eabi -march=armv8.1m.main+cdecp0+cdecp3 
%s -### -c 2>&1 | FileCheck %s --check-prefixes=CHECK-CDE1,CHECK-CDE1-V81
+// RUN: %clang -target arm-none-none-eabi 
-march=armv8.1m.main+mve.fp+cdecp0+cdecp3 %s -### -c 2>&1 | FileCheck %s 
--check-prefixes=CHECK-CDE1,CHECK-CDE1-V81MVE
+// CHECK-CDE1-V8: "-triple" "thumbv8m.main-none-none-eabi"
+// CHECK-CDE1-V81: "-triple" "thumbv8.1m.main-none-none-eabi"
+// CHECK-CDE1-V81MVE: "-triple" "thumbv8.1m.main-none-none-eabi"
+// CHECK-CDE1-V81MVE-DAG: "-target-feature" "+mve.fp"
 // CHECK-CDE1-DAG: "-target-feature" "+cdecp0"
 // CHECK-CDE1-DAG: "-target-feature" "+cdecp3"
 
-// RUN: %clang -target arm-none-none-eabi -march=armv8m.main+cdecp0+cdecp3 %s 
-### -c 2>&1 | FileCheck %s --check-prefix=CHECK-CDE2
-// CHECK-CDE2: "-triple" "thumbv8m.main-none-none-eabi"
+// RUN: %clang -target arm-none-none-eabi -march=armv8m.main+cdecp0+cdecp3 %s 
-### -c 2>&1 | FileCheck %s --check-prefixes=CHECK-CDE2,CHECK-CDE2-V8
+// RUN: %clang -target arm-none-none-eabi -march=armv8.1m.main+cdecp0+cdecp3 
%s -### -c 2>&1 | FileCheck %s --check-prefixes=CHECK-CDE2,CHECK-CDE2-V81
+// CHECK-CDE2-V8: "-triple" "thumbv8m.main-none-none-eabi"
+// CHECK-CDE2-V81: "-triple" "thumbv8.1m.main-none-none-eabi"
 // CHECK-CDE2-NOT: "-target-feature" "+cdecp1"
 // CHECK-CDE2-NOT: "-target-feature" "+cdecp2"
 // CHECK-CDE2-NOT: "-target-feature" "+cdecp4"

diff  --git a/llvm/lib/Target/ARM/ARMInstrCDE.td 
b/llvm/lib/Target/ARM/ARMInstrCDE.td
index 4e73ea819473..fb02e9fefd8c 100644
--- a/llvm/lib/Target/ARM/ARMInstrCDE.td
+++ b/llvm/lib/Target/ARM/ARMInstrCDE.td
@@ -1,3 +1,15 @@
+//===-- ARMInstrCDE.td - CDE support for ARM ---*- tablegen 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file describes the Arm CDE (Custom Datapath Extension) instruction set.
+//
+//===--===//
+
 // Immediate operand of arbitrary bit width
 class BitWidthImmOperand
   : ImmAsmOperand<0, !add(!shl(1, width), -1)> {

diff  --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp 
b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 65c2d4790633..3ffee6804b3c 100644
--- 

[PATCH] D74689: [clang-tidy] Better custom class support for performance-inefficient-vector-operation

[Nathan James via Phabricator via cfe-commits]

njames93 updated this revision to Diff 245116.
njames93 added a comment.

- Small nit


Repository:
  rG LLVM Github Monorepo

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Files:
  clang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.cpp
  clang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.h
  clang-tools-extra/docs/ReleaseNotes.rst
  
clang-tools-extra/docs/clang-tidy/checks/performance-inefficient-vector-operation.rst
  
clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp

Index: clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
===
--- clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
+++ clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
@@ -1,7 +1,11 @@
 // RUN: %check_clang_tidy %s performance-inefficient-vector-operation %t -- \
-// RUN: -format-style=llvm \
 // RUN: -config='{CheckOptions: \
-// RUN:  [{key: performance-inefficient-vector-operation.EnableProto, value: 1}]}'
+// RUN:  [{key: performance-inefficient-vector-operation.EnableProto, value: 1}, \
+// RUN:   {key: performance-inefficient-vector-operation.VectorLikeClasses, value : MyContainer}, \
+// RUN:   {key: performance-inefficient-vector-operation.SupportedRanges, value : MyContainer}, \
+// RUN:   {key: performance-inefficient-vector-operation.ReserveNames, value : Reserve}, \
+// RUN:   {key: performance-inefficient-vector-operation.AppendNames, value : PushBack}, \
+// RUN:   {key: performance-inefficient-vector-operation.SizeNames, value : Size}, ]}'
 
 namespace std {
 
@@ -359,3 +363,254 @@
 }
   }
 }
+
+namespace OptionsValidMatchDefault {
+template 
+class MyContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  MyContainer CC1;
+  // CHECK-FIXES: {{^}}  CC1.reserve(C.size());
+  for (auto I : C) {
+CC1.push_back(I);
+// CHECK-MESSAGES: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace OptionsValidMatchDefault
+
+namespace OptionsValidMatchDifferentMethods {
+template 
+class MyContainer {
+public:
+  unsigned Size() const;
+  T *begin() const;
+  T *end() const;
+  void PushBack(const T &);
+  void Reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  MyContainer CC2;
+  // CHECK-FIXES: {{^}}  CC2.Reserve(C.Size());
+  for (auto I : C) {
+CC2.PushBack(I);
+// CHECK-MESSAGES: :[[@LINE-1]]:5: warning: 'PushBack' is called
+  }
+}
+} // namespace OptionsValidMatchDifferentMethods
+
+namespace UnknownContainer {
+template 
+class MyUContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyUContainer ) {
+  // MyUContainer isn't specified as a VectorLikeClass in the Config Options
+  MyUContainer CC3;
+  // CHECK-FIXES-NOT: {{^}}  CC3.reserve(C.size());
+  for (auto I : C) {
+CC3.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace UnknownContainer
+
+namespace PrivateMethods {
+namespace Size {
+template 
+class MyContainer {
+  unsigned size() const;
+
+public:
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::size is private, so calling it will be invalid
+  MyContainer CC4;
+  // CHECK-FIXES-NOT: {{^}}  CC4.reserve(C.size());
+  for (auto I : C) {
+CC4.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace Size
+namespace Reserve {
+template 
+class MyContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+
+private:
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::reserve is private, so calling it will be invalid
+  MyContainer CC5;
+  // CHECK-FIXES-NOT: {{^}}  CC5.reserve(C.size());
+  for (auto I : C) {
+CC5.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace Reserve
+} // namespace PrivateMethods
+
+namespace BadSignatures {
+namespace Size {
+template 
+class MyContainer {
+public:
+  char *size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::size doesn't return an integral type(char *), so ignore this class
+  MyContainer CC6;
+  // CHECK-FIXES-NOT: {{^}}  CC6.reserve(C.size());
+  for (auto I : C) {
+CC6.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace Size
+namespace 

[PATCH] D73846: make sure to not warn about unused macros from -D

[Luboš Luňák via Phabricator via cfe-commits]

llunak added a comment.

Ping..


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[PATCH] D69585: PerformPendingInstatiations() already in the PCH

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llunak added a comment.

Ping.


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[PATCH] D74698: [CodeGen] -pg shouldn't add "frame-pointer"="all" fn attr w/ -mfentry

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers added a comment.

In D74698#1881034 , @MaskRay wrote:

> When -mfentry is specified, why should frame pointers be disabled?


It doesn't disable them; `-pg` was force enabling them for all functions, when 
in GCC does not enable them for the combination of `-pg -mfentry`.  This patch 
is simply matching the behavior of GCC.  If you want the existing behavior, 
then `-pg -mfentry -fno-omit-frame-pointer` works with this patch applied.  
`-pg` should not be setting `-fno-omit-frame-pointers` in the presence of 
`-mfentry`.

> Is that because the Linux kernel has assumption about the exact code 
> sequence? `call __fentry__` is the first instruction. Isn't that sufficient?

It's not that the current implementation is broken or doesn't work, it's that 
it's inefficient from the Kernel's perspective.  The kernel does not want frame 
pointers as it has its own means for unwinding (though there are many unwinders 
in the kernel, sometimes per architecture, some do rely on frame pointers but 
explicitly add `-fno-omit-frame-pointer` if necessary). When configuring a 
kernel to be able to trace kernel execution at runtime, `-pg -mfentry` are 
added for x86_64, specifically because they don't add frame pointers.  So it 
seems like Clang is strictly worse than GCC in this regard, as when enabling 
kernel tracing, suddenly clang starts emitting unwanted frame pointer 
instructions.

> (This may be another example demonstrating that piggybacking an option 
> (-mfentry) on top of an existing one (-pg) can turn out to be a bad idea...)

Agreed.

Also, more context:
https://www.linuxjournal.com/content/simplifying-function-tracing-modern-gcc
https://lore.kernel.org/patchwork/patch/1072232/
https://linux.kernel.narkive.com/X1y4Jcj4/rfc-how-to-handle-function-tracing-frame-pointers-and-mfentry


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[PATCH] D70172: [CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing AST travese

[Eric Christopher via Phabricator via cfe-commits]

echristo added a comment.

In D70172#1879481 , @jpienaar wrote:

> This seems to result in triggering clang/lib/CodeGen/CGExpr.cpp:2626 when 
> compiling mlir/lib/Transforms/AffineDataCopyGeneration.cpp with clang build 
> with assertions on (clean build at e8e078c 
>  just 
> before this change, broken at this, assert triggering at build fix commit).
>
> https://buildkite.com/mlir/mlir-core/builds/2792#a54fb239-718b-4f0b-a309-f83e46ceb252


Seems reasonable to revert if there's a testcase that they can get from 
rebuilding llvm with mlir enabled.


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[clang] 36f480f - Revert "[CUDA][HIP][OpenMP] Add lib/Sema/UsedDeclVisitor.h after D70172"

[Yaxun Liu via cfe-commits]

Author: Yaxun (Sam) Liu
Date: 2020-02-18T14:45:34-05:00
New Revision: 36f480f22c25d5bb253db77f46cf089d16318e6b

URL: 
https://github.com/llvm/llvm-project/commit/36f480f22c25d5bb253db77f46cf089d16318e6b
DIFF: 
https://github.com/llvm/llvm-project/commit/36f480f22c25d5bb253db77f46cf089d16318e6b.diff

LOG: Revert "[CUDA][HIP][OpenMP] Add lib/Sema/UsedDeclVisitor.h after D70172"

This reverts commit c7fa409bcadaf4ddba1862b2e52349e0ab03d1b4.

Added: 


Modified: 


Removed: 
clang/lib/Sema/UsedDeclVisitor.h



diff  --git a/clang/lib/Sema/UsedDeclVisitor.h 
b/clang/lib/Sema/UsedDeclVisitor.h
deleted file mode 100644
index 440029a1d567..
--- a/clang/lib/Sema/UsedDeclVisitor.h
+++ /dev/null
@@ -1,70 +0,0 @@
-//===- UsedDeclVisitor.h - ODR-used declarations visitor *- C++ 
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//===--===//
-//
-//  This file defines UsedDeclVisitor, a CRTP class which visits all the
-//  declarations that are ODR-used by an expression or statement.
-//
-//===--===//
-
-#ifndef LLVM_CLANG_LIB_SEMA_USEDDECLVISITOR_H
-#define LLVM_CLANG_LIB_SEMA_USEDDECLVISITOR_H
-
-#include "clang/AST/EvaluatedExprVisitor.h"
-#include "clang/Sema/SemaInternal.h"
-
-namespace clang {
-template 
-class UsedDeclVisitor : public EvaluatedExprVisitor {
-protected:
-  Sema 
-
-public:
-  typedef EvaluatedExprVisitor Inherited;
-
-  UsedDeclVisitor(Sema ) : Inherited(S.Context), S(S) {}
-
-  Derived () { return *static_cast(this); }
-
-  void VisitCXXBindTemporaryExpr(CXXBindTemporaryExpr *E) {
-asImpl().visitUsedDecl(
-E->getBeginLoc(),
-const_cast(E->getTemporary()->getDestructor()));
-asImpl().Visit(E->getSubExpr());
-  }
-
-  void VisitCXXNewExpr(CXXNewExpr *E) {
-if (E->getOperatorNew())
-  asImpl().visitUsedDecl(E->getBeginLoc(), E->getOperatorNew());
-if (E->getOperatorDelete())
-  asImpl().visitUsedDecl(E->getBeginLoc(), E->getOperatorDelete());
-Inherited::VisitCXXNewExpr(E);
-  }
-
-  void VisitCXXDeleteExpr(CXXDeleteExpr *E) {
-if (E->getOperatorDelete())
-  asImpl().visitUsedDecl(E->getBeginLoc(), E->getOperatorDelete());
-QualType Destroyed = S.Context.getBaseElementType(E->getDestroyedType());
-if (const RecordType *DestroyedRec = Destroyed->getAs()) {
-  CXXRecordDecl *Record = cast(DestroyedRec->getDecl());
-  asImpl().visitUsedDecl(E->getBeginLoc(), S.LookupDestructor(Record));
-}
-
-Inherited::VisitCXXDeleteExpr(E);
-  }
-
-  void VisitCXXConstructExpr(CXXConstructExpr *E) {
-asImpl().visitUsedDecl(E->getBeginLoc(), E->getConstructor());
-Inherited::VisitCXXConstructExpr(E);
-  }
-
-  void VisitCXXDefaultArgExpr(CXXDefaultArgExpr *E) {
-asImpl().Visit(E->getExpr());
-  }
-};
-} // end namespace clang
-
-#endif // LLVM_CLANG_LIB_SEMA_USEDDECLVISITOR_H



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[clang] 58817a0 - [clang][XCOFF] Indicate that XCOFF does not support COMDATs

[David Tenty via cfe-commits]

Author: David Tenty
Date: 2020-02-18T16:10:11-05:00
New Revision: 58817a0783ca405cd36a312c7ee80e061d1cecc5

URL: 
https://github.com/llvm/llvm-project/commit/58817a0783ca405cd36a312c7ee80e061d1cecc5
DIFF: 
https://github.com/llvm/llvm-project/commit/58817a0783ca405cd36a312c7ee80e061d1cecc5.diff

LOG: [clang][XCOFF] Indicate that XCOFF does not support COMDATs

Summary: XCOFF doesn't support COMDATs, so clang shouldn't emit them.

Reviewers: stevewan, sfertile, Xiangling_L

Reviewed By: sfertile

Subscribers: dschuff, aheejin, dexonsmith, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74631

Added: 
clang/test/CodeGen/xcoff-comdat.cpp

Modified: 
llvm/docs/LangRef.rst
llvm/include/llvm/ADT/Triple.h

Removed: 




diff  --git a/clang/test/CodeGen/xcoff-comdat.cpp 
b/clang/test/CodeGen/xcoff-comdat.cpp
new file mode 100644
index ..7da8d9a2cc22
--- /dev/null
+++ b/clang/test/CodeGen/xcoff-comdat.cpp
@@ -0,0 +1,10 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix -emit-llvm -o - %s | FileCheck %s
+
+class a {
+  virtual void d() {}
+  virtual void e();
+};
+void a::e() {}
+
+// CHECK-NOT: = comdat

diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 2a61e0b19987..d14853a4e0d5 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -910,8 +910,8 @@ The selection kind must be one of the following:
 The linker may choose any COMDAT key but the sections must contain the
 same amount of data.
 
-Note that the Mach-O platform doesn't support COMDATs, and ELF and WebAssembly
-only support ``any`` as a selection kind.
+Note that XCOFF and the Mach-O platform don't support COMDATs, and ELF and
+WebAssembly only support ``any`` as a selection kind.
 
 Here is an example of a COMDAT group where a function will only be selected if
 the COMDAT key's section is the largest:

diff  --git a/llvm/include/llvm/ADT/Triple.h b/llvm/include/llvm/ADT/Triple.h
index 76a754d671fb..64ba8d7e21e4 100644
--- a/llvm/include/llvm/ADT/Triple.h
+++ b/llvm/include/llvm/ADT/Triple.h
@@ -743,7 +743,7 @@ class Triple {
 
   /// Tests whether the target supports comdat
   bool supportsCOMDAT() const {
-return !isOSBinFormatMachO();
+return !(isOSBinFormatMachO() || isOSBinFormatXCOFF());
   }
 
   /// Tests whether the target uses emulated TLS as default.



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[PATCH] D74698: [CodeGen] -pg shouldn't unconditionally add "frame-pointer"="all" fn attr w/ -mfentry

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added inline comments.



Comment at: clang/test/CodeGen/fentry.c:6
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -fno-omit-frame-pointer -emit-llvm -S -o - %s 
| FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s

Oh, `%clang` tests should be moved to `test/Driver/mfentry.c`


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[PATCH] D74698: [CodeGen] -pg shouldn't unconditionally add "frame-pointer"="all" fn attr w/ -mfentry

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers updated this revision to Diff 245245.
nickdesaulniers added a comment.

- add test for explicitly re-enabling -fno-omit-frame-pointer at -O2


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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/fentry.c


Index: clang/test/CodeGen/fentry.c
===
--- clang/test/CodeGen/fentry.c
+++ clang/test/CodeGen/fentry.c
@@ -2,6 +2,9 @@
 // RUN: %clang_cc1 -pg -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o 
- %s | FileCheck %s
 // RUN: %clang_cc1 -mfentry -triple i386-unknown-unknown -emit-llvm -o - %s | 
FileCheck -check-prefix=NOPG %s
 // RUN: %clang_cc1 -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o - 
%s | FileCheck -check-prefix=NOPG %s
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -fno-omit-frame-pointer -emit-llvm -S -o - %s 
| FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s
 
 int foo(void) {
   return 0;
@@ -16,3 +19,5 @@
 //CHECK-NOT: attributes #1 = { {{.*}}"fentry-call"="true"{{.*}} }
 //NOPG-NOT: attributes #0 = { {{.*}}"fentry-call"{{.*}} }
 //NOPG-NOT: attributes #1 = { {{.*}}"fentry-call"{{.*}} }
+//FP: "frame-pointer"="all"
+//NOFP: "frame-pointer"="none"
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -526,7 +526,7 @@
 
 static bool useFramePointerForTargetByDefault(const ArgList ,
   const llvm::Triple ) {
-  if (Args.hasArg(options::OPT_pg))
+  if (Args.hasArg(options::OPT_pg) && !Args.hasArg(options::OPT_mfentry))
 return true;
 
   switch (Triple.getArch()) {
@@ -6150,7 +6150,8 @@
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_pg))
-if (FPKeepKind == CodeGenOptions::FramePointerKind::None)
+if (FPKeepKind == CodeGenOptions::FramePointerKind::None &&
+!Args.hasArg(options::OPT_mfentry))
   D.Diag(diag::err_drv_argument_not_allowed_with) << "-fomit-frame-pointer"
   << A->getAsString(Args);
 


Index: clang/test/CodeGen/fentry.c
===
--- clang/test/CodeGen/fentry.c
+++ clang/test/CodeGen/fentry.c
@@ -2,6 +2,9 @@
 // RUN: %clang_cc1 -pg -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -mfentry -triple i386-unknown-unknown -emit-llvm -o - %s | FileCheck -check-prefix=NOPG %s
 // RUN: %clang_cc1 -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=NOPG %s
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -fno-omit-frame-pointer -emit-llvm -S -o - %s | FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck -check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s
 
 int foo(void) {
   return 0;
@@ -16,3 +19,5 @@
 //CHECK-NOT: attributes #1 = { {{.*}}"fentry-call"="true"{{.*}} }
 //NOPG-NOT: attributes #0 = { {{.*}}"fentry-call"{{.*}} }
 //NOPG-NOT: attributes #1 = { {{.*}}"fentry-call"{{.*}} }
+//FP: "frame-pointer"="all"
+//NOFP: "frame-pointer"="none"
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -526,7 +526,7 @@
 
 static bool useFramePointerForTargetByDefault(const ArgList ,
   const llvm::Triple ) {
-  if (Args.hasArg(options::OPT_pg))
+  if (Args.hasArg(options::OPT_pg) && !Args.hasArg(options::OPT_mfentry))
 return true;
 
   switch (Triple.getArch()) {
@@ -6150,7 +6150,8 @@
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_pg))
-if (FPKeepKind == CodeGenOptions::FramePointerKind::None)
+if (FPKeepKind == CodeGenOptions::FramePointerKind::None &&
+!Args.hasArg(options::OPT_mfentry))
   D.Diag(diag::err_drv_argument_not_allowed_with) << "-fomit-frame-pointer"
   << A->getAsString(Args);
 
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[PATCH] D72857: [SYCL] Driver option to enable SYCL mode and select SYCL version

[Ronan Keryell via Phabricator via cfe-commits]

keryell added inline comments.



Comment at: clang/include/clang/Driver/Options.td:3419
+def sycl_std_EQ : Joined<["-"], "sycl-std=">, Group, 
Flags<[CC1Option, NoArgumentUnused, CoreOption]>,
+  HelpText<"SYCL language standard to compile for.">, Values<"2015, 121, 
1.2.1, sycl-1.2.1">;
 

I suggest replacing all the 2015 by 2017.
While this is true SYCL 1.2 was published in 2015, SYCL 1.2.1 was published in 
2017. Only 1.2.1 matters here since 1.2 was never fully implemented by any 
conformant implementation. https://en.wikipedia.org/wiki/SYCL



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4034
+  // Ensure the default version in SYCL mode is 1.2.1 (aka 2015)
+  CmdArgs.push_back("-sycl-std=2015");
+}

Replace 2015 by 2017 in both lines above.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:2554
+  Opts.SYCLVersion = llvm::StringSwitch(A->getValue())
+ .Cases("2015", "1.2.1", "121", "sycl-1.2.1", 2015)
+ .Default(0U);

Replace 2015 by 2017.



Comment at: clang/lib/Frontend/InitPreprocessor.cpp:456
+// SYCL Version is set to a value when building SYCL applications
+if (LangOpts.SYCLVersion == 2015)
+  Builder.defineMacro("CL_SYCL_LANGUAGE_VERSION", "121");

Replace 2015 by 2017.



Comment at: clang/test/Driver/sycl.c:5
+// RUN: %clang -### -fsycl -sycl-std=121 %s 2>&1 | FileCheck %s 
--check-prefix=ENABLED
+// RUN: %clang -### -fsycl -sycl-std=2015 %s 2>&1 | FileCheck %s 
--check-prefix=ENABLED
+// RUN: %clang -### -fsycl -sycl-std=sycl-1.2.1 %s 2>&1 | FileCheck %s 
--check-prefix=ENABLED

Replace all the 2015 by 2017 here and below.


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[PATCH] D74704: Support -fuse-ld=lld for riscv

[serge via Phabricator via cfe-commits]

serge-sans-paille added a comment.

Reverted through b8bea9346af4f2644c9a1bd29710c5e3efbbd7d3 



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[PATCH] D73138: [libcxx] [test] Correct asserted type in subspan test; subspan with count should never produce dynamic_extent

[Billy Robert O'Neal III via Phabricator via cfe-commits]

BillyONeal added a comment.

@ldionne I think you're correct, though the test there is more complex than it 
needs to be (because the ==Count cases are the only ever encountered here).


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[PATCH] D74704: Support -fuse-ld=lld for riscv

[serge via Phabricator via cfe-commits]

serge-sans-paille added a comment.

I'll revert and propose an updated patch then.


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[PATCH] D74704: Support -fuse-ld=lld for riscv

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added a comment.

The problem may be `-DCLANG_DEFAULT_LINKER=lld`.

(FWIW I really don't like supporting numerous -D configurations and ask authors 
to revert because of some weird -D configurations.)


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[PATCH] D74784: [driver][darwin] Don't use -platform_version flag by default

[dmajor via Phabricator via cfe-commits]

dmajor created this revision.
dmajor added reviewers: arphaman, steven_wu, dexonsmith.
dmajor added projects: clang, LLVM.
Herald added a subscriber: cfe-commits.

(Note, I don't currently have commit access.)

The code in llvmorg-10-init-12188-g25ce33a6e4f is a breaking change for users 
of older linkers who don't pass a version parameter, which prevents a drop-in 
clang upgrade. Old tools can't know about what future tools will do, so as a 
general principle the burden should be new tools to be compatible by default. 
Also, for comparison, none of the other tests of `Version` within `AddLinkArgs` 
add any new behaviors unless the version is explicitly specified. Therefore, 
this patch changes the `-platform_version` behavior from opt-out to opt-in.

In light of the test fixup in llvmorg-10-init-12213-gbe88a20c900, I've used 
`-mlinker-version=0` instead of doing a straight revert of the additions of 
`-mlinker-version=400`.


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Files:
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/test/Driver/darwin-infer-simulator-sdkroot.c
  clang/test/Driver/darwin-ld-platform-version-macos.c
  clang/test/Driver/darwin-ld.c
  clang/test/Driver/darwin-sdkroot.c
  clang/test/Driver/target-triple-deployment.c

Index: clang/test/Driver/target-triple-deployment.c
===
--- clang/test/Driver/target-triple-deployment.c
+++ clang/test/Driver/target-triple-deployment.c
@@ -1,14 +1,14 @@
 // RUN: touch %t.o
-// RUN: %clang -target x86_64-apple-macosx10.4 -mlinker-version=400 -### %t.o 2> %t.log
-// RUN: %clang -target x86_64-apple-darwin9 -mlinker-version=400 -### %t.o 2>> %t.log
-// RUN: %clang -target x86_64-apple-macosx10.7 -mlinker-version=400 -### %t.o 2>> %t.log
+// RUN: %clang -target x86_64-apple-macosx10.4 -mlinker-version=0 -### %t.o 2> %t.log
+// RUN: %clang -target x86_64-apple-darwin9 -mlinker-version=0 -### %t.o 2>> %t.log
+// RUN: %clang -target x86_64-apple-macosx10.7 -mlinker-version=0 -### %t.o 2>> %t.log
 //
-// RUN: %clang -target armv7-apple-ios -mlinker-version=400 -### %t.o 2>> %t.log
-// RUN: %clang -target armv7-apple-ios0.0 -mlinker-version=400 -### %t.o 2>> %t.log
-// RUN: %clang -target armv7-apple-ios1.2.3 -mlinker-version=400 -### %t.o 2>> %t.log
-// RUN: %clang -target armv7-apple-ios5.0 -mlinker-version=400 -### %t.o 2>> %t.log
-// RUN: %clang -target armv7-apple-ios7.0 -mlinker-version=400 -### %t.o 2>> %t.log
-// RUN: %clang -target arm64-apple-ios -mlinker-version=400 -### %t.o 2>> %t.log
+// RUN: %clang -target armv7-apple-ios -mlinker-version=0 -### %t.o 2>> %t.log
+// RUN: %clang -target armv7-apple-ios0.0 -mlinker-version=0 -### %t.o 2>> %t.log
+// RUN: %clang -target armv7-apple-ios1.2.3 -mlinker-version=0 -### %t.o 2>> %t.log
+// RUN: %clang -target armv7-apple-ios5.0 -mlinker-version=0 -### %t.o 2>> %t.log
+// RUN: %clang -target armv7-apple-ios7.0 -mlinker-version=0 -### %t.o 2>> %t.log
+// RUN: %clang -target arm64-apple-ios -mlinker-version=0 -### %t.o 2>> %t.log
 //
 // RUN: FileCheck %s < %t.log
 
Index: clang/test/Driver/darwin-sdkroot.c
===
--- clang/test/Driver/darwin-sdkroot.c
+++ clang/test/Driver/darwin-sdkroot.c
@@ -43,7 +43,7 @@
 //
 // RUN: rm -rf %t/SDKs/iPhoneOS8.0.0.sdk
 // RUN: mkdir -p %t/SDKs/iPhoneOS8.0.0.sdk
-// RUN: env SDKROOT=%t/SDKs/iPhoneOS8.0.0.sdk %clang -target arm64-apple-darwin -mlinker-version=400 --sysroot="" %s -### 2>&1 \
+// RUN: env SDKROOT=%t/SDKs/iPhoneOS8.0.0.sdk %clang -target arm64-apple-darwin -mlinker-version=0 --sysroot="" %s -### 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-IPHONE %s
 //
 // CHECK-IPHONE: clang
@@ -55,7 +55,7 @@
 //
 // RUN: rm -rf %t/SDKs/iPhoneSimulator8.0.sdk
 // RUN: mkdir -p %t/SDKs/iPhoneSimulator8.0.sdk
-// RUN: env SDKROOT=%t/SDKs/iPhoneSimulator8.0.sdk %clang -target x86_64-apple-darwin -mlinker-version=400 --sysroot="" %s -### 2>&1 \
+// RUN: env SDKROOT=%t/SDKs/iPhoneSimulator8.0.sdk %clang -target x86_64-apple-darwin -mlinker-version=0 --sysroot="" %s -### 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-SIMULATOR %s
 //
 // CHECK-SIMULATOR: clang
@@ -66,7 +66,7 @@
 //
 // RUN: rm -rf %t/SDKs/MacOSX10.10.0.sdk
 // RUN: mkdir -p %t/SDKs/MacOSX10.10.0.sdk
-// RUN: env SDKROOT=%t/SDKs/MacOSX10.10.0.sdk %clang -target x86_64-apple-darwin -mlinker-version=400 --sysroot="" %s -### 2>&1 \
+// RUN: env SDKROOT=%t/SDKs/MacOSX10.10.0.sdk %clang -target x86_64-apple-darwin -mlinker-version=0 --sysroot="" %s -### 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-MACOSX %s
 //
 // CHECK-MACOSX: clang
Index: clang/test/Driver/darwin-ld.c
===
--- clang/test/Driver/darwin-ld.c
+++ clang/test/Driver/darwin-ld.c
@@ -11,9 +11,9 @@
 
 // Check linker changes that came with new linkedit format.
 // RUN: touch %t.o
-// RUN: %clang -target i386-apple-darwin9 

[PATCH] D74033: [clang-tidy] Fix PR#44620 'readability-redundant-string-cstr quick-fix causes invalid code'

[Karasev Nikita via Phabricator via cfe-commits]

f00kat added a comment.

Yes, commit please. Thank you!


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[PATCH] D73138: [libcxx] [test] Correct asserted type in subspan test; subspan with count should never produce dynamic_extent

[Louis Dionne via Phabricator via cfe-commits]

ldionne accepted this revision.
ldionne added a comment.
This revision is now accepted and ready to land.

In D73138#1881198 , @BillyONeal wrote:

> @ldionne I think you're correct, though the test there is more complex than 
> it needs to be (because the ==Count cases are the only ever encountered here).


Hmm, yes, you're right! I'll take your patch on top. Thanks!


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[PATCH] D74698: [CodeGen] -pg shouldn't add "frame-pointer"="all" fn attr w/ -mfentry

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers updated this revision to Diff 245241.
nickdesaulniers added a comment.

- prefer implicit-check-not, add test for -O2 vs -O0


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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/fentry.c


Index: clang/test/CodeGen/fentry.c
===
--- clang/test/CodeGen/fentry.c
+++ clang/test/CodeGen/fentry.c
@@ -2,6 +2,8 @@
 // RUN: %clang_cc1 -pg -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o 
- %s | FileCheck %s
 // RUN: %clang_cc1 -mfentry -triple i386-unknown-unknown -emit-llvm -o - %s | 
FileCheck -check-prefix=NOPG %s
 // RUN: %clang_cc1 -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o - 
%s | FileCheck -check-prefix=NOPG %s
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s
 
 int foo(void) {
   return 0;
@@ -16,3 +18,5 @@
 //CHECK-NOT: attributes #1 = { {{.*}}"fentry-call"="true"{{.*}} }
 //NOPG-NOT: attributes #0 = { {{.*}}"fentry-call"{{.*}} }
 //NOPG-NOT: attributes #1 = { {{.*}}"fentry-call"{{.*}} }
+//FP: "frame-pointer"="all"
+//NOFP: "frame-pointer"="none"
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -526,7 +526,7 @@
 
 static bool useFramePointerForTargetByDefault(const ArgList ,
   const llvm::Triple ) {
-  if (Args.hasArg(options::OPT_pg))
+  if (Args.hasArg(options::OPT_pg) && !Args.hasArg(options::OPT_mfentry))
 return true;
 
   switch (Triple.getArch()) {
@@ -6150,7 +6150,8 @@
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_pg))
-if (FPKeepKind == CodeGenOptions::FramePointerKind::None)
+if (FPKeepKind == CodeGenOptions::FramePointerKind::None &&
+!Args.hasArg(options::OPT_mfentry))
   D.Diag(diag::err_drv_argument_not_allowed_with) << "-fomit-frame-pointer"
   << A->getAsString(Args);
 


Index: clang/test/CodeGen/fentry.c
===
--- clang/test/CodeGen/fentry.c
+++ clang/test/CodeGen/fentry.c
@@ -2,6 +2,8 @@
 // RUN: %clang_cc1 -pg -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -mfentry -triple i386-unknown-unknown -emit-llvm -o - %s | FileCheck -check-prefix=NOPG %s
 // RUN: %clang_cc1 -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=NOPG %s
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck -check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s
 
 int foo(void) {
   return 0;
@@ -16,3 +18,5 @@
 //CHECK-NOT: attributes #1 = { {{.*}}"fentry-call"="true"{{.*}} }
 //NOPG-NOT: attributes #0 = { {{.*}}"fentry-call"{{.*}} }
 //NOPG-NOT: attributes #1 = { {{.*}}"fentry-call"{{.*}} }
+//FP: "frame-pointer"="all"
+//NOFP: "frame-pointer"="none"
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -526,7 +526,7 @@
 
 static bool useFramePointerForTargetByDefault(const ArgList ,
   const llvm::Triple ) {
-  if (Args.hasArg(options::OPT_pg))
+  if (Args.hasArg(options::OPT_pg) && !Args.hasArg(options::OPT_mfentry))
 return true;
 
   switch (Triple.getArch()) {
@@ -6150,7 +6150,8 @@
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_pg))
-if (FPKeepKind == CodeGenOptions::FramePointerKind::None)
+if (FPKeepKind == CodeGenOptions::FramePointerKind::None &&
+!Args.hasArg(options::OPT_mfentry))
   D.Diag(diag::err_drv_argument_not_allowed_with) << "-fomit-frame-pointer"
   << A->getAsString(Args);
 
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[PATCH] D74634: Remove "ELF Only" restriction from section flags

[Reid Kleckner via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGa0a1f412fd1d: Remove ELF Only from -f*-sections 
help text (authored by rnk).

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Files:
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Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -1952,10 +1952,10 @@
 def fzero_initialized_in_bss : Flag<["-"], "fzero-initialized-in-bss">, 
Group;
 def ffunction_sections : Flag<["-"], "ffunction-sections">, Group,
   Flags<[CC1Option]>,
-  HelpText<"Place each function in its own section (ELF Only)">;
+  HelpText<"Place each function in its own section">;
 def fno_function_sections : Flag<["-"], "fno-function-sections">, 
Group;
 def fdata_sections : Flag <["-"], "fdata-sections">, Group,
- Flags<[CC1Option]>, HelpText<"Place each data in its own section (ELF Only)">;
+ Flags<[CC1Option]>, HelpText<"Place each data in its own section">;
 def fno_data_sections : Flag <["-"], "fno-data-sections">, Group;
 def fstack_size_section : Flag<["-"], "fstack-size-section">, Group, 
Flags<[CC1Option]>,
   HelpText<"Emit section containing metadata on function stack sizes">;
@@ -1964,7 +1964,7 @@
 
 def funique_section_names : Flag <["-"], "funique-section-names">,
   Group,
-  HelpText<"Use unique names for text and data sections (ELF Only)">;
+  HelpText<"Use unique names for text and data sections">;
 def fno_unique_section_names : Flag <["-"], "fno-unique-section-names">,
   Group, Flags<[CC1Option]>;
 


Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -1952,10 +1952,10 @@
 def fzero_initialized_in_bss : Flag<["-"], "fzero-initialized-in-bss">, Group;
 def ffunction_sections : Flag<["-"], "ffunction-sections">, Group,
   Flags<[CC1Option]>,
-  HelpText<"Place each function in its own section (ELF Only)">;
+  HelpText<"Place each function in its own section">;
 def fno_function_sections : Flag<["-"], "fno-function-sections">, Group;
 def fdata_sections : Flag <["-"], "fdata-sections">, Group,
- Flags<[CC1Option]>, HelpText<"Place each data in its own section (ELF Only)">;
+ Flags<[CC1Option]>, HelpText<"Place each data in its own section">;
 def fno_data_sections : Flag <["-"], "fno-data-sections">, Group;
 def fstack_size_section : Flag<["-"], "fstack-size-section">, Group, Flags<[CC1Option]>,
   HelpText<"Emit section containing metadata on function stack sizes">;
@@ -1964,7 +1964,7 @@
 
 def funique_section_names : Flag <["-"], "funique-section-names">,
   Group,
-  HelpText<"Use unique names for text and data sections (ELF Only)">;
+  HelpText<"Use unique names for text and data sections">;
 def fno_unique_section_names : Flag <["-"], "fno-unique-section-names">,
   Group, Flags<[CC1Option]>;
 
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[PATCH] D74787: [IRBuilder] Always respect inserter/folder

[Nikita Popov via Phabricator via cfe-commits]

nikic marked an inline comment as done.
nikic added inline comments.



Comment at: llvm/test/Transforms/InstCombine/saturating-add-sub.ll:2
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -instcombine -S | FileCheck %s
+; RUN: opt < %s -instcombine -instcombine-infinite-loop-threshold=2 -S | 
FileCheck %s
 

Meinersbur wrote:
> IMHO how the folding works internally (folded by IRBuilder instead of 
> InstCombine rule) does not need to be part of a/this regression test. If 
> another test is added to this file requiring 3 rounds, it would raise some 
> confusions.
To clarify, "iterations" here is how often InstCombine runs (with a full 
instruction scan), not how many instructions each run visits. There should be 
at most two iterations, one to perform folds and one to verify the fixpoint. If 
there are more iterations, that's a bug in worklist management. I'm currently 
tracking down all these bugs and annotating tests with 
`-instcombine-infinite-loop-threshold=2` to verify that the issue is indeed 
fixed.


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[PATCH] D74698: [CodeGen] -pg shouldn't unconditionally add "frame-pointer"="all" fn attr w/ -mfentry

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers updated this revision to Diff 245249.
nickdesaulniers added a comment.

- move test from clang/test/CodeGen/fentry to clang/test/Driver/mfentry


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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/mfentry.c


Index: clang/test/Driver/mfentry.c
===
--- clang/test/Driver/mfentry.c
+++ clang/test/Driver/mfentry.c
@@ -1,9 +1,16 @@
 // RUN: %clang -target s390x -c -### %s -mfentry 2>&1 | FileCheck %s
 // RUN: %clang -target i386 -c -### %s -mfentry 2>&1 | FileCheck %s
 // RUN: %clang -target x86_64 -c -### %s -mfentry 2>&1 | FileCheck %s
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -fno-omit-frame-pointer -emit-llvm -S -o - %s 
| FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s
 
 // CHECK: "-mfentry"
 
 // RUN: %clang -target powerpc64le -c -### %s -mfentry 2>&1 | FileCheck 
--check-prefix=ERR %s
 
 // ERR: error: unsupported option '-mfentry' for target 'powerpc64le'
+
+//FP: "frame-pointer"="all"
+//NOFP: "frame-pointer"="none"
+void foo(void) {}
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -526,7 +526,7 @@
 
 static bool useFramePointerForTargetByDefault(const ArgList ,
   const llvm::Triple ) {
-  if (Args.hasArg(options::OPT_pg))
+  if (Args.hasArg(options::OPT_pg) && !Args.hasArg(options::OPT_mfentry))
 return true;
 
   switch (Triple.getArch()) {
@@ -6150,7 +6150,8 @@
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_pg))
-if (FPKeepKind == CodeGenOptions::FramePointerKind::None)
+if (FPKeepKind == CodeGenOptions::FramePointerKind::None &&
+!Args.hasArg(options::OPT_mfentry))
   D.Diag(diag::err_drv_argument_not_allowed_with) << "-fomit-frame-pointer"
   << A->getAsString(Args);
 


Index: clang/test/Driver/mfentry.c
===
--- clang/test/Driver/mfentry.c
+++ clang/test/Driver/mfentry.c
@@ -1,9 +1,16 @@
 // RUN: %clang -target s390x -c -### %s -mfentry 2>&1 | FileCheck %s
 // RUN: %clang -target i386 -c -### %s -mfentry 2>&1 | FileCheck %s
 // RUN: %clang -target x86_64 -c -### %s -mfentry 2>&1 | FileCheck %s
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -fno-omit-frame-pointer -emit-llvm -S -o - %s | FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck -check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s
 
 // CHECK: "-mfentry"
 
 // RUN: %clang -target powerpc64le -c -### %s -mfentry 2>&1 | FileCheck --check-prefix=ERR %s
 
 // ERR: error: unsupported option '-mfentry' for target 'powerpc64le'
+
+//FP: "frame-pointer"="all"
+//NOFP: "frame-pointer"="none"
+void foo(void) {}
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -526,7 +526,7 @@
 
 static bool useFramePointerForTargetByDefault(const ArgList ,
   const llvm::Triple ) {
-  if (Args.hasArg(options::OPT_pg))
+  if (Args.hasArg(options::OPT_pg) && !Args.hasArg(options::OPT_mfentry))
 return true;
 
   switch (Triple.getArch()) {
@@ -6150,7 +6150,8 @@
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_pg))
-if (FPKeepKind == CodeGenOptions::FramePointerKind::None)
+if (FPKeepKind == CodeGenOptions::FramePointerKind::None &&
+!Args.hasArg(options::OPT_mfentry))
   D.Diag(diag::err_drv_argument_not_allowed_with) << "-fomit-frame-pointer"
   << A->getAsString(Args);
 
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[PATCH] D74790: [Sema][CodeComplete] Handle symlinks for include code completion

[David Goldman via Phabricator via cfe-commits]

dgoldman created this revision.
dgoldman added a reviewer: sammccall.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Previously any symlinks would be ignored since the directory
traversal doesn't follow them.

With this change we now follow symlinks (via a `stat` call
in order to figure out the target type of the symlink if it
is valid).


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Files:
  clang/lib/Sema/SemaCodeComplete.cpp


Index: clang/lib/Sema/SemaCodeComplete.cpp
===
--- clang/lib/Sema/SemaCodeComplete.cpp
+++ clang/lib/Sema/SemaCodeComplete.cpp
@@ -8776,7 +8776,19 @@
   if (++Count == 2500) // If we happen to hit a huge directory,
 break; // bail out early so we're not too slow.
   StringRef Filename = llvm::sys::path::filename(It->path());
-  switch (It->type()) {
+
+  // We need to manually resolve symlinks since the directory_iterator
+  // doesn't do it for us. Alternatively we could use a heuristic such as
+  // file extension, but this should be okay as long as there aren't many
+  // symlinks.
+  auto Type = It->type();
+  if (Type == llvm::sys::fs::file_type::symlink_file) {
+auto FileStatus = FS.status(It->path());
+if (FileStatus) {
+  Type = FileStatus->getType();
+}
+  }
+  switch (Type) {
   case llvm::sys::fs::file_type::directory_file:
 // All entries in a framework directory must have a ".framework" 
suffix,
 // but the suffix does not appear in the source code's include/import.


Index: clang/lib/Sema/SemaCodeComplete.cpp
===
--- clang/lib/Sema/SemaCodeComplete.cpp
+++ clang/lib/Sema/SemaCodeComplete.cpp
@@ -8776,7 +8776,19 @@
   if (++Count == 2500) // If we happen to hit a huge directory,
 break; // bail out early so we're not too slow.
   StringRef Filename = llvm::sys::path::filename(It->path());
-  switch (It->type()) {
+
+  // We need to manually resolve symlinks since the directory_iterator
+  // doesn't do it for us. Alternatively we could use a heuristic such as
+  // file extension, but this should be okay as long as there aren't many
+  // symlinks.
+  auto Type = It->type();
+  if (Type == llvm::sys::fs::file_type::symlink_file) {
+auto FileStatus = FS.status(It->path());
+if (FileStatus) {
+  Type = FileStatus->getType();
+}
+  }
+  switch (Type) {
   case llvm::sys::fs::file_type::directory_file:
 // All entries in a framework directory must have a ".framework" suffix,
 // but the suffix does not appear in the source code's include/import.
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[PATCH] D74698: [CodeGen] -pg shouldn't unconditionally add "frame-pointer"="all" fn attr w/ -mfentry

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added inline comments.



Comment at: clang/test/Driver/mfentry.c:5
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -fno-omit-frame-pointer -emit-llvm -S -o - %s 
| FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s

Change `-emit-llvm` to `-###` and delete `--implicit-check-not`. And add 
`-target x86_64`, because some targets don't support `-mfentry`.

For IR output, there can be multiple `"frame-pointer"="all"` function 
attributes. `--implicit-check-not` helps detect undesired attributes.

For cc1 options, there can't be multiple "frame-pointer" options. So 
`--implicit-check-not` is not useful.



Comment at: clang/test/Driver/mfentry.c:14
+
+//FP: "frame-pointer"="all"
+//NOFP: "frame-pointer"="none"

`// FP`


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[PATCH] D73916: [clang] Add `forceReload` clangd extension to 'textDocument/didChange'

[Nathan Ridge via Phabricator via cfe-commits]

nridge added a comment.

Which client(s) use or plan to use this extension?


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[PATCH] D73138: [libcxx] [test] Correct asserted type in subspan test; subspan with count should never produce dynamic_extent

[Billy Robert O'Neal III via Phabricator via cfe-commits]

BillyONeal added a comment.

Thanks!


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[PATCH] D74033: [clang-tidy] Fix PR#44620 'readability-redundant-string-cstr quick-fix causes invalid code'

[Aaron Ballman via Phabricator via cfe-commits]

aaron.ballman closed this revision.
aaron.ballman added a comment.

I've commit on your behalf in 47282b1b4bf3e18d2e2166b87159115ed520a2aa 
, thank 
you for the patch!


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[PATCH] D74689: [clang-tidy] Better custom class support for performance-inefficient-vector-operation

[Nathan James via Phabricator via cfe-commits]

njames93 updated this revision to Diff 245240.
njames93 added a comment.

- Better template support
- Removed excess code
- Refactor alot of the check


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Files:
  clang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.cpp
  clang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.h
  clang-tools-extra/docs/ReleaseNotes.rst
  
clang-tools-extra/docs/clang-tidy/checks/performance-inefficient-vector-operation.rst
  
clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp

Index: clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
===
--- clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
+++ clang-tools-extra/test/clang-tidy/checkers/performance-inefficient-vector-operation.cpp
@@ -1,7 +1,11 @@
 // RUN: %check_clang_tidy %s performance-inefficient-vector-operation %t -- \
-// RUN: -format-style=llvm \
 // RUN: -config='{CheckOptions: \
-// RUN:  [{key: performance-inefficient-vector-operation.EnableProto, value: 1}]}'
+// RUN:  [{key: performance-inefficient-vector-operation.EnableProto, value: 1}, \
+// RUN:   {key: performance-inefficient-vector-operation.VectorLikeClasses, value : MyContainer}, \
+// RUN:   {key: performance-inefficient-vector-operation.SupportedRanges, value : MyContainer}, \
+// RUN:   {key: performance-inefficient-vector-operation.ReserveNames, value : Reserve}, \
+// RUN:   {key: performance-inefficient-vector-operation.AppendNames, value : PushBack}, \
+// RUN:   {key: performance-inefficient-vector-operation.SizeNames, value : Size}, ]}'
 
 namespace std {
 
@@ -359,3 +363,273 @@
 }
   }
 }
+
+namespace OptionsValidMatchDefault {
+template 
+class MyContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  MyContainer CC1;
+  // CHECK-FIXES: {{^}}  CC1.reserve(C.size());
+  for (auto I : C) {
+CC1.push_back(I);
+// CHECK-MESSAGES: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace OptionsValidMatchDefault
+
+namespace OptionsValidMatchDifferentMethods {
+template 
+class MyContainer {
+public:
+  unsigned Size() const;
+  T *begin() const;
+  T *end() const;
+  void PushBack(const T &);
+  void Reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  MyContainer CC2;
+  // CHECK-FIXES: {{^}}  CC2.Reserve(C.Size());
+  for (auto I : C) {
+CC2.PushBack(I);
+// CHECK-MESSAGES: :[[@LINE-1]]:5: warning: 'PushBack' is called
+  }
+}
+} // namespace OptionsValidMatchDifferentMethods
+
+namespace UnknownContainer {
+template 
+class MyUContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyUContainer ) {
+  // MyUContainer isn't specified as a VectorLikeClass in the Config Options
+  MyUContainer CC3;
+  // CHECK-FIXES-NOT: {{^}}  CC3.reserve(C.size());
+  for (auto I : C) {
+CC3.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace UnknownContainer
+
+namespace PrivateMethods {
+namespace Size {
+template 
+class MyContainer {
+  unsigned size() const;
+
+public:
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::size is private, so calling it will be invalid
+  MyContainer CC4;
+  // CHECK-FIXES-NOT: {{^}}  CC4.reserve(C.size());
+  for (auto I : C) {
+CC4.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace Size
+namespace Reserve {
+template 
+class MyContainer {
+public:
+  unsigned size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+
+private:
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::reserve is private, so calling it will be invalid
+  MyContainer CC5;
+  // CHECK-FIXES-NOT: {{^}}  CC5.reserve(C.size());
+  for (auto I : C) {
+CC5.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: warning: 'push_back' is called
+  }
+}
+} // namespace Reserve
+} // namespace PrivateMethods
+
+namespace BadSignatures {
+namespace Size {
+template 
+class MyContainer {
+public:
+  char *size() const;
+  T *begin() const;
+  T *end() const;
+  void push_back(const T &);
+  void reserve(unsigned);
+};
+
+void foo(const MyContainer ) {
+  // MyContainer::size doesn't return an integral type(char *), so ignore this class
+  MyContainer CC6;
+  // CHECK-FIXES-NOT: {{^}}  CC6.reserve(C.size());
+  for (auto I : C) {
+CC6.push_back(I);
+// CHECK-MESSAGES-NOT: :[[@LINE-1]]:5: 

[clang] a0a1f41 - Remove "ELF Only" from -f*-sections help text

[Reid Kleckner via cfe-commits]

Author: Reid Kleckner
Date: 2020-02-18T12:59:50-08:00
New Revision: a0a1f412fd1d86146c5b4ef5b7b66fcc57a8b56b

URL: 
https://github.com/llvm/llvm-project/commit/a0a1f412fd1d86146c5b4ef5b7b66fcc57a8b56b
DIFF: 
https://github.com/llvm/llvm-project/commit/a0a1f412fd1d86146c5b4ef5b7b66fcc57a8b56b.diff

LOG: Remove "ELF Only" from -f*-sections help text

-ffunction-sections and -fdata-sections are well supported by many
object file formats:
- ELF
- COFF
- XCOFF
- wasm
Only MachO ignores this flag.

While here, remove it from -funique-section-names. Wasm honors this
option.

Addresses PR44910.

Reviewed By: hans, aaron.ballman

Differential Revision: https://reviews.llvm.org/D74634

Added: 


Modified: 
clang/include/clang/Driver/Options.td

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index b0e9d9590fde..1a42925ca530 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -1952,10 +1952,10 @@ def fwritable_strings : Flag<["-"], 
"fwritable-strings">, Group, Flags<
 def fzero_initialized_in_bss : Flag<["-"], "fzero-initialized-in-bss">, 
Group;
 def ffunction_sections : Flag<["-"], "ffunction-sections">, Group,
   Flags<[CC1Option]>,
-  HelpText<"Place each function in its own section (ELF Only)">;
+  HelpText<"Place each function in its own section">;
 def fno_function_sections : Flag<["-"], "fno-function-sections">, 
Group;
 def fdata_sections : Flag <["-"], "fdata-sections">, Group,
- Flags<[CC1Option]>, HelpText<"Place each data in its own section (ELF Only)">;
+ Flags<[CC1Option]>, HelpText<"Place each data in its own section">;
 def fno_data_sections : Flag <["-"], "fno-data-sections">, Group;
 def fstack_size_section : Flag<["-"], "fstack-size-section">, Group, 
Flags<[CC1Option]>,
   HelpText<"Emit section containing metadata on function stack sizes">;
@@ -1964,7 +1964,7 @@ def fno_stack_size_section : Flag<["-"], 
"fno-stack-size-section">, Group,
   Group,
-  HelpText<"Use unique names for text and data sections (ELF Only)">;
+  HelpText<"Use unique names for text and data sections">;
 def fno_unique_section_names : Flag <["-"], "fno-unique-section-names">,
   Group, Flags<[CC1Option]>;
 



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[PATCH] D72231: [Sema] Adds the pointer-to-int-cast diagnostic

[Mark de Wever via Phabricator via cfe-commits]

Mordante added a comment.

In D72231#1879347 , @rjmccall wrote:

> In D72231#1878528 , @nathanchance 
> wrote:
>
> > There appear to a be semantic difference between GCC and clang with the 
> > current version of this patch which results in a lot of additional warnings 
> > in the Linux kernel: https://godbolt.org/z/eHFJd8
>
>
> Warning about casting to an enum seems clearly correct and in scope for this 
> warning.  Warning about casting to `_Bool` seems clearly incorrect and should 
> not be warned about at all.


Agreed. I'll look at a followup patch to remove the warning for _Bool.


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[PATCH] D69782: Summary: Instead of dropping all the ranges associated with a Diagnostic when converting them to a ClangTidy error, instead attach them to the ClangTidyError, so they can be consumed b

[Joe Turner via Phabricator via cfe-commits]

compositeprimes added a comment.

Sorry about the lack of context on the last upload, this one should have it all




Comment at: include/clang/Tooling/Core/Diagnostic.h:62-70
+/// Represents extra source ranges to be associated with a diagnostic.
+struct DiagnosticAssociatedRanges {
+  DiagnosticAssociatedRanges() = default;
+
+  DiagnosticAssociatedRanges(const SourceManager ,
+ ArrayRef SourceRanges);
+

alexfh wrote:
> Why is this needed? Shouldn't `LLVM_YAML_IS_SEQUENCE_VECTOR` be enough to 
> allow for SmallVector to be yaml 
> serializable? Seems to work with `DiagnosticMessage` and `Diagnostic::Notes`.
Yeah, you're right it's not really needed. I had been trying to make it easier 
to convert a vector to vector, but it's 
really not that hard as is.


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[PATCH] D69782: Summary: Instead of dropping all the ranges associated with a Diagnostic when converting them to a ClangTidy error, instead attach them to the ClangTidyError, so they can be consumed b

[Joe Turner via Phabricator via cfe-commits]

compositeprimes updated this revision to Diff 245207.
compositeprimes marked 2 inline comments as done.
compositeprimes added a comment.

Removed unnecessary DiagnosticAssociatedRanges struct


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Files:
  include/clang/Tooling/Core/Diagnostic.h
  include/clang/Tooling/DiagnosticsYaml.h
  lib/Tooling/Core/Diagnostic.cpp

Index: lib/Tooling/Core/Diagnostic.cpp
===
--- lib/Tooling/Core/Diagnostic.cpp
+++ lib/Tooling/Core/Diagnostic.cpp
@@ -11,6 +11,7 @@
 //===--===//
 
 #include "clang/Tooling/Core/Diagnostic.h"
+#include "third_party/llvm/llvm-project/clang/include/clang/Basic/SourceLocation.h"
 #include "clang/Basic/SourceManager.h"
 #include "llvm/ADT/STLExtras.h"
 
@@ -34,6 +35,16 @@
 FileOffset = Sources.getFileOffset(Loc);
 }
 
+DiagnosticAssociatedRange::DiagnosticAssociatedRange(
+const SourceManager , CharSourceRange Range)
+: FileOffset(0), Length(0) {
+  FilePath = std::string(Sources.getFilename(Range.getBegin()));
+  if (!FilePath.empty()) {
+FileOffset = Sources.getFileOffset(Range.getBegin());
+Length = Sources.getFileOffset(Range.getEnd()) - FileOffset;
+  }
+}
+
 Diagnostic::Diagnostic(llvm::StringRef DiagnosticName,
Diagnostic::Level DiagLevel, StringRef BuildDirectory)
 : DiagnosticName(DiagnosticName), DiagLevel(DiagLevel),
@@ -42,9 +53,10 @@
 Diagnostic::Diagnostic(llvm::StringRef DiagnosticName,
const DiagnosticMessage ,
const SmallVector ,
-   Level DiagLevel, llvm::StringRef BuildDirectory)
+   Level DiagLevel, llvm::StringRef BuildDirectory,
+   const SmallVector )
 : DiagnosticName(DiagnosticName), Message(Message), Notes(Notes),
-  DiagLevel(DiagLevel), BuildDirectory(BuildDirectory) {}
+  DiagLevel(DiagLevel), BuildDirectory(BuildDirectory), Ranges(Ranges) {}
 
 const llvm::StringMap *selectFirstFix(const Diagnostic& D) {
if (!D.Message.Fix.empty())
Index: include/clang/Tooling/DiagnosticsYaml.h
===
--- include/clang/Tooling/DiagnosticsYaml.h
+++ include/clang/Tooling/DiagnosticsYaml.h
@@ -20,12 +20,21 @@
 #include "llvm/Support/YAMLTraits.h"
 #include 
 
+LLVM_YAML_IS_SEQUENCE_VECTOR(clang::tooling::DiagnosticAssociatedRange)
 LLVM_YAML_IS_SEQUENCE_VECTOR(clang::tooling::Diagnostic)
 LLVM_YAML_IS_SEQUENCE_VECTOR(clang::tooling::DiagnosticMessage)
 
 namespace llvm {
 namespace yaml {
 
+template <> struct MappingTraits {
+  static void mapping(IO , clang::tooling::DiagnosticAssociatedRange ) {
+Io.mapRequired("FilePath", R.FilePath);
+Io.mapRequired("FileOffset", R.FileOffset);
+Io.mapRequired("Length", R.Length);
+  }
+};
+
 template <> struct MappingTraits {
   static void mapping(IO , clang::tooling::DiagnosticMessage ) {
 Io.mapRequired("Message", M.Message);
@@ -58,11 +67,12 @@
 
 NormalizedDiagnostic(const IO &, const clang::tooling::Diagnostic )
 : DiagnosticName(D.DiagnosticName), Message(D.Message), Notes(D.Notes),
-  DiagLevel(D.DiagLevel), BuildDirectory(D.BuildDirectory) {}
+  DiagLevel(D.DiagLevel), BuildDirectory(D.BuildDirectory),
+  Ranges(D.Ranges) {}
 
 clang::tooling::Diagnostic denormalize(const IO &) {
   return clang::tooling::Diagnostic(DiagnosticName, Message, Notes,
-DiagLevel, BuildDirectory);
+DiagLevel, BuildDirectory, Ranges);
 }
 
 std::string DiagnosticName;
@@ -71,6 +81,7 @@
 SmallVector Notes;
 clang::tooling::Diagnostic::Level DiagLevel;
 std::string BuildDirectory;
+SmallVector Ranges;
   };
 
   static void mapping(IO , clang::tooling::Diagnostic ) {
@@ -79,6 +90,7 @@
 Io.mapRequired("DiagnosticName", Keys->DiagnosticName);
 Io.mapRequired("DiagnosticMessage", Keys->Message);
 Io.mapOptional("Notes", Keys->Notes);
+Io.mapOptional("Ranges", Keys->Ranges);
 
 // FIXME: Export properly all the different fields.
   }
Index: include/clang/Tooling/Core/Diagnostic.h
===
--- include/clang/Tooling/Core/Diagnostic.h
+++ include/clang/Tooling/Core/Diagnostic.h
@@ -47,6 +47,18 @@
   llvm::StringMap Fix;
 };
 
+/// Represents a single source ranges to be associated with a diagnostic.
+struct DiagnosticAssociatedRange {
+  DiagnosticAssociatedRange() = default;
+
+  DiagnosticAssociatedRange(const SourceManager ,
+CharSourceRange Range);
+
+  std::string FilePath;
+  unsigned FileOffset;
+  unsigned Length;
+};
+
 /// Represents the diagnostic with the level of severity and possible
 /// fixes to be applied.
 struct Diagnostic {
@@ 

[clang] bcadb1f - Revert "[CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing AST travese"

[Yaxun Liu via cfe-commits]

Author: Yaxun (Sam) Liu
Date: 2020-02-18T14:45:34-05:00
New Revision: bcadb1f2e6afe51d5646c6e98faa14aa1a1c669c

URL: 
https://github.com/llvm/llvm-project/commit/bcadb1f2e6afe51d5646c6e98faa14aa1a1c669c
DIFF: 
https://github.com/llvm/llvm-project/commit/bcadb1f2e6afe51d5646c6e98faa14aa1a1c669c.diff

LOG: Revert "[CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing 
AST travese"

This reverts commit 1b978ddba05cb15e22b4e75adb5e7362ad861987.

Added: 


Modified: 
clang/include/clang/Sema/Sema.h
clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaCUDA.cpp
clang/lib/Sema/SemaDecl.cpp
clang/lib/Sema/SemaExpr.cpp
clang/lib/Sema/SemaOpenMP.cpp
clang/test/OpenMP/declare_target_messages.cpp
clang/test/OpenMP/nvptx_target_exceptions_messages.cpp
clang/test/SemaCUDA/bad-calls-on-same-line.cu
clang/test/SemaCUDA/call-device-fn-from-host.cu
clang/test/SemaCUDA/call-host-fn-from-device.cu
clang/test/SemaCUDA/openmp-target.cu
clang/test/SemaCUDA/trace-through-global.cu

Removed: 




diff  --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h
index 6a3add109b09..a6430353b241 100644
--- a/clang/include/clang/Sema/Sema.h
+++ b/clang/include/clang/Sema/Sema.h
@@ -1464,12 +1464,6 @@ class Sema final {
 
   void emitAndClearUnusedLocalTypedefWarnings();
 
-  // Emit all deferred diagnostics.
-  void emitDeferredDiags();
-  // Emit any deferred diagnostics for FD and erase them from the map in which
-  // they're stored.
-  void emitDeferredDiags(FunctionDecl *FD, bool ShowCallStack);
-
   enum TUFragmentKind {
 /// The global module fragment, between 'module;' and a module-declaration.
 Global,
@@ -3689,8 +3683,7 @@ class Sema final {
 TemplateDiscarded, // Discarded due to uninstantiated templates
 Unknown,
   };
-  FunctionEmissionStatus getEmissionStatus(FunctionDecl *Decl,
-   bool Final = false);
+  FunctionEmissionStatus getEmissionStatus(FunctionDecl *Decl);
 
   // Whether the callee should be ignored in CUDA/HIP/OpenMP host/device check.
   bool shouldIgnoreInHostDeviceCheck(FunctionDecl *Callee);
@@ -9684,10 +9677,22 @@ class Sema final {
   /// Pop OpenMP function region for non-capturing function.
   void popOpenMPFunctionRegion(const sema::FunctionScopeInfo *OldFSI);
 
+  /// Check whether we're allowed to call Callee from the current function.
+  void checkOpenMPDeviceFunction(SourceLocation Loc, FunctionDecl *Callee,
+ bool CheckForDelayedContext = true);
+
+  /// Check whether we're allowed to call Callee from the current function.
+  void checkOpenMPHostFunction(SourceLocation Loc, FunctionDecl *Callee,
+   bool CheckCaller = true);
+
   /// Check if the expression is allowed to be used in expressions for the
   /// OpenMP devices.
   void checkOpenMPDeviceExpr(const Expr *E);
 
+  /// Finishes analysis of the deferred functions calls that may be declared as
+  /// host/nohost during device/host compilation.
+  void finalizeOpenMPDelayedAnalysis();
+
   /// Checks if a type or a declaration is disabled due to the owning extension
   /// being disabled, and emits diagnostic messages if it is disabled.
   /// \param D type or declaration to be checked.
@@ -9870,11 +9875,6 @@ class Sema final {
   void
   checkDeclIsAllowedInOpenMPTarget(Expr *E, Decl *D,
SourceLocation IdLoc = SourceLocation());
-  /// Finishes analysis of the deferred functions calls that may be declared as
-  /// host/nohost during device/host compilation.
-  void finalizeOpenMPDelayedAnalysis(const FunctionDecl *Caller,
- const FunctionDecl *Callee,
- SourceLocation Loc);
   /// Return true inside OpenMP declare target region.
   bool isInOpenMPDeclareTargetContext() const {
 return DeclareTargetNestingLevel > 0;
@@ -11223,6 +11223,18 @@ class Sema final {
  /* Caller = */ FunctionDeclAndLoc>
   DeviceKnownEmittedFns;
 
+  /// A partial call graph maintained during CUDA/OpenMP device code 
compilation
+  /// to support deferred diagnostics.
+  ///
+  /// Functions are only added here if, at the time they're considered, they 
are
+  /// not known-emitted.  As soon as we discover that a function is
+  /// known-emitted, we remove it and everything it transitively calls from 
this
+  /// set and add those functions to DeviceKnownEmittedFns.
+  llvm::DenseMap,
+ /* Callees = */ 
llvm::MapVector,
+ SourceLocation>>
+  DeviceCallGraph;
+
   /// Diagnostic builder for CUDA/OpenMP devices errors which may or may not be
   /// deferred.
   ///
@@ -11297,6 +11309,14 @@ class Sema final {
 llvm::Optional PartialDiagId;
   };
 
+  /// Indicate that this function (and thus 

RE: [PATCH] D70172: [CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing AST travese

[Liu, Yaxun (Sam) via cfe-commits]

[AMD Official Use Only - Internal Distribution Only]

Reverted.

I will make sure it does not regress mlir before commit again.

Thanks.

Sam

-Original Message-
From: Eric Christopher via Phabricator  
Sent: Tuesday, February 18, 2020 11:21 AM
To: Liu, Yaxun (Sam) ; t...@google.com; rjmcc...@gmail.com; 
rich...@metafoo.co.uk; jdoerf...@anl.gov; a.bat...@hotmail.com
Cc: jpien...@google.com; mask...@google.com; michael.hl...@gmail.com; 
mariya.podchishcha...@intel.com; alexey.ba...@intel.com; 
zhang.guans...@gmail.com; her...@google.com; r...@google.com; 
cfe-commits@lists.llvm.org; mlek...@skidmore.edu; blitzrak...@gmail.com; 
shen...@google.com
Subject: [PATCH] D70172: [CUDA][HIP][OpenMP] Emit deferred diagnostics by a 
post-parsing AST travese

[CAUTION: External Email]

echristo added a comment.

In D70172#1879481 
,
 @jpienaar wrote:

> This seems to result in triggering clang/lib/CodeGen/CGExpr.cpp:2626 when 
> compiling mlir/lib/Transforms/AffineDataCopyGeneration.cpp with clang build 
> with assertions on (clean build at e8e078c 
> 
>  just before this change, broken at this, assert triggering at build fix 
> commit).
>
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbuildkite.com%2Fmlir%2Fmlir-core%2Fbuilds%2F2792%23a54fb239-718b-4f0b-a309-f83e46ceb252data=02%7C01%7Cyaxun.liu%40amd.com%7Ce901b932c7c140a8a22c08d7b4a7b390%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637176504711389865sdata=8OqEGO2vIUaVIEsaRfhzmTgJRGnMFR2ZpXH2LSkr9Ds%3Dreserved=0


Seems reasonable to revert if there's a testcase that they can get from 
rebuilding llvm with mlir enabled.


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[libunwind] 1ae8d81 - [libunwind] Fix memory leak in handling of DW_CFA_remember_state and DW_CFA_restore_state

[Jorge Gorbe Moya via cfe-commits]

Author: Jorge Gorbe Moya
Date: 2020-02-18T11:57:18-08:00
New Revision: 1ae8d81147a0724cc972054afbd72943032e4832

URL: 
https://github.com/llvm/llvm-project/commit/1ae8d81147a0724cc972054afbd72943032e4832
DIFF: 
https://github.com/llvm/llvm-project/commit/1ae8d81147a0724cc972054afbd72943032e4832.diff

LOG: [libunwind] Fix memory leak in handling of DW_CFA_remember_state and 
DW_CFA_restore_state

parseInstructions() doesn't always process the whole set of DWARF
instructions for a frame. It will stop once the target PC is reached, or
if malformed instructions are found. So, for example, if we have an
instruction sequence like this:

```

...
DW_CFA_remember_state
...
DW_CFA_advance_loc past the location we're unwinding at (pcoffset in 
parseInstructions() main loop)
...
DW_CFA_restore_state

```

... the saved state will never be freed, even though the
DW_CFA_remember_state opcode has a matching DW_CFA_restore_state later
in the sequence.

This change adds code to free whatever is left on rememberStack after
parsing the CIE and the FDE instructions.

Differential Revision: https://reviews.llvm.org/D66904

Added: 
libunwind/test/remember_state_leak.pass.sh.s

Modified: 
libunwind/src/DwarfParser.hpp

Removed: 




diff  --git a/libunwind/src/DwarfParser.hpp b/libunwind/src/DwarfParser.hpp
index df69c2a4bd23..2994bd7bb41f 100644
--- a/libunwind/src/DwarfParser.hpp
+++ b/libunwind/src/DwarfParser.hpp
@@ -360,13 +360,25 @@ bool CFI_Parser::parseFDEInstructions(A ,
   PrologInfoStackEntry *rememberStack = NULL;
 
   // parse CIE then FDE instructions
-  return parseInstructions(addressSpace, cieInfo.cieInstructions,
-   cieInfo.cieStart + cieInfo.cieLength, cieInfo,
-   (pint_t)(-1), rememberStack, arch, results) &&
- parseInstructions(addressSpace, fdeInfo.fdeInstructions,
-   fdeInfo.fdeStart + fdeInfo.fdeLength, cieInfo,
-   upToPC - fdeInfo.pcStart, rememberStack, arch,
-   results);
+  bool returnValue =
+  parseInstructions(addressSpace, cieInfo.cieInstructions,
+cieInfo.cieStart + cieInfo.cieLength, cieInfo,
+(pint_t)(-1), rememberStack, arch, results) &&
+  parseInstructions(addressSpace, fdeInfo.fdeInstructions,
+fdeInfo.fdeStart + fdeInfo.fdeLength, cieInfo,
+upToPC - fdeInfo.pcStart, rememberStack, arch, 
results);
+
+  // Clean up rememberStack. Even in the case where every DW_CFA_remember_state
+  // is paired with a DW_CFA_restore_state, parseInstructions can skip restore
+  // opcodes if it reaches the target PC and stops interpreting, so we have to
+  // make sure we don't leak memory.
+  while (rememberStack) {
+PrologInfoStackEntry *next = rememberStack->next;
+free(rememberStack);
+rememberStack = next;
+  }
+
+  return returnValue;
 }
 
 /// "run" the DWARF instructions

diff  --git a/libunwind/test/remember_state_leak.pass.sh.s 
b/libunwind/test/remember_state_leak.pass.sh.s
new file mode 100644
index ..821ee926eec8
--- /dev/null
+++ b/libunwind/test/remember_state_leak.pass.sh.s
@@ -0,0 +1,56 @@
+# REQUIRES: x86, linux
+# RUN: %build -target x86_64-unknown-linux-gnu
+# RUN: %run
+
+# The following assembly is a translation of this code:
+#
+#   _Unwind_Reason_Code callback(int, _Unwind_Action, long unsigned int,
+#_Unwind_Exception*, _Unwind_Context*, void*) {
+# return _Unwind_Reason_Code(0);
+#   }
+#
+#   int main() {
+# asm(".cfi_remember_state\n\t");
+# _Unwind_Exception exc;
+# _Unwind_ForcedUnwind(, callback, 0);
+# asm(".cfi_restore_state\n\t");
+#   }
+#
+# When unwinding, the CFI parser will stop parsing opcodes after the current 
PC,
+# so in this case the DW_CFA_restore_state opcode will never be processed and,
+# if the library doesn't clean up properly, the store allocated by
+# DW_CFA_remember_state will be leaked.
+#
+# This test will fail when linked with an asan-enabled libunwind if the
+# remembered state is leaked.
+
+SIZEOF_UNWIND_EXCEPTION = 32
+
+.text
+callback:
+xorl%eax, %eax
+retq
+
+.globlmain# -- Begin function main
+.p2align4, 0x90
+.typemain,@function
+main:   # @main
+.cfi_startproc
+subq$8, %rsp   # Adjust stack alignment
+subq$SIZEOF_UNWIND_EXCEPTION, %rsp
+.cfi_def_cfa_offset 48
+.cfi_remember_state
+movq%rsp, %rdi
+movabsq $callback, %rsi
+xorl%edx, %edx
+callq_Unwind_ForcedUnwind
+.cfi_restore_state
+xorl%eax, %eax
+addq$SIZEOF_UNWIND_EXCEPTION, %rsp
+addq$8, %rsp   # Undo stack alignment adjustment
+.cfi_def_cfa_offset 8
+retq
+.Lfunc_end1:
+.sizemain, 

[clang] b8bea93 - Revert "Support -fuse-ld=lld for riscv"

[via cfe-commits]

Author: serge-sans-paille
Date: 2020-02-18T20:56:02+01:00
New Revision: b8bea9346af4f2644c9a1bd29710c5e3efbbd7d3

URL: 
https://github.com/llvm/llvm-project/commit/b8bea9346af4f2644c9a1bd29710c5e3efbbd7d3
DIFF: 
https://github.com/llvm/llvm-project/commit/b8bea9346af4f2644c9a1bd29710c5e3efbbd7d3.diff

LOG: Revert "Support -fuse-ld=lld for riscv"

This reverts commit dd230142d8a00f5f30c3930a2407000e845dcfbf.

Failures:

http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/4749
http://lab.llvm.org:8011/builders/llvm-clang-win-x-aarch64/builds/4752

Added: 


Modified: 
clang/lib/Driver/ToolChains/RISCVToolchain.cpp
clang/test/Driver/riscv32-toolchain.c

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp 
b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
index 21106d003859..24c2b37c4b77 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -142,7 +142,7 @@ void RISCV::Linker::ConstructJob(Compilation , const 
JobAction ,
 CmdArgs.push_back("elf32lriscv");
   }
 
-  std::string Linker = getToolChain().GetLinkerPath();
+  std::string Linker = getToolChain().GetProgramPath(getShortName());
 
   bool WantCRTs =
   !Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles);

diff  --git a/clang/test/Driver/riscv32-toolchain.c 
b/clang/test/Driver/riscv32-toolchain.c
index c5f82d309af5..2ff3a585bda3 100644
--- a/clang/test/Driver/riscv32-toolchain.c
+++ b/clang/test/Driver/riscv32-toolchain.c
@@ -3,10 +3,6 @@
 // RUN: %clang %s -### -no-canonical-prefixes -target riscv32 2>&1 | FileCheck 
-check-prefix=CC1 %s
 // CC1: clang{{.*}} "-cc1" "-triple" "riscv32"
 
-// Test interaction with -fuse-ld=lld, if ld.lld is available.
-// RUN: %clang %s -### -no-canonical-prefixes -target riscv32 -fuse-ld=lld 
2>&1 | FileCheck -check-prefix=LLD %s
-// LLD: {{(error: invalid linker name in argument '-fuse-ld=lld')|(ld.lld)}}
-
 // In the below tests, --rtlib=platform is used so that the driver ignores
 // the configure-time CLANG_DEFAULT_RTLIB option when choosing the runtime lib
 



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[PATCH] D74787: [IRBuilder] Always respect inserter/folder

[Nikita Popov via Phabricator via cfe-commits]

nikic created this revision.
nikic added reviewers: nhaehnle, Meinersbur, spatel, lebedev.ri.
Herald added subscribers: llvm-commits, cfe-commits, hiraditya.
Herald added a reviewer: jdoerfert.
Herald added projects: clang, LLVM.

Some IRBuilder methods that were originally defined on IRBuilderBase do not 
respect custom IRBuilder inserters/folders, because those were not accessible 
prior to D73835 . Fix this by making use of 
existing (and now accessible) IRBuilder methods, which will handle 
inserters/folders correctly.

There are some changes in OpenMP tests, where bitcasts now get constant folded. 
I've also highlighted one InstCombine test which now finishes in two rather 
than three iterations, thanks to new instructions being inserted into the 
worklist.


Repository:
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https://reviews.llvm.org/D74787

Files:
  clang/test/OpenMP/parallel_codegen.cpp
  clang/test/OpenMP/target_firstprivate_codegen.cpp
  llvm/lib/IR/IRBuilder.cpp
  llvm/test/Transforms/InstCombine/saturating-add-sub.ll

Index: llvm/test/Transforms/InstCombine/saturating-add-sub.ll
===
--- llvm/test/Transforms/InstCombine/saturating-add-sub.ll
+++ llvm/test/Transforms/InstCombine/saturating-add-sub.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -instcombine -S | FileCheck %s
+; RUN: opt < %s -instcombine -instcombine-infinite-loop-threshold=2 -S | FileCheck %s
 
 ;
 ; Saturating addition.
Index: llvm/lib/IR/IRBuilder.cpp
===
--- llvm/lib/IR/IRBuilder.cpp
+++ llvm/lib/IR/IRBuilder.cpp
@@ -65,38 +65,19 @@
 return Ptr;
 
   // Otherwise, we need to insert a bitcast.
-  PT = getInt8PtrTy(PT->getAddressSpace());
-  BitCastInst *BCI = new BitCastInst(Ptr, PT, "");
-  BB->getInstList().insert(InsertPt, BCI);
-  SetInstDebugLocation(BCI);
-  return BCI;
+  return CreateBitCast(Ptr, getInt8PtrTy(PT->getAddressSpace()));
 }
 
 static CallInst *createCallHelper(Function *Callee, ArrayRef Ops,
   IRBuilderBase *Builder,
   const Twine  = "",
   Instruction *FMFSource = nullptr) {
-  CallInst *CI = CallInst::Create(Callee, Ops, Name);
+  CallInst *CI = Builder->CreateCall(Callee, Ops, Name);
   if (FMFSource)
 CI->copyFastMathFlags(FMFSource);
-  Builder->GetInsertBlock()->getInstList().insert(Builder->GetInsertPoint(),CI);
-  Builder->SetInstDebugLocation(CI);
   return CI;
 }
 
-static InvokeInst *createInvokeHelper(Function *Invokee, BasicBlock *NormalDest,
-  BasicBlock *UnwindDest,
-  ArrayRef Ops,
-  IRBuilderBase *Builder,
-  const Twine  = "") {
-  InvokeInst *II =
-  InvokeInst::Create(Invokee, NormalDest, UnwindDest, Ops, Name);
-  Builder->GetInsertBlock()->getInstList().insert(Builder->GetInsertPoint(),
-  II);
-  Builder->SetInstDebugLocation(II);
-  return II;
-}
-
 CallInst *IRBuilderBase::CreateMemSet(Value *Ptr, Value *Val, Value *Size,
   MaybeAlign Align, bool isVolatile,
   MDNode *TBAATag, MDNode *ScopeTag,
@@ -696,8 +677,8 @@
   std::vector Args =
   getStatepointArgs(*Builder, ID, NumPatchBytes, ActualInvokee, Flags,
 InvokeArgs, TransitionArgs, DeoptArgs, GCArgs);
-  return createInvokeHelper(FnStatepoint, NormalDest, UnwindDest, Args, Builder,
-Name);
+  return Builder->CreateInvoke(FnStatepoint, NormalDest, UnwindDest, Args,
+   Name);
 }
 
 InvokeInst *IRBuilderBase::CreateGCStatepointInvoke(
Index: clang/test/OpenMP/target_firstprivate_codegen.cpp
===
--- clang/test/OpenMP/target_firstprivate_codegen.cpp
+++ clang/test/OpenMP/target_firstprivate_codegen.cpp
@@ -336,9 +336,8 @@
   }
   // CHECK:  [[PTR_ADDR_REF:%.+]] = load double*, double** [[PTR_ADDR]],
 
-  // CHECK:  [[FP_E_BC:%.+]] = bitcast [[TTII]]* [[FP_E]] to i8*
   // CHECK:  [[E_BC:%.+]] = bitcast [[TTII]]* [[E:%.+]] to i8*
-  // CHECK:  call void @llvm.memcpy.p0i8.p0i8.i{{64|32}}(i8* {{.*}} [[FP_E_BC]], i8* {{.*}} [[E_BC]], i{{64|32}} 8, i1 false)
+  // CHECK:  call void @llvm.memcpy.p0i8.p0i8.i{{64|32}}(i8* {{.*}} bitcast ([[TTII]]* [[FP_E]] to i8*), i8* {{.*}} [[E_BC]], i{{64|32}} 8, i1 false)
   // CHECK:  [[BASE_PTR_GEP3_0:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[BASE_PTR_ARR3]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
   // CHECK:  [[BCAST_TOPTR:%.+]] = bitcast i8** [[BASE_PTR_GEP3_0]] to double**
   // CHECK:  store double* [[PTR_ADDR_REF]], double** [[BCAST_TOPTR]],
Index: 

[PATCH] D73138: [libcxx] [test] Correct asserted type in subspan test; subspan with count should never produce dynamic_extent

[Louis Dionne via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGa7dcbe90cc2d: [libc++] Fix overly complicated test of 
std::spans extent (authored by ldionne).
Herald added a project: libc++.
Herald added a subscriber: libcxx-commits.

Changed prior to commit:
  https://reviews.llvm.org/D73138?vs=239423=245236#toc

Repository:
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Files:
  libcxx/test/std/containers/views/span.sub/subspan.pass.cpp


Index: libcxx/test/std/containers/views/span.sub/subspan.pass.cpp
===
--- libcxx/test/std/containers/views/span.sub/subspan.pass.cpp
+++ libcxx/test/std/containers/views/span.sub/subspan.pass.cpp
@@ -37,13 +37,7 @@
 using S2 = decltype(s2);
 ASSERT_SAME_TYPE(typename Span::value_type, typename S1::value_type);
 ASSERT_SAME_TYPE(typename Span::value_type, typename S2::value_type);
-if constexpr (Count != std::dynamic_extent) {
-static_assert(S1::extent == Count);
-} else if constexpr (Span::extent != std::dynamic_extent) {
-static_assert(S1::extent == Span::extent - Offset);
-} else {
-static_assert(S1::extent == std::dynamic_extent);
-}
+static_assert(S1::extent == Count);
 static_assert(S2::extent == std::dynamic_extent, "");
 return
 s1.data() == s2.data()
@@ -82,13 +76,7 @@
 using S2 = decltype(s2);
 ASSERT_SAME_TYPE(typename Span::value_type, typename S1::value_type);
 ASSERT_SAME_TYPE(typename Span::value_type, typename S2::value_type);
-if constexpr (Count != std::dynamic_extent) {
-static_assert(S1::extent == Count);
-} else if constexpr (Span::extent != std::dynamic_extent) {
-static_assert(S1::extent == Span::extent - Offset);
-} else {
-static_assert(S1::extent == std::dynamic_extent);
-}
+static_assert(S1::extent == Count);
 static_assert(S2::extent == std::dynamic_extent, "");
 assert(s1.data() == s2.data());
 assert(s1.size() == s2.size());


Index: libcxx/test/std/containers/views/span.sub/subspan.pass.cpp
===
--- libcxx/test/std/containers/views/span.sub/subspan.pass.cpp
+++ libcxx/test/std/containers/views/span.sub/subspan.pass.cpp
@@ -37,13 +37,7 @@
 using S2 = decltype(s2);
 ASSERT_SAME_TYPE(typename Span::value_type, typename S1::value_type);
 ASSERT_SAME_TYPE(typename Span::value_type, typename S2::value_type);
-if constexpr (Count != std::dynamic_extent) {
-static_assert(S1::extent == Count);
-} else if constexpr (Span::extent != std::dynamic_extent) {
-static_assert(S1::extent == Span::extent - Offset);
-} else {
-static_assert(S1::extent == std::dynamic_extent);
-}
+static_assert(S1::extent == Count);
 static_assert(S2::extent == std::dynamic_extent, "");
 return
 s1.data() == s2.data()
@@ -82,13 +76,7 @@
 using S2 = decltype(s2);
 ASSERT_SAME_TYPE(typename Span::value_type, typename S1::value_type);
 ASSERT_SAME_TYPE(typename Span::value_type, typename S2::value_type);
-if constexpr (Count != std::dynamic_extent) {
-static_assert(S1::extent == Count);
-} else if constexpr (Span::extent != std::dynamic_extent) {
-static_assert(S1::extent == Span::extent - Offset);
-} else {
-static_assert(S1::extent == std::dynamic_extent);
-}
+static_assert(S1::extent == Count);
 static_assert(S2::extent == std::dynamic_extent, "");
 assert(s1.data() == s2.data());
 assert(s1.size() == s2.size());
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[PATCH] D74529: [clang-tidy] Added a case to UnconventionalAssignOperatorCheck.

[Aaron Ballman via Phabricator via cfe-commits]

aaron.ballman accepted this revision.
aaron.ballman added a comment.
This revision is now accepted and ready to land.

LGTM!


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[PATCH] D74698: [CodeGen] -pg shouldn't unconditionally add "frame-pointer"="all" fn attr w/ -mfentry

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers marked an inline comment as done.
nickdesaulniers added inline comments.



Comment at: clang/test/Driver/mfentry.c:5
+// RUN: %clang -pg -mfentry -O0 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -fno-omit-frame-pointer -emit-llvm -S -o - %s 
| FileCheck -check-prefix=FP --implicit-check-not='"frame-pointer"="none"' %s
+// RUN: %clang -pg -mfentry -O2 -emit-llvm -S -o - %s | FileCheck 
-check-prefix=NOFP --implicit-check-not='"frame-pointer"="all"' %s

MaskRay wrote:
> Change `-emit-llvm` to `-###` and delete `--implicit-check-not`. And add 
> `-target x86_64`, because some targets don't support `-mfentry`.
> 
> For IR output, there can be multiple `"frame-pointer"="all"` function 
> attributes. `--implicit-check-not` helps detect undesired attributes.
> 
> For cc1 options, there can't be multiple "frame-pointer" options. So 
> `--implicit-check-not` is not useful.
`-target x86_64` seems like a good idea, but `-###` produces:

```
clang-10: warning: argument unused during compilation: '-pg' 
[-Wunused-command-line-argument]
clang-10: warning: argument unused during compilation: '-O2' 
[-Wunused-command-line-argument]
clang-10: warning: argument unused during compilation: '-mfentry' 
[-Wunused-command-line-argument]
```
so I don't think we want that. Or am I "holding it wrong?"


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RE: [PATCH] D70172: [CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing AST travese

[Liu, Yaxun (Sam) via cfe-commits]

[AMD Official Use Only - Internal Distribution Only]

Probably I missed something. I will look again.

Thanks.

Sam

-Original Message-
From: Jacques Pienaar  
Sent: Tuesday, February 18, 2020 8:56 AM
To: Liu, Yaxun (Sam) 
Cc: reviews+d70172+public+e13d5528b180f...@reviews.llvm.org; t...@google.com; 
rjmcc...@gmail.com; rich...@metafoo.co.uk; jdoerf...@anl.gov; 
a.bat...@hotmail.com; mask...@google.com; michael.hl...@gmail.com; 
mariya.podchishcha...@intel.com; alexey.ba...@intel.com; 
zhang.guans...@gmail.com; her...@google.com; r...@google.com; 
cfe-commits@lists.llvm.org; mlek...@skidmore.edu; blitzrak...@gmail.com; 
shen...@google.com
Subject: Re: [PATCH] D70172: [CUDA][HIP][OpenMP] Emit deferred diagnostics by a 
post-parsing AST travese

[CAUTION: External Email]
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[PATCH] D71433: [analyzer] CERT: POS34-C

[Zurab Tsinadze via Phabricator via cfe-commits]

zukatsinadze added a comment.

In D71433#1880436 , @Szelethus wrote:

> I think for an alpha checker this is ready to land if you're ready -- do you 
> have commit access or need assistance?


Thank you. @Charusso will help.


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[PATCH] D72857: [SYCL] Driver option to enable SYCL mode and select SYCL version

[Alexey Bader via Phabricator via cfe-commits]

bader updated this revision to Diff 245213.
bader added a comment.

Address comments from Victor and Alexey.


Repository:
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Files:
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Frontend/InitPreprocessor.cpp
  clang/test/Driver/sycl.c
  clang/test/Frontend/sycl-aux-triple.cpp
  clang/test/Preprocessor/sycl-macro.cpp
  clang/test/SemaSYCL/kernel-attribute.cpp

Index: clang/test/SemaSYCL/kernel-attribute.cpp
===
--- clang/test/SemaSYCL/kernel-attribute.cpp
+++ clang/test/SemaSYCL/kernel-attribute.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fsycl-is-device -verify %s
+// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fsycl -fsycl-is-device -verify %s
 
 // Only function templates
 [[clang::sycl_kernel]] int gv2 = 0; // expected-warning {{'sycl_kernel' attribute only applies to function templates}}
Index: clang/test/Preprocessor/sycl-macro.cpp
===
--- clang/test/Preprocessor/sycl-macro.cpp
+++ clang/test/Preprocessor/sycl-macro.cpp
@@ -1,5 +1,9 @@
 // RUN: %clang_cc1 %s -E -dM | FileCheck %s
-// RUN: %clang_cc1 %s -fsycl-is-device -E -dM | FileCheck --check-prefix=CHECK-SYCL %s
+// RUN: %clang_cc1 %s -fsycl -sycl-std=2015 -E -dM | FileCheck --check-prefix=CHECK-SYCL-STD %s
+// RUN: %clang_cc1 %s -fsycl -fsycl-is-device -sycl-std=1.2.1 -E -dM | FileCheck --check-prefix=CHECK-SYCL-STD %s
+// RUN: %clang_cc1 %s -fsycl -fsycl-is-device -E -dM | FileCheck --check-prefixes=CHECK-SYCL %s
 
 // CHECK-NOT:#define __SYCL_DEVICE_ONLY__ 1
+// CHECK-NOT:#define CL_SYCL_LANGUAGE_VERSION 121
+// CHECK-SYCL-STD:#define CL_SYCL_LANGUAGE_VERSION 121
 // CHECK-SYCL:#define __SYCL_DEVICE_ONLY__ 1
Index: clang/test/Frontend/sycl-aux-triple.cpp
===
--- clang/test/Frontend/sycl-aux-triple.cpp
+++ clang/test/Frontend/sycl-aux-triple.cpp
@@ -1,5 +1,5 @@
 // RUN: %clang_cc1 %s -triple spir -aux-triple x86_64-unknown-linux-gnu -E -dM | FileCheck %s
-// RUN: %clang_cc1 %s -fsycl-is-device -triple spir -aux-triple x86_64-unknown-linux-gnu -E -dM | FileCheck --check-prefix=CHECK-SYCL %s
+// RUN: %clang_cc1 %s -fsycl -fsycl-is-device -triple spir -aux-triple x86_64-unknown-linux-gnu -E -dM | FileCheck --check-prefix=CHECK-SYCL %s
 
 // CHECK-NOT:#define __x86_64__ 1
 // CHECK-SYCL:#define __x86_64__ 1
Index: clang/test/Driver/sycl.c
===
--- clang/test/Driver/sycl.c
+++ clang/test/Driver/sycl.c
@@ -1,10 +1,20 @@
 // RUN: %clang -### -fsycl -c %s 2>&1 | FileCheck %s --check-prefix=ENABLED
 // RUN: %clang -### -fsycl %s 2>&1 | FileCheck %s --check-prefix=ENABLED
+// RUN: %clang -### -fsycl -sycl-std=1.2.1 %s 2>&1 | FileCheck %s --check-prefix=ENABLED
+// RUN: %clang -### -fsycl -sycl-std=121 %s 2>&1 | FileCheck %s --check-prefix=ENABLED
+// RUN: %clang -### -fsycl -sycl-std=2015 %s 2>&1 | FileCheck %s --check-prefix=ENABLED
+// RUN: %clang -### -fsycl -sycl-std=sycl-1.2.1 %s 2>&1 | FileCheck %s --check-prefix=ENABLED
 // RUN: %clang -### -fno-sycl -fsycl %s 2>&1 | FileCheck %s --check-prefix=ENABLED
+// RUN: %clang -### -sycl-std=2015 %s 2>&1 | FileCheck %s --check-prefix=DISABLED
 // RUN: %clangxx -### -fsycl %s 2>&1 | FileCheck %s --check-prefix=ENABLED
 // RUN: %clangxx -### -fno-sycl %s 2>&1 | FileCheck %s --check-prefix=DISABLED
 // RUN: %clangxx -### -fsycl -fno-sycl %s 2>&1 | FileCheck %s --check-prefix=DISABLED
 // RUN: %clangxx -### %s 2>&1 | FileCheck %s --check-prefix=DISABLED
+// RUN: %clang_cl -### -fsycl -sycl-std=2015 %s 2>&1 | FileCheck %s --check-prefix=ENABLED
+// RUN: %clang_cl -### -fsycl %s 2>&1 | FileCheck %s --check-prefix=ENABLED
+// RUN: %clang_cl -### %s 2>&1 | FileCheck %s --check-prefix=DISABLED
 
 // ENABLED: "-cc1"{{.*}} "-fsycl-is-device"
+// ENABLED-SAME: "-sycl-std={{[-.sycl0-9]+}}"
 // DISABLED-NOT: "-fsycl-is-device"
+// DISABLED-NOT: "-sycl-std="
Index: clang/lib/Frontend/InitPreprocessor.cpp
===
--- clang/lib/Frontend/InitPreprocessor.cpp
+++ clang/lib/Frontend/InitPreprocessor.cpp
@@ -450,6 +450,13 @@
 if (LangOpts.FastRelaxedMath)
   Builder.defineMacro("__FAST_RELAXED_MATH__");
   }
+
+  if (LangOpts.SYCL) {
+// SYCL Version is set to a value when building SYCL applications
+if (LangOpts.SYCLVersion == 2015)
+  Builder.defineMacro("CL_SYCL_LANGUAGE_VERSION", "121");
+  }
+
   // Not "standard" per se, but available even with the -undef flag.
   if (LangOpts.AsmPreprocessor)
 Builder.defineMacro("__ASSEMBLER__");
Index: clang/lib/Frontend/CompilerInvocation.cpp

[PATCH] D74704: Support -fuse-ld=lld for riscv

[Leonard Chan via Phabricator via cfe-commits]

leonardchan added a comment.

In D74704#1881012 , @vvereschaka wrote:

> Hello @serge-sans-paille,
>
> looks like these changes broke the ARM builders:
>  http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/4749
>  http://lab.llvm.org:8011/builders/llvm-clang-win-x-aarch64/builds/4752
>
> failed tests:
>
> - FAIL: Clang::riscv64-toolchain.c
> - FAIL: Clang::riscv32-toolchain.c
>
>   with the following error: ``` 
> C:\buildbot\as-builder-1\llvm-clang-win-x-armv7l\llvm-project\clang\test\Driver\riscv64-toolchain.c:15:27:
>  error: C-RV64-BAREMETAL-LP64: expected string not found in input ```
>
>   would you fix the problem or revert the commit?


*Bump* We're also seeing this for our clang bots:

  Failing Tests (4):
  Clang :: Driver/riscv32-toolchain-extra.c
  Clang :: Driver/riscv32-toolchain.c
  Clang :: Driver/riscv64-toolchain-extra.c
  Clang :: Driver/riscv64-toolchain.c

Would you mind addressing this or reverting? Thanks.

Builder log: 
https://luci-milo.appspot.com/p/fuchsia/builders/ci/clang-linux-x64/b123323499438832


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[PATCH] D74033: [clang-tidy] Fix PR#44620 'readability-redundant-string-cstr quick-fix causes invalid code'

[Aaron Ballman via Phabricator via cfe-commits]

aaron.ballman accepted this revision.
aaron.ballman added a comment.
This revision is now accepted and ready to land.

LGTM! Do you need me to commit on your behalf, or have you obtained git 
privileges recently?


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[PATCH] D74776: [Hexagon] clang driver should consider --sysroot option when looking for includes

[Sid Manning via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGfaa889b23587: [Hexagon] clang driver should consider 
--sysroot option (authored by sidneym).

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Files:
  clang/lib/Driver/ToolChains/Hexagon.cpp
  clang/test/Driver/hexagon-toolchain-elf.c


Index: clang/test/Driver/hexagon-toolchain-elf.c
===
--- clang/test/Driver/hexagon-toolchain-elf.c
+++ clang/test/Driver/hexagon-toolchain-elf.c
@@ -577,3 +577,14 @@
 // RUN:   | FileCheck -check-prefix=CHECK082 %s
 // CHECK082-NOT:  -march=
 // CHECK082-NOT:  -mcpu=
+// 
-
+// Passing --sysroot
+// 
-
+// RUN: %clang -### -target hexagon-unknown-elf \
+// RUN:   -ccc-install-dir %S/Inputs/hexagon_tree/Tools/bin \
+// RUN:   -mcpu=hexagonv60 \
+// RUN:   --sysroot=/hexagon \
+// RUN:   %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK083 %s
+// CHECK083:  "-isysroot" "/hexagon"
+// CHECK083:  "-internal-externc-isystem" "/hexagon/include"
Index: clang/lib/Driver/ToolChains/Hexagon.cpp
===
--- clang/lib/Driver/ToolChains/Hexagon.cpp
+++ clang/lib/Driver/ToolChains/Hexagon.cpp
@@ -540,6 +540,13 @@
 return;
 
   const Driver  = getDriver();
+  if (!D.SysRoot.empty()) {
+SmallString<128> P(D.SysRoot);
+llvm::sys::path::append(P, "include");
+addExternCSystemInclude(DriverArgs, CC1Args, P.str());
+return;
+  }
+
   std::string TargetDir = getHexagonTargetDir(D.getInstalledDir(),
   D.PrefixDirs);
   addExternCSystemInclude(DriverArgs, CC1Args, TargetDir + "/hexagon/include");


Index: clang/test/Driver/hexagon-toolchain-elf.c
===
--- clang/test/Driver/hexagon-toolchain-elf.c
+++ clang/test/Driver/hexagon-toolchain-elf.c
@@ -577,3 +577,14 @@
 // RUN:   | FileCheck -check-prefix=CHECK082 %s
 // CHECK082-NOT:  -march=
 // CHECK082-NOT:  -mcpu=
+// -
+// Passing --sysroot
+// -
+// RUN: %clang -### -target hexagon-unknown-elf \
+// RUN:   -ccc-install-dir %S/Inputs/hexagon_tree/Tools/bin \
+// RUN:   -mcpu=hexagonv60 \
+// RUN:   --sysroot=/hexagon \
+// RUN:   %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK083 %s
+// CHECK083:  "-isysroot" "/hexagon"
+// CHECK083:  "-internal-externc-isystem" "/hexagon/include"
Index: clang/lib/Driver/ToolChains/Hexagon.cpp
===
--- clang/lib/Driver/ToolChains/Hexagon.cpp
+++ clang/lib/Driver/ToolChains/Hexagon.cpp
@@ -540,6 +540,13 @@
 return;
 
   const Driver  = getDriver();
+  if (!D.SysRoot.empty()) {
+SmallString<128> P(D.SysRoot);
+llvm::sys::path::append(P, "include");
+addExternCSystemInclude(DriverArgs, CC1Args, P.str());
+return;
+  }
+
   std::string TargetDir = getHexagonTargetDir(D.getInstalledDir(),
   D.PrefixDirs);
   addExternCSystemInclude(DriverArgs, CC1Args, TargetDir + "/hexagon/include");
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[PATCH] D74631: [clang][XCOFF] Indicate that XCOFF does not support COMDATs

[Sean Fertile via Phabricator via cfe-commits]

sfertile accepted this revision.
sfertile added a comment.
This revision is now accepted and ready to land.

LGTM.




Comment at: llvm/docs/LangRef.rst:913
 
-Note that the Mach-O platform doesn't support COMDATs, and ELF and WebAssembly
-only support ``any`` as a selection kind.
+Note that XCOFF and the Mach-O platform don't support COMDATs, and ELF and
+WebAssembly only support ``any`` as a selection kind.

really minor nit: The current wording sounds a bit odd to my ear. Maybe either 
`XCOFF and Mach-O platforms` or  `XCOFF and Mach-O don't support COMDATs, ...` 


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[clang] faa889b - [Hexagon] clang driver should consider --sysroot option

[Sid Manning via cfe-commits]

Author: Sid Manning
Date: 2020-02-18T14:25:55-06:00
New Revision: faa889b2358704c57febf2ad75ad88eec5debf31

URL: 
https://github.com/llvm/llvm-project/commit/faa889b2358704c57febf2ad75ad88eec5debf31
DIFF: 
https://github.com/llvm/llvm-project/commit/faa889b2358704c57febf2ad75ad88eec5debf31.diff

LOG: [Hexagon] clang driver should consider --sysroot option

Hexagon's clang driver should consider --sysroot option when setting
up include paths.

Differential Revision: https://reviews.llvm.org/D74776

Added: 


Modified: 
clang/lib/Driver/ToolChains/Hexagon.cpp
clang/test/Driver/hexagon-toolchain-elf.c

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Hexagon.cpp 
b/clang/lib/Driver/ToolChains/Hexagon.cpp
index 2b9046712a26..25e9f1b6c222 100644
--- a/clang/lib/Driver/ToolChains/Hexagon.cpp
+++ b/clang/lib/Driver/ToolChains/Hexagon.cpp
@@ -540,6 +540,13 @@ void HexagonToolChain::AddClangSystemIncludeArgs(const 
ArgList ,
 return;
 
   const Driver  = getDriver();
+  if (!D.SysRoot.empty()) {
+SmallString<128> P(D.SysRoot);
+llvm::sys::path::append(P, "include");
+addExternCSystemInclude(DriverArgs, CC1Args, P.str());
+return;
+  }
+
   std::string TargetDir = getHexagonTargetDir(D.getInstalledDir(),
   D.PrefixDirs);
   addExternCSystemInclude(DriverArgs, CC1Args, TargetDir + "/hexagon/include");

diff  --git a/clang/test/Driver/hexagon-toolchain-elf.c 
b/clang/test/Driver/hexagon-toolchain-elf.c
index 9b5ebe3c86a4..4af00215ea31 100644
--- a/clang/test/Driver/hexagon-toolchain-elf.c
+++ b/clang/test/Driver/hexagon-toolchain-elf.c
@@ -577,3 +577,14 @@
 // RUN:   | FileCheck -check-prefix=CHECK082 %s
 // CHECK082-NOT:  -march=
 // CHECK082-NOT:  -mcpu=
+// 
-
+// Passing --sysroot
+// 
-
+// RUN: %clang -### -target hexagon-unknown-elf \
+// RUN:   -ccc-install-dir %S/Inputs/hexagon_tree/Tools/bin \
+// RUN:   -mcpu=hexagonv60 \
+// RUN:   --sysroot=/hexagon \
+// RUN:   %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK083 %s
+// CHECK083:  "-isysroot" "/hexagon"
+// CHECK083:  "-internal-externc-isystem" "/hexagon/include"



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[clang-tools-extra] 47282b1 - Fix PR#44620 'readability-redundant-string-cstr quick-fix causes invalid code'

[Aaron Ballman via cfe-commits]

Author: Karasev Nikita
Date: 2020-02-18T15:33:52-05:00
New Revision: 47282b1b4bf3e18d2e2166b87159115ed520a2aa

URL: 
https://github.com/llvm/llvm-project/commit/47282b1b4bf3e18d2e2166b87159115ed520a2aa
DIFF: 
https://github.com/llvm/llvm-project/commit/47282b1b4bf3e18d2e2166b87159115ed520a2aa.diff

LOG: Fix PR#44620 'readability-redundant-string-cstr quick-fix causes invalid 
code'

static void f2(std::string&&) {}
static void f() {
std::string const s;
f2(s.c_str()); // readability-redundant-string-cstr previously warning
}

Skips the problematic AST pattern in the matcher.

Added: 


Modified: 
clang-tools-extra/clang-tidy/readability/RedundantStringCStrCheck.cpp

clang-tools-extra/test/clang-tidy/checkers/readability-redundant-string-cstr.cpp

Removed: 




diff  --git 
a/clang-tools-extra/clang-tidy/readability/RedundantStringCStrCheck.cpp 
b/clang-tools-extra/clang-tidy/readability/RedundantStringCStrCheck.cpp
index 78834914a5cc..d365bbbe3c43 100644
--- a/clang-tools-extra/clang-tidy/readability/RedundantStringCStrCheck.cpp
+++ b/clang-tools-extra/clang-tidy/readability/RedundantStringCStrCheck.cpp
@@ -61,6 +61,55 @@ formatDereference(const 
ast_matchers::MatchFinder::MatchResult ,
   return (llvm::Twine("*") + Text).str();
 }
 
+// Trying to get CallExpr in which CxxConstructExpr is called.
+static const clang::CallExpr *
+tryGetCallExprAncestorForCxxConstructExpr(const Expr *TheExpr,
+  ASTContext ) {
+  // We skip nodes such as CXXBindTemporaryExpr, MaterializeTemporaryExpr.
+  for (ast_type_traits::DynTypedNode DynParent : Context.getParents(*TheExpr)) 
{
+if (const auto *Parent = DynParent.get()) {
+  if (const auto *TheCallExpr = dyn_cast(Parent))
+return TheCallExpr;
+
+  if (const clang::CallExpr *TheCallExpr =
+  tryGetCallExprAncestorForCxxConstructExpr(Parent, Context))
+return TheCallExpr;
+}
+  }
+
+  return nullptr;
+}
+
+// Check that ParamDecl of CallExprDecl has rvalue type.
+static bool checkParamDeclOfAncestorCallExprHasRValueRefType(
+const Expr *TheCxxConstructExpr, ASTContext ) {
+  if (const clang::CallExpr *TheCallExpr =
+  tryGetCallExprAncestorForCxxConstructExpr(TheCxxConstructExpr,
+Context)) {
+for (int i = 0; i < TheCallExpr->getNumArgs(); ++i) {
+  const Expr *Arg = TheCallExpr->getArg(i);
+  if (Arg->getSourceRange() == TheCxxConstructExpr->getSourceRange()) {
+if (const auto *TheCallExprFuncProto =
+TheCallExpr->getCallee()
+->getType()
+->getPointeeType()
+->getAs()) {
+  if (TheCallExprFuncProto->getParamType(i)->isRValueReferenceType())
+return true;
+}
+  }
+}
+  }
+
+  return false;
+}
+
+AST_MATCHER(CXXConstructExpr,
+matchedParamDeclOfAncestorCallExprHasRValueRefType) {
+  return checkParamDeclOfAncestorCallExprHasRValueRefType(
+  , Finder->getASTContext());
+}
+
 } // end namespace
 
 void RedundantStringCStrCheck::registerMatchers(
@@ -95,9 +144,13 @@ void RedundantStringCStrCheck::registerMatchers(
   .bind("call");
 
   // Detect redundant 'c_str()' calls through a string constructor.
-  Finder->addMatcher(cxxConstructExpr(StringConstructorExpr,
-  hasArgument(0, StringCStrCallExpr)),
- this);
+  // If CxxConstructExpr is the part of some CallExpr we need to
+  // check that matched ParamDecl of the ancestor CallExpr is not rvalue.
+  Finder->addMatcher(
+  cxxConstructExpr(
+  StringConstructorExpr, hasArgument(0, StringCStrCallExpr),
+  unless(matchedParamDeclOfAncestorCallExprHasRValueRefType())),
+  this);
 
   // Detect: 's == str.c_str()'  ->  's == str'
   Finder->addMatcher(

diff  --git 
a/clang-tools-extra/test/clang-tidy/checkers/readability-redundant-string-cstr.cpp
 
b/clang-tools-extra/test/clang-tidy/checkers/readability-redundant-string-cstr.cpp
index d8434d3ca7c5..1773dc57a8d8 100644
--- 
a/clang-tools-extra/test/clang-tidy/checkers/readability-redundant-string-cstr.cpp
+++ 
b/clang-tools-extra/test/clang-tidy/checkers/readability-redundant-string-cstr.cpp
@@ -205,3 +205,18 @@ void dummy(const char*) {}
 void invalid(const NotAString ) {
   dummy(s.c_str());
 }
+
+// Test for rvalue std::string.
+void m1(std::string&&) {
+  std::string s;
+
+  m1(s.c_str());
+
+  void (*m1p1)(std::string&&);
+  m1p1 = m1;
+  m1p1(s.c_str());
+
+  using m1tp = void (*)(std::string &&);
+  m1tp m1p2 = m1;
+  m1p2(s.c_str());  
+}



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[PATCH] D74631: [clang][XCOFF] Indicate that XCOFF does not support COMDATs

[David Tenty via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG58817a0783ca: [clang][XCOFF] Indicate that XCOFF does not 
support COMDATs (authored by daltenty).

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Files:
  clang/test/CodeGen/xcoff-comdat.cpp
  llvm/docs/LangRef.rst
  llvm/include/llvm/ADT/Triple.h


Index: llvm/include/llvm/ADT/Triple.h
===
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -743,7 +743,7 @@
 
   /// Tests whether the target supports comdat
   bool supportsCOMDAT() const {
-return !isOSBinFormatMachO();
+return !(isOSBinFormatMachO() || isOSBinFormatXCOFF());
   }
 
   /// Tests whether the target uses emulated TLS as default.
Index: llvm/docs/LangRef.rst
===
--- llvm/docs/LangRef.rst
+++ llvm/docs/LangRef.rst
@@ -910,8 +910,8 @@
 The linker may choose any COMDAT key but the sections must contain the
 same amount of data.
 
-Note that the Mach-O platform doesn't support COMDATs, and ELF and WebAssembly
-only support ``any`` as a selection kind.
+Note that XCOFF and the Mach-O platform don't support COMDATs, and ELF and
+WebAssembly only support ``any`` as a selection kind.
 
 Here is an example of a COMDAT group where a function will only be selected if
 the COMDAT key's section is the largest:
Index: clang/test/CodeGen/xcoff-comdat.cpp
===
--- /dev/null
+++ clang/test/CodeGen/xcoff-comdat.cpp
@@ -0,0 +1,10 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix -emit-llvm -o - %s | FileCheck %s
+
+class a {
+  virtual void d() {}
+  virtual void e();
+};
+void a::e() {}
+
+// CHECK-NOT: = comdat


Index: llvm/include/llvm/ADT/Triple.h
===
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -743,7 +743,7 @@
 
   /// Tests whether the target supports comdat
   bool supportsCOMDAT() const {
-return !isOSBinFormatMachO();
+return !(isOSBinFormatMachO() || isOSBinFormatXCOFF());
   }
 
   /// Tests whether the target uses emulated TLS as default.
Index: llvm/docs/LangRef.rst
===
--- llvm/docs/LangRef.rst
+++ llvm/docs/LangRef.rst
@@ -910,8 +910,8 @@
 The linker may choose any COMDAT key but the sections must contain the
 same amount of data.
 
-Note that the Mach-O platform doesn't support COMDATs, and ELF and WebAssembly
-only support ``any`` as a selection kind.
+Note that XCOFF and the Mach-O platform don't support COMDATs, and ELF and
+WebAssembly only support ``any`` as a selection kind.
 
 Here is an example of a COMDAT group where a function will only be selected if
 the COMDAT key's section is the largest:
Index: clang/test/CodeGen/xcoff-comdat.cpp
===
--- /dev/null
+++ clang/test/CodeGen/xcoff-comdat.cpp
@@ -0,0 +1,10 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix -emit-llvm -o - %s | FileCheck %s
+
+class a {
+  virtual void d() {}
+  virtual void e();
+};
+void a::e() {}
+
+// CHECK-NOT: = comdat
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[PATCH] D74698: [CodeGen] -pg shouldn't add "frame-pointer"="all" fn attr w/ -mfentry

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added a comment.

When -mfentry is specified, why should frame pointers be disabled? Is that 
because the Linux kernel has assumption about the exact code sequence? `call 
__fentry__` is the first instruction. Isn't that sufficient?

(There is another difference. GCC emits `call *__fentry__@GOTPCREL(%rip)` in 
-fpie/-fpic mode. At first glance, this looks suboptimal to me. I don't expect 
`__fentry__` to be interposed.)
(This may be another example demonstrating that piggybacking an option 
(-mfentry) on top of an existing one (-pg) can turn out to be a bad idea...)


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[PATCH] D74562: [OpenMP][OMPIRBuilder] Introducing the `OMPBuilderCBHelpers` helper class

[Fady Ghanim via Phabricator via cfe-commits]

fghanim updated this revision to Diff 245227.
fghanim added a comment.

Marking a call void


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Files:
  clang/lib/CodeGen/CGStmtOpenMP.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/test/OpenMP/cancel_codegen.cpp

Index: clang/test/OpenMP/cancel_codegen.cpp
===
--- clang/test/OpenMP/cancel_codegen.cpp
+++ clang/test/OpenMP/cancel_codegen.cpp
@@ -192,9 +192,7 @@
 // IRBUILDER: [[CMP:%.+]] = icmp eq i32 [[RES]], 0
 // IRBUILDER: br i1 [[CMP]], label %[[CONTINUE:[^,].+]], label %[[EXIT:.+]]
 // IRBUILDER: [[EXIT]]
-// IRBUILDER: br label %[[EXIT2:.+]]
-// IRBUILDER: [[EXIT2]]
-// IRBUILDER: br label %[[RETURN]]
+// IRBUILDER: br label %[[RETURN:.+]]
 // IRBUILDER: [[CONTINUE]]
 // IRBUILDER: br label %[[ELSE:.+]]
 
Index: clang/lib/CodeGen/CodeGenFunction.h
===
--- clang/lib/CodeGen/CodeGenFunction.h
+++ clang/lib/CodeGen/CodeGenFunction.h
@@ -36,6 +36,7 @@
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/SmallVector.h"
+#include "llvm/Frontend/OpenMP/OMPIRBuilder.h"
 #include "llvm/IR/ValueHandle.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Transforms/Utils/SanitizerStats.h"
@@ -255,6 +256,114 @@
 unsigned Index;
   };
 
+  // Helper class for the OpenMP IR Builder. Allows reusability of code used for
+  // region body, and finalization codegen callbacks. This will class will also
+  // contain privatization functions used by the privatization call backs
+  struct OMPBuilderCBHelpers {
+
+using InsertPointTy = llvm::OpenMPIRBuilder::InsertPointTy;
+
+/// Emit the Finalization for an OMP region
+/// \param CGF	The Codegen function this belongs to
+/// \param IP	Insertion point for generating the finalization code.
+static void FinalizeOMPRegion(CodeGenFunction , InsertPointTy IP) {
+  CGBuilderTy::InsertPointGuard IPG(CGF.Builder);
+  assert(IP.getBlock()->end() != IP.getPoint() &&
+ "OpenMP IR Builder should cause terminated block!");
+
+  llvm::BasicBlock *IPBB = IP.getBlock();
+  llvm::BasicBlock *DestBB = IPBB->getUniqueSuccessor();
+  assert(DestBB && "Finalization block should have one successor!");
+
+  // erase and replace with cleanup branch.
+  IPBB->getTerminator()->eraseFromParent();
+  CGF.Builder.SetInsertPoint(IPBB);
+  CodeGenFunction::JumpDest Dest = CGF.getJumpDestInCurrentScope(DestBB);
+  CGF.EmitBranchThroughCleanup(Dest);
+}
+
+/// Emit the body of an OMP region
+/// \param CGF	The Codegen function this belongs to
+/// \param RegionBodyStmt	The body statement for the OpenMP region being
+/// 			 generated
+/// \param CodeGenIP	Insertion point for generating the body code.
+/// \param FiniBB	The finalization basic block
+static void EmitOMPRegionBody(CodeGenFunction ,
+  const Stmt *RegionBodyStmt,
+  InsertPointTy CodeGenIP,
+  llvm::BasicBlock ) {
+  llvm::BasicBlock *CodeGenIPBB = CodeGenIP.getBlock();
+  if (llvm::Instruction *CodeGenIPBBTI = CodeGenIPBB->getTerminator())
+CodeGenIPBBTI->eraseFromParent();
+
+  CGF.Builder.SetInsertPoint(CodeGenIPBB);
+
+  CGF.EmitStmt(RegionBodyStmt);
+
+  if (CGF.Builder.saveIP().isSet())
+CGF.Builder.CreateBr();
+}
+
+/// RAII for preserving necessary info during Outlined region body codegen.
+class OutlinedRegionBodyRAII {
+
+  llvm::AssertingVH OldAllocaIP;
+  CodeGenFunction::JumpDest OldReturnBlock;
+  CodeGenFunction 
+
+public:
+  OutlinedRegionBodyRAII(CodeGenFunction , InsertPointTy ,
+ llvm::BasicBlock )
+  : CGF(cgf) {
+assert(AllocaIP.isSet() &&
+   "Must specify Insertion point for allocas of outlined function");
+OldAllocaIP = CGF.AllocaInsertPt;
+CGF.AllocaInsertPt = &*AllocaIP.getPoint();
+
+OldReturnBlock = CGF.ReturnBlock;
+CGF.ReturnBlock = CGF.getJumpDestInCurrentScope();
+  }
+
+  ~OutlinedRegionBodyRAII() {
+CGF.AllocaInsertPt = OldAllocaIP;
+CGF.ReturnBlock = OldReturnBlock;
+  }
+};
+
+/// RAII for preserving necessary info during inlined region body codegen.
+class InlinedRegionBodyRAII {
+
+  llvm::AssertingVH OldAllocaIP;
+  CodeGenFunction 
+
+public:
+  InlinedRegionBodyRAII(CodeGenFunction , InsertPointTy ,
+llvm::BasicBlock )
+  : CGF(cgf) {
+// Alloca insertion block should be in the entry block of the containing
+// function so it expects an empty AllocaIP in which case will reuse the
+// old alloca insertion point, or a new AllocaIP in the 

[PATCH] D74698: [CodeGen] -pg shouldn't add "frame-pointer"="all" fn attr w/ -mfentry

[Fangrui Song via Phabricator via cfe-commits]

MaskRay accepted this revision.
MaskRay added a comment.
This revision is now accepted and ready to land.

In D74698#188 , @nickdesaulniers 
wrote:

> In D74698#1881034 , @MaskRay wrote:
>
> > When -mfentry is specified, why should frame pointers be disabled?
>
>
> It doesn't disable them; `-pg` was force enabling them for all functions, 
> when in GCC does not enable them for the combination of `-pg -mfentry`.  This 
> patch is simply matching the behavior of GCC.  If you want the existing 
> behavior, then `-pg -mfentry -fno-omit-frame-pointer` works with this patch 
> applied.  `-pg` should not be setting `-fno-omit-frame-pointers` in the 
> presence of `-mfentry`.
>
> > Is that because the Linux kernel has assumption about the exact code 
> > sequence? `call __fentry__` is the first instruction. Isn't that sufficient?
>
> It's not that the current implementation is broken or doesn't work, it's that 
> it's inefficient from the Kernel's perspective.  The kernel does not want 
> frame pointers as it has its own means for unwinding (though there are many 
> unwinders in the kernel, sometimes per architecture, some do rely on frame 
> pointers but explicitly add `-fno-omit-frame-pointer` if necessary). When 
> configuring a kernel to be able to trace kernel execution at runtime, `-pg 
> -mfentry` are added for x86_64, specifically because they don't add frame 
> pointers.  So it seems like Clang is strictly worse than GCC in this regard, 
> as when enabling kernel tracing, suddenly clang starts emitting unwanted 
> frame pointer instructions.
>
> > (This may be another example demonstrating that piggybacking an option 
> > (-mfentry) on top of an existing one (-pg) can turn out to be a bad idea...)
>
> Agreed.
>
> Also, more context:
>  https://www.linuxjournal.com/content/simplifying-function-tracing-modern-gcc
>  https://lore.kernel.org/patchwork/patch/1072232/
>  
> https://linux.kernel.narkive.com/X1y4Jcj4/rfc-how-to-handle-function-tracing-frame-pointers-and-mfentry


(I happened to have investigated these stuff 2 weeks ago... 
https://maskray.me/blog/2020-02-01-fpatchable-function-entry in case someone 
can read Chinese)

I believe -pg was invented in 1980s or earlier. I can find it in the first few 
commits of GCC SVN (circa 1990, after the repository was converted from RCS).

-pg has a good reason that it needs to retain frame pointers. Implementations 
usually read the caller return address via the frame pointer, e.g. 
`glibc/sysdeps/x86_64/_mcount.S`

/* Get frompc via the frame pointer.  */
movq8(%rbp),%rdi
call C_SYMBOL_NAME(__mcount_internal)

I really hope GCC r162651 (2010) (GCC 4.6) 

 did not piggyback -mfentry on top of -pg...
Anyway, it is too late to change anything...

The patch matches gcc/config/i386/i386.c

  static bool
  ix86_frame_pointer_required (void)
  {
  ...
if (crtl->profile && !flag_fentry) /// -pg but not -mfentry
  return true;
  
return false;
  }




Comment at: clang/test/CodeGen/fentry.c:5
 // RUN: %clang_cc1 -mfentry -triple x86_64-unknown-linux-gnu -emit-llvm -o - 
%s | FileCheck -check-prefix=NOPG %s
+// RUN: %clang_cc1 -pg -mfentry -emit-llvm -o - %s | FileCheck 
-check-prefix=NOFP  %s
 

`--implicit-check-not='"frame-pointer"="all"'` may be better


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[PATCH] D74784: [driver][darwin] Don't use -platform_version flag by default

[Duncan P. N. Exon Smith via Phabricator via cfe-commits]

dexonsmith added a comment.

Code change looks correct to me.  Thanks for the fix!

@arphaman, can you confirm the test changes are reasonable?  My instinct would 
have been, instead of changing all of the 400s to 0s, to just adding a single 
`RUN` line somewhere to confirm we don't do the wrong thing for 0.


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[PATCH] D74787: [IRBuilder] Always respect inserter/folder

[Michael Kruse via Phabricator via cfe-commits]

Meinersbur added a comment.

Nice work




Comment at: llvm/test/Transforms/InstCombine/saturating-add-sub.ll:2
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -instcombine -S | FileCheck %s
+; RUN: opt < %s -instcombine -instcombine-infinite-loop-threshold=2 -S | 
FileCheck %s
 

IMHO how the folding works internally (folded by IRBuilder instead of 
InstCombine rule) does not need to be part of a/this regression test. If 
another test is added to this file requiring 3 rounds, it would raise some 
confusions.


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[PATCH] D73534: [DebugInfo] Enable the debug entry values feature by default

[Djordje Todorovic via Phabricator via cfe-commits]

djtodoro updated this revision to Diff 245123.
djtodoro added a comment.

-Addressing the latest comments


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Files:
  clang/include/clang/Basic/CodeGenOptions.def
  clang/include/clang/Driver/CC1Options.td
  clang/lib/CodeGen/BackendUtil.cpp
  clang/lib/CodeGen/CGDebugInfo.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/debug-info-extern-call.c
  clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp
  lldb/packages/Python/lldbsuite/test/decorators.py
  
lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile
  llvm/include/llvm/CodeGen/CommandFlags.inc
  llvm/include/llvm/Target/TargetMachine.h
  llvm/include/llvm/Target/TargetOptions.h
  llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
  llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
  llvm/lib/CodeGen/LiveDebugValues.cpp
  llvm/lib/CodeGen/MIRParser/MIRParser.cpp
  llvm/lib/CodeGen/MachineFunction.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
  llvm/lib/CodeGen/TargetOptionsImpl.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMTargetMachine.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86TargetMachine.cpp
  llvm/test/CodeGen/ARM/smml.ll
  llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir
  llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir
  llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir
  llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir
  llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir
  llvm/test/CodeGen/X86/call-site-info-output.ll
  llvm/test/CodeGen/X86/tail-dup-repeat.ll
  llvm/test/DebugInfo/AArch64/call-site-info-output.ll
  llvm/test/DebugInfo/ARM/call-site-info-output.ll
  llvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll
  llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpret-movzxi.mir
  llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir
  llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
  llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
  llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
  llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir
  llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir
  llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir
  llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir
  llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir
  llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
  llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir
  llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
  llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir
  llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
  llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
  llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
  llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
  llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
  llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
  llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir
  llvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll
  llvm/test/DebugInfo/X86/dbg-value-range.ll
  llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
  llvm/test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll
  llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll
  llvm/test/DebugInfo/X86/loclists-dwp.ll
  llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll
  llvm/test/tools/llvm-dwarfdump/X86/locstats.ll
  llvm/test/tools/llvm-dwarfdump/X86/stats-dbg-callsite-info.ll
  llvm/test/tools/llvm-dwarfdump/X86/valid-call-site-GNU-extensions.ll
  llvm/test/tools/llvm-locstats/locstats.ll

Index: llvm/test/tools/llvm-locstats/locstats.ll
===
--- llvm/test/tools/llvm-locstats/locstats.ll
+++ llvm/test/tools/llvm-locstats/locstats.ll
@@ -9,9 +9,9 @@
 ; LOCSTATS: [10%,20%) 0 0%
 ; LOCSTATS: [20%,30%) 1 11%
 ; LOCSTATS: [30%,40%) 0 0%
-; LOCSTATS: [40%,50%) 1 11%
-; LOCSTATS: [50%,60%) 1 11%
-; LOCSTATS: [60%,70%) 1 11%
+; LOCSTATS: [40%,50%) 0 0%
+; LOCSTATS: [50%,60%) 0 0%
+; LOCSTATS: [60%,70%) 3 33%
 ; LOCSTATS: [70%,80%) 0 0%
 ; LOCSTATS: [80%,90%) 2 22%
 ; LOCSTATS: [90%,100%) 1 11%
Index: llvm/test/tools/llvm-dwarfdump/X86/valid-call-site-GNU-extensions.ll
===
--- 

[PATCH] D74760: [Analyzer] Fix for iterator modeling and checkers: handle negative numbers correctly

[Balogh, Ádám via Phabricator via cfe-commits]

baloghadamsoftware created this revision.
baloghadamsoftware added reviewers: NoQ, Szelethus.
baloghadamsoftware added a project: clang.
Herald added subscribers: steakhal, Charusso, donat.nagy, mikhail.ramalho, 
a.sidorin, rnkovacs, szepet, whisperity.

Currently, using negative numbers in iterator operations (additions and 
subractions) results in advancements with huge positive numbers due to an 
error. This patch fixes it.


Repository:
  rC Clang

https://reviews.llvm.org/D74760

Files:
  clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
  clang/test/Analysis/iterator-modelling.cpp

Index: clang/test/Analysis/iterator-modelling.cpp
===
--- clang/test/Analysis/iterator-modelling.cpp
+++ clang/test/Analysis/iterator-modelling.cpp
@@ -100,6 +100,16 @@
   clang_analyzer_express(clang_analyzer_iterator_position(i)); //expected-warning{{$v.begin() + 2}}
 }
 
+void plus_equal_negative(const std::vector ) {
+  auto i = v.end();
+
+  clang_analyzer_denote(clang_analyzer_container_end(v), "$v.end()");
+
+  i += -2;
+
+  clang_analyzer_express(clang_analyzer_iterator_position(i)); //expected-warning{{$v.end() - 2}}
+}
+
 void minus_equal(const std::vector ) {
   auto i = v.end();
 
@@ -110,6 +120,16 @@
   clang_analyzer_express(clang_analyzer_iterator_position(i)); //expected-warning{{$v.end() - 2}}
 }
 
+void minus_equal_negative(const std::vector ) {
+  auto i = v.begin();
+
+  clang_analyzer_denote(clang_analyzer_container_begin(v), "$v.begin()");
+
+  i -= -2;
+
+  clang_analyzer_express(clang_analyzer_iterator_position(i)); //expected-warning{{$v.begin() + 2}}
+}
+
 void copy(const std::vector ) {
   auto i1 = v.end();
 
@@ -132,6 +152,17 @@
   clang_analyzer_express(clang_analyzer_iterator_position(i2)); //expected-warning{{$v.begin() + 2}}
 }
 
+void plus_negative(const std::vector ) {
+  auto i1 = v.end();
+
+  clang_analyzer_denote(clang_analyzer_container_end(v), "$v.end()");
+
+  auto i2 = i1 + (-2);
+
+  clang_analyzer_eval(clang_analyzer_iterator_container(i2) == ); // expected-warning{{TRUE}}
+  clang_analyzer_express(clang_analyzer_iterator_position(i2)); //expected-warning{{$v.end() - 2}}
+}
+
 void minus(const std::vector ) {
   auto i1 = v.end();
 
@@ -143,6 +174,17 @@
   clang_analyzer_express(clang_analyzer_iterator_position(i2)); //expected-warning{{$v.end() - 2}}
 }
 
+void minus_negative(const std::vector ) {
+  auto i1 = v.begin();
+
+  clang_analyzer_denote(clang_analyzer_container_begin(v), "$v.begin()");
+
+  auto i2 = i1 - (-2);
+
+  clang_analyzer_eval(clang_analyzer_iterator_container(i2) == ); // expected-warning{{TRUE}}
+  clang_analyzer_express(clang_analyzer_iterator_position(i2)); //expected-warning{{$v.begin() + 2}}
+}
+
 void copy_and_increment1(const std::vector ) {
   auto i1 = v.begin();
 
Index: clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
===
--- clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
+++ clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
@@ -200,22 +200,29 @@
 
   auto  = State->getStateManager().getSymbolManager();
   auto  = State->getStateManager().getSValBuilder();
+  auto  = State->getStateManager().getBasicVals();
 
   assert ((Op == OO_Plus || Op == OO_PlusEqual ||
Op == OO_Minus || Op == OO_MinusEqual) &&
   "Advance operator must be one of +, -, += and -=.");
   auto BinOp = (Op == OO_Plus || Op == OO_PlusEqual) ? BO_Add : BO_Sub;
-  if (const auto IntDist = Distance.getAs()) {
-// For concrete integers we can calculate the new position
-const auto NewPos =
-  Pos->setTo(SVB.evalBinOp(State, BinOp,
-   nonloc::SymbolVal(Pos->getOffset()),
-   *IntDist, SymMgr.getType(Pos->getOffset()))
- .getAsSymbol());
-return setIteratorPosition(State, Iter, NewPos);
-  }
+  const auto IntDistOp = Distance.getAs();
+  if (!IntDistOp)
+return nullptr;
 
-  return nullptr;
+  // For concrete integers we can calculate the new position
+  nonloc::ConcreteInt IntDist = *IntDistOp;
+
+  if (IntDist.getValue().isNegative()) {
+IntDist = nonloc::ConcreteInt(BVF.getValue(-IntDist.getValue()));
+BinOp = (BinOp == BO_Add) ? BO_Sub : BO_Add;
+  }
+  const auto NewPos =
+Pos->setTo(SVB.evalBinOp(State, BinOp,
+ nonloc::SymbolVal(Pos->getOffset()),
+ IntDist, SymMgr.getType(Pos->getOffset()))
+   .getAsSymbol());
+  return setIteratorPosition(State, Iter, NewPos);
 }
 
 // This function tells the analyzer's engine that symbols produced by our
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[PATCH] D74724: [AArch64][SVE] CodeGen of ACLE Builtin Types

[Sander de Smalen via Phabricator via cfe-commits]

sdesmalen updated this revision to Diff 245127.
sdesmalen added a comment.

- Inlined function into switch statement
- Removed changes to IRTranslator.cpp from this patch.


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Files:
  clang/lib/CodeGen/CGDecl.cpp
  clang/lib/CodeGen/CodeGenTypes.cpp
  clang/test/CodeGen/aarch64-sve.c

Index: clang/test/CodeGen/aarch64-sve.c
===
--- clang/test/CodeGen/aarch64-sve.c
+++ clang/test/CodeGen/aarch64-sve.c
@@ -1,9 +1,51 @@
 // RUN: not %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
-// RUN:  -emit-llvm -o - %s -debug-info-kind=limited 2>&1 | FileCheck %s
+// RUN:  -emit-llvm -o - %s -debug-info-kind=limited 2>&1 | FileCheck %s -check-prefix=CHECK-DEBUG
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
+// RUN:  -emit-llvm -o - %s 2>&1 | FileCheck %s -check-prefix=CHECK
 
-// Placeholder test for SVE types
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVInt8_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVInt16_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVInt32_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVInt64_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVUint8_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVUint16_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVUint32_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVUint64_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVFloat16_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVFloat32_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVFloat64_t'
+// CHECK-DEBUG: cannot yet generate debug info for SVE type '__SVBool_t'
 
-// CHECK: cannot yet generate code for SVE type '__SVInt8_t'
-// CHECK: cannot yet generate debug info for SVE type '__SVInt8_t'
+// CHECK: @ptr = common global * null, align 8
+// CHECK: %s8 = alloca , align 16
+// CHECK: %s16 = alloca , align 16
+// CHECK: %s32 = alloca , align 16
+// CHECK: %s64 = alloca , align 16
+// CHECK: %u8 = alloca , align 16
+// CHECK: %u16 = alloca , align 16
+// CHECK: %u32 = alloca , align 16
+// CHECK: %u64 = alloca , align 16
+// CHECK: %f16 = alloca , align 16
+// CHECK: %f32 = alloca , align 16
+// CHECK: %f64 = alloca , align 16
+// CHECK: %b8 = alloca , align 2
 
 __SVInt8_t *ptr;
+
+void test_locals(void) {
+  __SVInt8_t s8;
+  __SVInt16_t s16;
+  __SVInt32_t s32;
+  __SVInt64_t s64;
+
+  __SVUint8_t u8;
+  __SVUint16_t u16;
+  __SVUint32_t u32;
+  __SVUint64_t u64;
+
+  __SVFloat16_t f16;
+  __SVFloat32_t f32;
+  __SVFloat64_t f64;
+
+  __SVBool_t b8;
+}
Index: clang/lib/CodeGen/CodeGenTypes.cpp
===
--- clang/lib/CodeGen/CodeGenTypes.cpp
+++ clang/lib/CodeGen/CodeGenTypes.cpp
@@ -511,23 +511,44 @@
 case BuiltinType::OCLReserveID:
   ResultType = CGM.getOpenCLRuntime().convertOpenCLSpecificType(Ty);
   break;
-
-// TODO: real CodeGen support for SVE types requires more infrastructure
-// to be added first.  Report an error until then.
-#define SVE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
-#include "clang/Basic/AArch64SVEACLETypes.def"
-{
-  unsigned DiagID = CGM.getDiags().getCustomDiagID(
-  DiagnosticsEngine::Error,
-  "cannot yet generate code for SVE type '%0'");
-  auto *BT = cast(Ty);
-  auto Name = BT->getName(CGM.getContext().getPrintingPolicy());
-  CGM.getDiags().Report(DiagID) << Name;
-  // Return something safe.
-  ResultType = llvm::IntegerType::get(getLLVMContext(), 32);
+case BuiltinType::SveInt8:
+case BuiltinType::SveUint8:
+  return llvm::VectorType::get(llvm::IntegerType::get(getLLVMContext(), 8),
+   {16, true});
+case BuiltinType::SveInt16:
+case BuiltinType::SveUint16:
+  return llvm::VectorType::get(llvm::IntegerType::get(getLLVMContext(), 16),
+   {8, true});
+case BuiltinType::SveInt32:
+case BuiltinType::SveUint32:
+  return llvm::VectorType::get(llvm::IntegerType::get(getLLVMContext(), 32),
+   {4, true});
+case BuiltinType::SveInt64:
+case BuiltinType::SveUint64:
+  return llvm::VectorType::get(llvm::IntegerType::get(getLLVMContext(), 64),
+   {2, true});
+case BuiltinType::SveFloat16:
+  return llvm::VectorType::get(
+  getTypeForFormat(getLLVMContext(),
+   Context.getFloatTypeSemantics(Context.HalfTy),
+   /* UseNativeHalf = */ true),
+  {8, true});
+case BuiltinType::SveFloat32:
+  return llvm::VectorType::get(
+  getTypeForFormat(getLLVMContext(),
+  

[PATCH] D74735: [analyzer] Add support for CXXInheritedCtorInitExpr.

[Gábor Horváth via Phabricator via cfe-commits]

xazax.hun added a comment.

If the AST is hard to work with would it make sense to try to change the AST a 
bit?




Comment at: clang/lib/StaticAnalyzer/Core/CallEvent.cpp:944
+  if (Data) {
+loc::MemRegionVal MV(static_cast(Data));
+if (SymbolRef Sym = MV.getAsSymbol(true))

Maybe reusing `getCXXThisVal` here to reduce the number of casts?


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[clang] cc7a197 - Fix riscv/lld test interaction

[via cfe-commits]

Author: serge-sans-paille
Date: 2020-02-18T12:34:07+01:00
New Revision: cc7a197f9f1039e36625249199aa652f84506802

URL: 
https://github.com/llvm/llvm-project/commit/cc7a197f9f1039e36625249199aa652f84506802
DIFF: 
https://github.com/llvm/llvm-project/commit/cc7a197f9f1039e36625249199aa652f84506802.diff

LOG: Fix riscv/lld test interaction

Fix for dd230142d8a00f5f30c3930a2407000e845dcfbf, in case ld.lld is not
available.

Added: 


Modified: 
clang/test/Driver/riscv32-toolchain.c

Removed: 




diff  --git a/clang/test/Driver/riscv32-toolchain.c 
b/clang/test/Driver/riscv32-toolchain.c
index 1b765dba6b9a..c5f82d309af5 100644
--- a/clang/test/Driver/riscv32-toolchain.c
+++ b/clang/test/Driver/riscv32-toolchain.c
@@ -3,9 +3,9 @@
 // RUN: %clang %s -### -no-canonical-prefixes -target riscv32 2>&1 | FileCheck 
-check-prefix=CC1 %s
 // CC1: clang{{.*}} "-cc1" "-triple" "riscv32"
 
-// Test interaction with -fuse-ld=lld
+// Test interaction with -fuse-ld=lld, if ld.lld is available.
 // RUN: %clang %s -### -no-canonical-prefixes -target riscv32 -fuse-ld=lld 
2>&1 | FileCheck -check-prefix=LLD %s
-// LLD: ld.lld
+// LLD: {{(error: invalid linker name in argument '-fuse-ld=lld')|(ld.lld)}}
 
 // In the below tests, --rtlib=platform is used so that the driver ignores
 // the configure-time CLANG_DEFAULT_RTLIB option when choosing the runtime lib



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[clang] a82d3e8 - Reland "[DebugInfo] Enable the debug entry values feature by default"

[Djordje Todorovic via cfe-commits]

Author: Djordje Todorovic
Date: 2020-02-18T14:41:08+01:00
New Revision: a82d3e8a6e67473c94a5ce6345372748e9b61718

URL: 
https://github.com/llvm/llvm-project/commit/a82d3e8a6e67473c94a5ce6345372748e9b61718
DIFF: 
https://github.com/llvm/llvm-project/commit/a82d3e8a6e67473c94a5ce6345372748e9b61718.diff

LOG: Reland "[DebugInfo] Enable the debug entry values feature by default"

This patch enables the debug entry values feature.

  - Remove the (CC1) experimental -femit-debug-entry-values option
  - Enable it for x86, arm and aarch64 targets
  - Resolve the test failures
  - Leave the llc experimental option for targets that do not
support the CallSiteInfo yet

Differential Revision: https://reviews.llvm.org/D73534

Added: 
llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll

Modified: 
clang/include/clang/Basic/CodeGenOptions.def
clang/include/clang/Driver/CC1Options.td
clang/lib/CodeGen/BackendUtil.cpp
clang/lib/CodeGen/CGDebugInfo.cpp
clang/lib/Frontend/CompilerInvocation.cpp
clang/test/CodeGen/debug-info-extern-call.c
clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp
lldb/packages/Python/lldbsuite/test/decorators.py

lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile
llvm/include/llvm/CodeGen/CommandFlags.inc
llvm/include/llvm/Target/TargetMachine.h
llvm/include/llvm/Target/TargetOptions.h
llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
llvm/lib/CodeGen/LiveDebugValues.cpp
llvm/lib/CodeGen/MIRParser/MIRParser.cpp
llvm/lib/CodeGen/MachineFunction.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/lib/CodeGen/TargetOptionsImpl.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/ARMTargetMachine.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/test/CodeGen/AArch64/arm64-anyregcc.ll
llvm/test/CodeGen/AArch64/arm64-patchpoint.ll
llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
llvm/test/CodeGen/ARM/smml.ll
llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir
llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir
llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir
llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir
llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir
llvm/test/CodeGen/X86/call-site-info-output.ll
llvm/test/CodeGen/X86/hoist-invariant-load.ll
llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll
llvm/test/CodeGen/X86/statepoint-allocas.ll
llvm/test/CodeGen/X86/tail-dup-repeat.ll
llvm/test/CodeGen/X86/xray-custom-log.ll
llvm/test/CodeGen/X86/xray-typed-event-log.ll
llvm/test/DebugInfo/AArch64/call-site-info-output.ll
llvm/test/DebugInfo/ARM/call-site-info-output.ll
llvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll
llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpret-movzxi.mir
llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir
llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir
llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir
llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir
llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir
llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir
llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir
llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir
llvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll
llvm/test/DebugInfo/X86/dbg-value-range.ll
llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll

[PATCH] D71433: [analyzer] CERT: POS34-C

[Kristóf Umann via Phabricator via cfe-commits]

Szelethus added a comment.
Herald added a subscriber: martong.

I think for an alpha checker this is ready to land if you're ready -- do you 
have commit access or need assistance?


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[PATCH] D74698: [CodeGen] -pg shouldn't unconditionally add "frame-pointer"="all" fn attr w/ -mfentry

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added a comment.

The title should be changed from CodeGen to Driver

And `fn attr` is no longer appropriate.


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[PATCH] D74698: [Driver] -pg -mfentry should respect target specific decisions for -mframe-pointer=all

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers marked an inline comment as done.
nickdesaulniers added inline comments.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:592
+  if (Args.hasArg(options::OPT_pg) && Args.hasArg(options::OPT_mfentry))
+return false;
 

This hunk does nothing and can be removed. I'll retitle the diff with a better 
explanation.


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[PATCH] D74698: [Driver] -pg -mfentry should respect target specific decisions for -mframe-pointer=all

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers updated this revision to Diff 245279.
nickdesaulniers added a comment.

- respect target specific frame pointer optimizations


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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/mfentry.c


Index: clang/test/Driver/mfentry.c
===
--- clang/test/Driver/mfentry.c
+++ clang/test/Driver/mfentry.c
@@ -1,9 +1,19 @@
 // RUN: %clang -target s390x -c -### %s -mfentry 2>&1 | FileCheck %s
 // RUN: %clang -target i386 -c -### %s -mfentry 2>&1 | FileCheck %s
 // RUN: %clang -target x86_64 -c -### %s -mfentry 2>&1 | FileCheck %s
+// RUN: %clang -target x86_64-linux-gnu -pg -mfentry -O0 -### -E %s 2>&1 | 
FileCheck -check-prefix=FP %s
+// RUN: %clang -target x86_64-linux-gnu -pg -mfentry -O2 
-fno-omit-frame-pointer -### -E %s 2>&1 | FileCheck -check-prefix=FP %s
+// RUN: %clang -target x86_64-linux-gnu -pg -mfentry -O2 -### -E %s 2>&1 | 
FileCheck -check-prefix=NOFP %s
+// RUN: %clang -target x86_64 -pg -mfentry -O0 -### -E %s 2>&1 | FileCheck 
-check-prefix=FP %s
+// RUN: %clang -target x86_64 -pg -mfentry -O2 -fno-omit-frame-pointer -### -E 
%s 2>&1 | FileCheck -check-prefix=FP %s
+// RUN: %clang -target x86_64 -pg -mfentry -O2 -### -E %s 2>&1 | FileCheck 
-check-prefix=FP %s
 
 // CHECK: "-mfentry"
 
 // RUN: %clang -target powerpc64le -c -### %s -mfentry 2>&1 | FileCheck 
--check-prefix=ERR %s
 
 // ERR: error: unsupported option '-mfentry' for target 'powerpc64le'
+
+// FP: "-mframe-pointer=all"
+// NOFP: "-mframe-pointer=none"
+void foo(void) {}
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -526,7 +526,7 @@
 
 static bool useFramePointerForTargetByDefault(const ArgList ,
   const llvm::Triple ) {
-  if (Args.hasArg(options::OPT_pg))
+  if (Args.hasArg(options::OPT_pg) && !Args.hasArg(options::OPT_mfentry))
 return true;
 
   switch (Triple.getArch()) {
@@ -6150,7 +6150,8 @@
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_pg))
-if (FPKeepKind == CodeGenOptions::FramePointerKind::None)
+if (FPKeepKind == CodeGenOptions::FramePointerKind::None &&
+!Args.hasArg(options::OPT_mfentry))
   D.Diag(diag::err_drv_argument_not_allowed_with) << "-fomit-frame-pointer"
   << A->getAsString(Args);
 


Index: clang/test/Driver/mfentry.c
===
--- clang/test/Driver/mfentry.c
+++ clang/test/Driver/mfentry.c
@@ -1,9 +1,19 @@
 // RUN: %clang -target s390x -c -### %s -mfentry 2>&1 | FileCheck %s
 // RUN: %clang -target i386 -c -### %s -mfentry 2>&1 | FileCheck %s
 // RUN: %clang -target x86_64 -c -### %s -mfentry 2>&1 | FileCheck %s
+// RUN: %clang -target x86_64-linux-gnu -pg -mfentry -O0 -### -E %s 2>&1 | FileCheck -check-prefix=FP %s
+// RUN: %clang -target x86_64-linux-gnu -pg -mfentry -O2 -fno-omit-frame-pointer -### -E %s 2>&1 | FileCheck -check-prefix=FP %s
+// RUN: %clang -target x86_64-linux-gnu -pg -mfentry -O2 -### -E %s 2>&1 | FileCheck -check-prefix=NOFP %s
+// RUN: %clang -target x86_64 -pg -mfentry -O0 -### -E %s 2>&1 | FileCheck -check-prefix=FP %s
+// RUN: %clang -target x86_64 -pg -mfentry -O2 -fno-omit-frame-pointer -### -E %s 2>&1 | FileCheck -check-prefix=FP %s
+// RUN: %clang -target x86_64 -pg -mfentry -O2 -### -E %s 2>&1 | FileCheck -check-prefix=FP %s
 
 // CHECK: "-mfentry"
 
 // RUN: %clang -target powerpc64le -c -### %s -mfentry 2>&1 | FileCheck --check-prefix=ERR %s
 
 // ERR: error: unsupported option '-mfentry' for target 'powerpc64le'
+
+// FP: "-mframe-pointer=all"
+// NOFP: "-mframe-pointer=none"
+void foo(void) {}
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -526,7 +526,7 @@
 
 static bool useFramePointerForTargetByDefault(const ArgList ,
   const llvm::Triple ) {
-  if (Args.hasArg(options::OPT_pg))
+  if (Args.hasArg(options::OPT_pg) && !Args.hasArg(options::OPT_mfentry))
 return true;
 
   switch (Triple.getArch()) {
@@ -6150,7 +6150,8 @@
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_pg))
-if (FPKeepKind == CodeGenOptions::FramePointerKind::None)
+if (FPKeepKind == CodeGenOptions::FramePointerKind::None &&
+!Args.hasArg(options::OPT_mfentry))
   D.Diag(diag::err_drv_argument_not_allowed_with) << "-fomit-frame-pointer"
   << A->getAsString(Args);
 
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[PATCH] D74698: [Driver] -pg -mfentry should respect target specific decisions for -mframe-pointer=all

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers added a comment.

Ok, sorry for the excessive churn. I think this now accurately describes the 
logic of how this was expected to work, from the stance of GCC compatibility.


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[PATCH] D74795: Make diagnostic reporting more robust in presence of corrupt PCH data.

[Duncan P. N. Exon Smith via Phabricator via cfe-commits]

dexonsmith added a comment.

Thanks for working on this!  I have a couple of comments inline.




Comment at: clang/include/clang/Basic/Diagnostic.h:918-927
   /// The ID of the current diagnostic that is in flight.
   ///
   /// This is set to std::numeric_limits::max() when there is no
   /// diagnostic in flight.
   unsigned CurDiagID;
 
+  /// The ID of the current delayed diagnostic being reported.

`CurDelayedDiagID` has a different kind of "in-flight" lifetime than 
`CurDiagID`.  I think the comment here should be more explicit about what 
precisely the variable is doing, and perhaps it should have another name.  Do 
we actually need the ID kept as state?  If not, this would be simpler as:
```
bool IsReportingDelayedDiag = false;
```

Also, a couple of nit-picks:
- Periods at the end of sentences in comments.
- You seem to have dropped out of doxygen comments (`//` instead of `///`).



Comment at: clang/lib/Basic/Diagnostic.cpp:160-161
 void DiagnosticsEngine::ReportDelayed() {
-  unsigned ID = DelayedDiagID;
+  CurDelayedDiagID = DelayedDiagID;
   DelayedDiagID = 0;
+  Report(CurDelayedDiagID) << DelayedDiagArg1 << DelayedDiagArg2

If you take my suggestion, then you wouldn't need to change this line, just add:
```
IsReportingDelayedDiag = true;
```
but would these assertions be valid after your change?
```
assert(DelayedDiagID && "Called without a delayed diagnostic?");
assert(!IsReportingDelayedDiag &&
   "Called while reporting another delayed diagnostic?");
```


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