[PATCH] D155495: [RISCV][AArch64][IRGen] Add a special case to CodeGenFunction::EmitCall for scalable vector return being coerced to fixed vector.

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. Thanks Craig this is a better solution, LLVM cleans up the store/load coercion nicely but better not to create them in the first place if possible. LGTM cheers Comment a

[PATCH] D155222: [RISCV][AArch64][IRGen] Add scalable->fixed as a special case in CreateCoercedStore.

c-rhodes added a comment. It's been a while since I've looked at this code, what about this wouldnt work for predicates? I seem to recall fixed predicates using i8 vs i1 for scalable, is that issue? Happy with this regardless, just curious. Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D155222: [RISCV][AArch64][IRGen] Add scalable->fixed as a special case in CreateCoercedStore.

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM cheers Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155222/new/ https://reviews.llvm.org/D155222

[PATCH] D155220: [IRGen] Remove 'Sve' from the name of some IR names that are shared with RISC-V now.

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM cheers Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155220/new/ https://reviews.llvm.org/D155220

[PATCH] D144613: [RISCV] Properly diagnose mixing RVV scalable vectors with GNU vectors.

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. One minor nit but otherwise LGTM Comment at: clang/lib/Sema/SemaExpr.cpp:10769-10770 // Expressions containing GNU and SVE (fixed or sizeless) vectors are invalid

[PATCH] D130984: [clang][AArch64][SVE] Add unary +/- operators for SVE types

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM, just one minor comment Comment at: clang/test/CodeGen/aarch64-sve-vector-arith-ops.c:1654 + +// UNARY PROMOTION + should we add FP tests as well?

[PATCH] D129476: [AArch64][SVE] Prefer SIMD&FP variant of clast[ab]

c-rhodes closed this revision. c-rhodes marked an inline comment as done. c-rhodes added a comment. In D129476#3645667 , @efriedma wrote: > Please update the comment, then LGTM Done, cheers Eli. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129

[PATCH] D129476: [AArch64][SVE] Prefer SIMD&FP variant of clast[ab]

c-rhodes added a comment. In D129476#3643382 , @efriedma wrote: > Are you saying that it's faster to use clasta targeting a float register, > then move the result to an integer register, rather than use the integer form > directly? Or is the issue just

[PATCH] D129476: [AArch64][SVE] Prefer SIMD&FP variant of clast[ab]

c-rhodes updated this revision to Diff 443594. c-rhodes added a comment. Add full patch context. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129476/new/ https://reviews.llvm.org/D129476 Files: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c clang/test/CodeGen/aarch64-

[PATCH] D129476: [AArch64][SVE] Prefer SIMD&FP variant of clast[ab]

c-rhodes created this revision. c-rhodes added reviewers: paulwalker-arm, bsmith, peterwaller-arm, DavidTruby. Herald added subscribers: psnobl, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: efriedma. Herald added a project: All. c-rhodes requested review of this revision. Herald add

[PATCH] D126380: [clang][AArch64][SVE] Implicit conversions for vector-scalar operations

c-rhodes accepted this revision. c-rhodes added inline comments. This revision is now accepted and ready to land. Comment at: clang/lib/Sema/SemaChecking.cpp:13591-13595 +if (!Target->isVLSTBuiltinType() && !isa(OriginalTarget)) { + if (S.SourceMgr.isInSystemMacro(CC)) +

[PATCH] D126380: [clang][AArch64][SVE] Implicit conversions for vector-scalar operations

c-rhodes added a comment. @DavidTruby thanks for updating, just one last comment otherwise LGTM Comment at: clang/lib/Sema/SemaChecking.cpp:13591-13595 +if (!Target->isVLSTBuiltinType() && !isa(OriginalTarget)) { + if (S.SourceMgr.isInSystemMacro(CC)) +return;

[PATCH] D126377: [clang][AArch64][SVE] Improve diagnostics for SVE operators

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126377/new/ https://reviews.llvm.org/D126377 ___

[PATCH] D126377: [clang][AArch64][SVE] Improve diagnostics for SVE operators

c-rhodes added inline comments. Comment at: clang/test/Sema/aarch64-sve-vector-arith-ops.c:23 - (void)(i8 + f64); // expected-error{{invalid operands to binary expression}} - (void)(i8 + 0); // expected-error{{invalid operands to binary expression}} - (void)(i8 + 0l); // ex

[PATCH] D126380: [clang][AArch64][SVE] Implicit conversions for vector-scalar operations

c-rhodes added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:13534-13556 // Strip vector types. if (isa(Source)) { if (Target->isVLSTBuiltinType() && (S.Context.areCompatibleSveTypes(QualType(Target, 0),

[PATCH] D126377: [clang][AArch64][SVE] Improve diagnostics for SVE operators

c-rhodes added inline comments. Comment at: clang/lib/Sema/SemaExpr.cpp:10609-10614 - if (RHSType->isVLSTBuiltinType() && !LHSType->isVLSTBuiltinType()) { -auto DestType = tryScalableVectorConvert((IsCompAssign ? nullptr : &LHS), -

[PATCH] D124860: [clang][AArch64][SVE] Implicit conversions for vector-scalar operations

c-rhodes added a comment. can the diagnostics improvements be broke out into separate patches? I think it would make this easier to review Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124860/new/ https://reviews.llvm.org/D124860

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG698584f89b8f: [IR] Remove unbounded as possible value for vscale_range minimum (authored by c-rhodes). Changed prior to commit: https://reviews.ll

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes added inline comments. Comment at: clang/lib/Basic/Targets/AArch64.cpp:482 +return std::pair( +LangOpts.VScaleMin ? LangOpts.VScaleMin : 1, 16); + paulwalker-arm wrote: > This part is no longer needed because to get here you already know > `

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes updated this revision to Diff 392002. c-rhodes added a comment. Revert `LangOpt.VScaleMin` default to 0. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D113294/new/ https://reviews.llvm.org/D113294 Files: clang/include/clang/Basic/DiagnosticDriverKinds.td clang/include/clang

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes added inline comments. Comment at: clang/lib/Basic/Targets/AArch64.cpp:476-484 + assert(LangOpts.VScaleMin && "vscale min must be greater than 0!"); + + if (LangOpts.VScaleMax) return std::pair(LangOpts.VScaleMin, LangOpts

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes marked an inline comment as done. c-rhodes added a comment. In D113294#3170007 , @paulwalker-arm wrote: > I agree, it's the change to VScaleMin that has caused the issue. If the > LangOpts default can remain as 0 and you can still achieve what

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes updated this revision to Diff 391668. c-rhodes added a comment. Revert to previous behaviour where both the min/max Clang flags override SVE. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D113294/new/ https://reviews.llvm.org/D113294 Files: clang/include/clang/Basic/Diagnosti

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes added inline comments. Comment at: clang/lib/Basic/Targets/AArch64.cpp:476-484 + assert(LangOpts.VScaleMin && "vscale min must be greater than 0!"); + + if (LangOpts.VScaleMax) return std::pair(LangOpts.VScaleMin, LangOpts

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes marked 4 inline comments as done. c-rhodes added a comment. In D113294#3115354 , @sdesmalen wrote: > It would be nice if the LLVM interfaces could be updated as well (could also > be done in a follow-up patch) Thanks for reviewing, I'll create

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes updated this revision to Diff 385732. c-rhodes added a comment. Address comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D113294/new/ https://reviews.llvm.org/D113294 Files: clang/include/clang/Basic/DiagnosticDriverKinds.td clang/include/clang/Basic/LangOptions.def

[PATCH] D113294: [IR] Remove unbounded as possible value for vscale_range minimum

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, bsmith, paulwalker-arm. Herald added subscribers: ctetreau, dexonsmith, dang, jdoerfert, hiraditya. c-rhodes requested review of this revision. Herald added projects: clang, LLVM. Herald added a subscriber: cfe-commits. The defau

[PATCH] D109489: [OptParser] NFC: Remove unused template arg 'name' from bool opt

This revision was automatically updated to reflect the committed changes. Closed by commit rG6c8ff4032e2b: [OptParser] NFC: Remove unused template arg 'name' from bool opt (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109489/n

[PATCH] D109489: [OptParser] NFC: Remove unused template arg 'name' from bool opt

c-rhodes added a comment. In D109489#2991261 , @jansvoboda11 wrote: > LGTM. > > To give more background, I think my intention was to add an assertion that > `name` and `other_name` are the same (except for the `no_` part) and I was > waiting for TableG

[PATCH] D109489: [OptParser] NFC: Remove unused template arg 'name' from bool opt

c-rhodes added a comment. @jansvoboda11 this came up in D109359 with warning: llvm/include/llvm/Option/OptParser.td:217:91: warning: unused template argument: MarshallingInfoBooleanFlag:name I see you've changed worked on this in the past, wasn't sure if it

[PATCH] D109489: [OptParser] NFC: Remove unused template arg 'name' from bool opt

c-rhodes created this revision. c-rhodes added a reviewer: jansvoboda11. Herald added a subscriber: dang. c-rhodes requested review of this revision. Herald added projects: clang, LLVM. Herald added a subscriber: cfe-commits. Identified in D109359 . Repository:

[PATCH] D109137: [clang] NFC: Remove duplicate DependentSizedMatrixType methods

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG9722e8ff9eab: [clang] NFC: Remove duplicate DependentSizedMatrixType methods (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D109137: [clang] NFC: Remove duplicate DependentSizedMatrixType methods

c-rhodes created this revision. c-rhodes added a reviewer: fhahn. c-rhodes requested review of this revision. Herald added a project: clang. Inherited from MatrixType. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D109137 Files: clang/include/clang/AST/Type.h Index: clang/

[PATCH] D107719: [Clang][AST][NFC] Resolve FIXME: Remove unused QualType ElementType member from the ASTContext class.

c-rhodes added a comment. In D107719#2945656 , @gAlfonso-bit wrote: > Not sure about the timing of base patch, but maybe this patch is also > candidate for llvm 13 (backport)? What's the value in backporting it to 13? It's NFC CHANGES SINCE LAST ACTI

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. thanks @bsmith, just left one minor nit but otherwise LGTM Comment at: clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c:10 typedef svint32_t fixed_int32_t __attribute_

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:2110-2129 // Perform VLAT <-> VLST bitcast through memory. // TODO: since the llvm.experimental.vector.{insert,extract} intrinsics // require the element types of the vectors to be

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:2065 if (const auto *FixedSrc = dyn_cast(SrcTy)) { if (const auto *ScalableDst = dyn_cast(DstTy)) { +// If we are casting a fixed i8 vector to a scalable 16 x i1 predicate

[PATCH] D106333: [AArch64][SVE] Handle svbool_t VLST <-> VLAT/GNUT conversion

c-rhodes added inline comments. Comment at: clang/lib/AST/ASTContext.cpp:8673 +/// getSVETypeSize - Return SVE vector or perdicate register size. +static uint64_t getSVETypeSize(ASTContext &Context, const BuiltinType *Ty) { s/perdicate/predicate =

[PATCH] D100297: [AArch64][SVE] Always use overloaded methods instead of preprocessor macro.

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100297/new/ https://reviews.llvm.org/D100297 ___

[PATCH] D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM thanks Comment at: clang/lib/Sema/SemaChecking.cpp:12054 // Strip vector types. - if (isa(Source)) { + if (auto *SourceVT = dyn_cast(Source)) { +if (Target-

[PATCH] D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion

c-rhodes added a comment. In D97053#2575791 , @craig.topper wrote: > Is this change specific to fixed vectors declared with arm_sve_vector_bits or > any of the subclasses of VectorType? If it allows the others, how do we know > for sure that there are e

[PATCH] D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion

c-rhodes added inline comments. Comment at: clang/test/Sema/aarch64-fixed-vector-to-scalable-implicit-conversion.c:1-32 +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \ +// RUN: -msve-vector-bits=512 -Wconversion -fallow-half-arguments-and-returns \ +//

[PATCH] D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion

c-rhodes added inline comments. Comment at: clang/test/Sema/aarch64-fixed-vector-to-scalable-implicit-conversion.c:1-32 +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \ +// RUN: -msve-vector-bits=512 -Wconversion -fallow-half-arguments-and-returns \ +//

[PATCH] D94290: [clang][AArch64][SVE] Avoid going through memory for coerced VLST return values

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. I've left one minor nit but looks otherwise looks fine to me Comment at: clang/lib/CodeGen/CGCall.cpp:1273 +if (auto *FixedSrc = +dyn_cast(Src.getElementT

[PATCH] D92762: [clang][AArch64][SVE] Avoid going through memory for coerced VLST arguments

c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:2674 + // perform the conversion. + if (Ty->getAs()) { +auto *Coerced = Fn->getArg(FirstIRArg); joechrisellis wrote: > c-rhodes wrote: > > Do we want to check `VT->getVecto

[PATCH] D92762: [clang][AArch64][SVE] Avoid going through memory for coerced VLST arguments

c-rhodes accepted this revision. c-rhodes added inline comments. This revision is now accepted and ready to land. Comment at: clang/lib/CodeGen/CGCall.cpp:2706 + ArgVals.push_back(ParamValue::forDirect(Builder.CreateExtractVector( +VecTyTo, Coerced, Ze

[PATCH] D92762: [clang][AArch64][SVE] Avoid going through memory for coerced VLST arguments

c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:2671-2673 + // See if this is a VLST coerced to a VLAT at the function boundary and + // the types match up. If so, use llvm.experimental.vector.extract to + // perform the conversion. ---

[PATCH] D92761: [clang][AArch64][SVE] Avoid going through memory for VLAT <-> VLST casts

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. Left a couple of nits but mostly LGTM, cheers Comment at: clang/lib/CodeGen/CGExprScalar.cpp:2025-2051 // Perform VLAT <-> VLST bitcast through memory. if ((isa

[PATCH] D91696: [AArch64][SVE] Allow lax conversion between VLATs and GNU vectors

c-rhodes accepted this revision. c-rhodes added a comment. In D91696#2405082 , @joechrisellis wrote: > Address @c-rhodes's comments regarding lax conversion when > __ARM_FEATURE_SVE_BITS != N for GNU vectors. Cheers, LGTM Repository: rG LLVM Github

[PATCH] D91696: [AArch64][SVE] Allow lax conversion between VLATs and GNU vectors

c-rhodes added inline comments. Comment at: clang/test/Sema/attr-arm-sve-vector-bits.c:278-283 -// Test implicit conversion between SVE and GNU vector is invalid when -// __ARM_FEATURE_SVE_BITS != N -#if defined(__ARM_FEATURE_SVE_BITS) && __ARM_FEATURE_SVE_BITS == 512 -typedef in

[PATCH] D91262: [AArch64][SVE] Allow C-style casts between fixed-size and scalable vectors

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM I've left one minor comment, if that suggestion works it should be fine to fix it before committing Comment at: clang/lib/Sema/SemaExpr.cpp:7210-7212 +const au

[PATCH] D91262: [AArch64][SVE] Allow C-style casts between fixed-size and scalable vectors

c-rhodes added inline comments. Comment at: clang/lib/Sema/SemaCast.cpp:2217-2218 - // Allow reinterpret_casts between vectors of the same size and - // between vectors and integers of the same size. bool destIsVector = DestType->isVectorType(); joechrisel

[PATCH] D91262: [AArch64][SVE] Allow C-style casts between fixed-size and scalable vectors

c-rhodes added inline comments. Comment at: clang/lib/Sema/SemaCast.cpp:2217-2218 - // Allow reinterpret_casts between vectors of the same size and - // between vectors and integers of the same size. bool destIsVector = DestType->isVectorType(); nit: not s

[PATCH] D91262: [AArch64][SVE] Allow C-style casts between fixed-size and scalable vectors

c-rhodes added a comment. @joechrisellis thanks for the patch Joe, I've added a few comments. I also noticed this only covers C++, do we want to test C as well? Comment at: clang/lib/Sema/SemaCast.cpp:-2227 +// Allow bitcasting if either the source or destination is a

[PATCH] D89031: [SVE] Add support to vectorize_width loop pragma for scalable vectors

c-rhodes added inline comments. Comment at: clang/docs/LanguageExtensions.rst:3032 +The vector width is specified by +``vectorize_width(_value_[, fixed|scalable])``, where __value__ is a positive +integer and the type of vectorization can be specified with an optional ---

[PATCH] D88233: [clang][aarch64] Address various fixed-length SVE vector operations

This revision was automatically updated to reflect the committed changes. c-rhodes marked an inline comment as done. Closed by commit rG58d3f0ea4972: [clang][aarch64] Address various fixed-length SVE vector operations (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LA

[PATCH] D88233: [clang][aarch64] Address various fixed-length SVE vector operations

c-rhodes marked 2 inline comments as done. c-rhodes added a comment. In D88233#2359022 , @fpetrogalli wrote: > Hi @c-rhodes, Peter asked me to take a look at this. LGTM, I only have minor > stuff. > > In the commit message: > >> Arm C Language Extensions

[PATCH] D88233: [clang][aarch64] Address various fixed-length SVE vector operations

c-rhodes updated this revision to Diff 301603. c-rhodes edited the summary of this revision. c-rhodes added a comment. Address comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D88233/new/ https://reviews.llvm.org/D88233 Files: clang/include/clang/Basic/DiagnosticSemaKinds.td c

[PATCH] D88233: [clang][aarch64] Address various fixed-length SVE vector operations

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, efriedma, rsandifo-arm. Herald added subscribers: kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. c-rhodes requested review of this revision. This patch adds tests and support for operat

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

This revision was automatically updated to reflect the committed changes. Closed by commit rG9218f9283802: [clang][aarch64] ACLE: Support implicit casts between GNU and SVE vectors (authored by c-rhodes). Changed prior to commit: https://reviews.llvm.org/D87607?vs=292162&id=292441#toc Reposito

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

c-rhodes added inline comments. Comment at: clang/test/Sema/attr-arm-sve-vector-bits.c:237 +// Test implicit conversion between SVE and GNU vector is invalid when +// __ARM_FEATURE_SVE_BITS != N +#if defined(__ARM_FEATURE_SVE_BITS) && __ARM_FEATURE_SVE_BITS == 512 ---

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

c-rhodes updated this revision to Diff 292162. c-rhodes added a comment. Address comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87607/new/ https://reviews.llvm.org/D87607 Files: clang/lib/AST/ASTContext.cpp clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c clang/test/Sem

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

c-rhodes added inline comments. Comment at: clang/lib/AST/ASTContext.cpp:8522 + return VT->getElementType().getCanonicalType() == + getBuiltinVectorTypeInfo(BT).ElementType; } efriedma wrote: > c-rhodes wrote: > > efriedma wrote: >

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

c-rhodes added inline comments. Comment at: clang/test/Sema/attr-arm-sve-vector-bits.c:233-234 +svint64_t to_svint64_t__from_gnu_int32_t(gnu_int32_t x) { return x; } // expected-error-re {{returning 'gnu_int32_t' (vector of {{[0-9]+}} 'int32_t' values) from a function with in

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

c-rhodes added inline comments. Comment at: clang/test/Sema/attr-arm-sve-vector-bits.c:233-234 +svint64_t to_svint64_t__from_gnu_int32_t(gnu_int32_t x) { return x; } // expected-error-re {{returning 'gnu_int32_t' (vector of {{[0-9]+}} 'int32_t' values) from a function with in

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

c-rhodes updated this revision to Diff 291891. c-rhodes edited the summary of this revision. c-rhodes added a comment. Added tests for implicit casts between GNU and fixed-length SVE vectors. I was planning to create a separate patch for this but since it's only tests and no functional changes I

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

c-rhodes added inline comments. Comment at: clang/lib/AST/ASTContext.cpp:8522 + return VT->getElementType().getCanonicalType() == + getBuiltinVectorTypeInfo(BT).ElementType; } efriedma wrote: > We allow casting SVE fixed-width vect

[PATCH] D87607: [clang][aarch64] Support implicit casts between GNU and SVE vectors

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, efriedma, rsandifo-arm. Herald added subscribers: kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. c-rhodes requested review of this revision. This patch adds support for implicit casting

[PATCH] D87463: [clang][aarch64] Fix mangling of bfloat16 neon vectors

c-rhodes added a comment. In D87463#2267613 , @stuij wrote: > I'm not sure what the procedure is to get patches into LLVM 11, but I think > there's still time. Could you try to get this in there as well @c-rhodes ? Cherry-picked into LLVM 11, see: https:

[PATCH] D87358: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits

c-rhodes added inline comments. Comment at: clang/lib/AST/Type.cpp:2324 // scalable and fixed-length vectors. -return Ctx.UnsignedCharTy; - case BuiltinType::SveInt16: -return Ctx.ShortTy; - case BuiltinType::SveUint16: -return Ctx.UnsignedShortTy; - case Buil

[PATCH] D87463: [clang][aarch64] Fix mangling of bfloat16 neon vectors

This revision was automatically updated to reflect the committed changes. Closed by commit rGcabd60c26b5d: [clang][aarch64] Fix mangling of bfloat16 neon vectors (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87463/new/ https:

[PATCH] D87358: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits

This revision was automatically updated to reflect the committed changes. Closed by commit rG002f5ab3b171: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits (authored by c-rhodes). Changed prior to commit: https://reviews.llvm.org/D87358?vs=290974&id=291168#toc Repository: rG LLVM Githu

[PATCH] D87463: [clang][aarch64] Fix mangling of bfloat16 neon vectors

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, SjoerdMeijer, stuij. Herald added subscribers: danielkiss, kristof.beyls. Herald added a project: clang. c-rhodes requested review of this revision. The AAPCS64 specifies the internal type is used for c++ mangling. For bfloat16 i

[PATCH] D87358: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits

c-rhodes added inline comments. Comment at: clang/lib/AST/Type.cpp:2339 case BuiltinType::SveInt32: -return Ctx.IntTy; +return IsILP32 ? Ctx.LongTy : Ctx.IntTy; case BuiltinType::SveUint32: efriedma wrote: > sdesmalen wrote: > > Rather than comparin

[PATCH] D87358: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits

c-rhodes updated this revision to Diff 290974. c-rhodes edited the summary of this revision. c-rhodes added a comment. - Get the element type of scalable vectors from `getBuiltinVectorTypeInfo` when creating VLS types. This fixes the ABI issue since it calls `ASTContext::getIntTypeForBitwidth` w

[PATCH] D87358: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits

c-rhodes created this revision. c-rhodes added reviewers: efriedma, sdesmalen, rsandifo-arm. Herald added subscribers: kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. c-rhodes requested review of this revision. The element types of scalable vectors are de

[PATCH] D86720: [clang][aarch64] Drop experimental from __ARM_FEATURE_SVE_BITS macro

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGf9091e56d34f: [clang][aarch64] Drop experimental from __ARM_FEATURE_SVE_BITS macro (authored by c-rhodes). Changed prior to commit: https://revie

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes abandoned this revision. c-rhodes added a comment. Closing this now the prototype has been split into separate patches that have landed. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85128/new/ https://reviews.llvm.org/D85128 ___

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85743#2244839 , @leonardchan wrote: >> The IR differences were caused by the new pass manager which is on by >> default for the Fuchsia builder. I've re-landed the patch with a fix for >> `CodeGen/attr-arm-sve-vector-bits-ca

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85743#2243188 , @c-rhodes wrote: > In D85743#2242931 , @leonardchan > wrote: > >> Hi! The `attr-arm-sve-vector-bits-call.c` test seems to be failing on our >> clang builders: >> >> Co

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85743#2242931 , @leonardchan wrote: > Hi! The `attr-arm-sve-vector-bits-call.c` test seems to be failing on our > clang builders: > > Could you take a look? Thanks. > > Builder: > https://luci-milo.appspot.com/p/fuchsia/buil

[PATCH] D86720: [clang][aarch64] Drop experimental from __ARM_FEATURE_SVE_BITS macro

c-rhodes created this revision. c-rhodes added reviewers: sdesmalen, david-arm, efriedma. Herald added subscribers: danielkiss, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a reviewer: aaron.ballman. Herald added a project: clang. c-rhodes requested review of this revisi

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85743#2219215 , @efriedma wrote: > LGTM > > Like I mentioned on the review for the prototype, I still think we should try > to implement a scheme that makes CK_BItCast between fixed and scalable types > trivial. Doing coerc

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

This revision was automatically updated to reflect the committed changes. Closed by commit rGfeed5a7239d8: [Sema][AArch64] Support arm_sve_vector_bits attribute (authored by c-rhodes). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85736/new/ https:/

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes marked 7 inline comments as done. c-rhodes added a comment. @rsandifo-arm @aaron.ballman thanks for reviewing! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85736/new/ https://reviews.llvm.org/D85736 ___ cfe-commits mailing list cfe-

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 288250. c-rhodes added a comment. Address comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85736/new/ https://reviews.llvm.org/D85736 Files: clang/include/clang/AST/ASTContext.h clang/include/clang/AST/Type.h clang/include/clang/Basic/

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85736/new/ https://reviews.llvm.org/D85736 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D86100: [Clang][SVE] NFC: Move info about ACLE types into separate function.

c-rhodes accepted this revision. c-rhodes added a comment. This revision is now accepted and ready to land. LGTM, just one minor nit but seems like a nice improvement Comment at: clang/include/clang/AST/ASTContext.h:1318 + BuiltinVectorTypeInfo + getElementTypeForBuiltinVecto

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes marked 2 inline comments as done. c-rhodes added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:3330 +// appendices to the Procedure Call Standard for the Arm Architecture, see: +// https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#app

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes marked 4 inline comments as done. c-rhodes added inline comments. Comment at: clang/lib/AST/ASTContext.cpp:1941 +// Adjust the alignment for fixed-length SVE predicates. +if (VT->getVectorKind() == VectorType::SveFixedLengthPredicateVector) + Align = 16; ---

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 285285. c-rhodes marked an inline comment as not done. c-rhodes added a comment. Address @rsandifo-arm comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85736/new/ https://reviews.llvm.org/D85736 Files: clang/include/clang/AST/ASTContext.h

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes updated this revision to Diff 285124. c-rhodes added a comment. Added missing implicit conversions for C++. I considered handling this with the existing implicit vector conversion although one side of the conversion will be an SVE builtin, so instead I've added a new conversion specifical

[PATCH] D85736: [Sema][AArch64] Support arm_sve_vector_bits attribute

c-rhodes created this revision. c-rhodes added reviewers: efriedma, sdesmalen, rsandifo-arm, aaron.ballman, paulwalker-arm. Herald added subscribers: danielkiss, kristof.beyls, tschuett. Herald added a reviewer: rengolin. Herald added a project: clang. c-rhodes requested review of this revision.

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85128#2193309 , @tschuett wrote: > Sorry. I meant ABI. Can link GCC .o files with Clang .o files using the > attributes? Yes they should be compatible. The machine-level ABI distinguishes 4 types of SVE vector [1]: - VG×64

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85128#2192867 , @c-rhodes wrote: > In D85128#2191108 , @tschuett wrote: > >> - Is it compatible with GCC? > > Support for this attribute landed in GCC 10 and it's more complete than wha

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85128#2191401 , @efriedma wrote: > Not going to write detailed review comments, but this looks like the right > approach in general. Thanks for taking a look! I'll split this up into separate patches soon. > One high-level

[PATCH] D85128: [Prototype][SVE] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85128#2191108 , @tschuett wrote: > Stupid questions. > > - Is it for convenience? You get arrays, global variables, structs, ... . > Vectorization becomes easier ... Yes, this allows the definition of types that can be used

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes abandoned this revision. c-rhodes added a comment. I've posted a prototype D85128 with an alternative implementation, given it's quite different to this patch I've posted it as a separate patch and am abandoning this one. See new patch for more details

[PATCH] D82582: [SVE] Remove calls to VectorType::getNumElements from clang

c-rhodes added a comment. there's a few places the `getNumElements` calls can be fixed by getting the initial cast right Comment at: clang/lib/CodeGen/CGBuiltin.cpp:5986 case NEON::BI__builtin_neon_vqrdmulh_lane_v: { auto *RTy = cast(Ty); if (BuiltinID == NEON::BI

[PATCH] D83553: [PATCH 3/4][Sema][AArch64] Add codegen for arm_sve_vector_bits attribute

c-rhodes marked an inline comment as done. c-rhodes added inline comments. Comment at: clang/lib/CodeGen/CGExpr.cpp:152 + Align, Name, + /*ArraySize=*/nullptr, Alloca); efriedma wrote: > Do we need to bitcast the result of CreateTempAlloca to a pointe

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