[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

RKSimon closed this revision. RKSimon added a comment. https://reviews.llvm.org/rL305551 https://reviews.llvm.org/D33406 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

spatel accepted this revision. spatel added a comment. This revision is now accepted and ready to land. LGTM. https://reviews.llvm.org/D33406 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

dtemirbulatov updated this revision to Diff 102717. dtemirbulatov added a comment. Update formatting, comments https://reviews.llvm.org/D33406 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-builtins.c Index: test/CodeGen/avx-builtins.c ===

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

spatel added a comment. Functionally, I think this is correct and complete now. See inline for some nits. Comment at: lib/CodeGen/CGBuiltin.cpp:7925 // We can't handle 8-31 immediates with native IR, use the intrinsic. Intrinsic::ID ID; Fix comment

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

dtemirbulatov updated this revision to Diff 102673. dtemirbulatov added a reviewer: hfinkel. dtemirbulatov added a comment. Update after http://lists.llvm.org/pipermail/llvm-dev/2017-June/114120.html. Added 0x1b(_CMP_FALSE_OS), 0x1f(_CMP_TRUE_US) handling. https://reviews.llvm.org/D33406 Files

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

dtemirbulatov added a comment. Ping. [andrew.w.kaylor, scanon] Is it OK to assume that FP exceptions are off by default and allow such transformation to constants in the IR since we know that we would have exception with "1.00 -nan" for _mm256_cmp_ps(a, b, 15)? https://reviews.llvm.org/D3340

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

dtemirbulatov added a comment. > We should've asked this first: is that fold allowed in the default FPENV > state that we assume that clang is operating in? I suppose it is FE_ALL_EXCEPT. https://reviews.llvm.org/D33406 ___ cfe-commits mailing lis

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

spatel added subscribers: scanon, andrew.w.kaylor. spatel added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:7932 break; case X86::BI__builtin_ia32_cmppd256: ID = Intrinsic::x86_avx_cmp_pd_256; dtemirbulatov wrote: > spatel wrote: > >

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

dtemirbulatov added a comment. > Should we handle the 'pd256' version the same way? > How about the 0xb ('false') constant? It should produce a zero here? > Can or should we deal with the signalling versions (0x1b, 0x1f) too? hm looks like 0xb(_CMP_FALSE_OQ) is ordered, so it is not possible and

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

dtemirbulatov updated this revision to Diff 100089. dtemirbulatov added a comment. add _mm256_cmp_pd double version add comments in lib/CodeGen/CGBuiltin.cpp replaced 0xf to _CMP_TRUE_UQ in avx-builtins.c https://reviews.llvm.org/D33406 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-buil

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

spatel added inline comments. Comment at: lib/CodeGen/CGBuiltin.cpp:7932 break; case X86::BI__builtin_ia32_cmppd256: ID = Intrinsic::x86_avx_cmp_pd_256; 1. Should we handle the 'pd256' version the same way? 2. How about the 0xb ('false') consta

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

RKSimon added a comment. Test _mm256_cmp_pd as well? Comment at: lib/CodeGen/CGBuiltin.cpp:7922 case X86::BI__builtin_ia32_cmpps256: + if (CC == 0xf) { + Value *Vec = Builder.CreateVectorSplat(Ops[0]->getType()->getVectorNumElements(), You ne