On 25.01.2008 02:11, Peter Stuge wrote:
> On Thu, Jan 24, 2008 at 04:57:35PM +0100, Carl-Daniel Hailfinger wrote:
>
>>> Then I wrote rand.bin which is 2MB of /dev/random. This
>>> consistently reads back as something quite different
>>>
>> This looks like the chip was not erased between w
Author: hailfinger
Date: 2008-01-25 02:52:45 +0100 (Fri, 25 Jan 2008)
New Revision: 3074
Modified:
trunk/util/flashrom/flash.h
trunk/util/flashrom/flashchips.c
Log:
Add ids and chip entry for Spansion S25FL016A to flashrom, tested,
working.
Signed-off-by: Peter Stuge <[EMAIL PROTECTED]>
Ack
Author: hailfinger
Date: 2008-01-25 02:52:45 +0100 (Fri, 25 Jan 2008)
New Revision: 3074
Modified:
trunk/util/flashrom/flash.h
trunk/util/flashrom/flashchips.c
Log:
Add ids and chip entry for Spansion S25FL016A to flashrom, tested,
working.
Signed-off-by: Peter Stuge <[EMAIL PROTECTED]>
Ack
On Thu, Jan 24, 2008 at 09:36:51PM +0100, Patrick Georgi wrote:
> as promised a short proposal on how to give the payload a chance to
> make use of the console(s) established by coreboot.
..
> So... Comments? :-)
I think this is the next logical step after the serial port patch.
Thumbs up.
//Pe
On Thu, Jan 24, 2008 at 01:53:00PM +0100, Stefan Reinauer wrote:
> This is unrelated to your patch, but I don't like that we list all
> the IDs as defines in flash.h just to put that define in the same
> place in flashchips.c.
>
> Can't we just put the ID directly into the array in flashchips.c
>
On Thu, Jan 24, 2008 at 04:57:35PM +0100, Carl-Daniel Hailfinger wrote:
> > Then I wrote rand.bin which is 2MB of /dev/random. This
> > consistently reads back as something quite different
>
> This looks like the chip was not erased between writing
> 4*coreboot.rom and the random image.
You mean
On Thu, Jan 24, 2008 at 03:43:31PM -0700, Marc Jones wrote:
> For correctness do a read-modify-write of the ROM write-protect area.
Thank you.
> Correctly disable the ROM area Write Protect bit in the Geode LX.
>
> signed-off by: Marc Jones <[EMAIL PROTECTED]>
Not tested, but:
Acked-by: Pete
For correctness do a read-modify-write of the ROM write-protect area.
Please test on a Geode platform.
Marc
--
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:[EMAIL PROTECTED]
http://www.amd.com/embeddedprocessors
Correctly disable the ROM area Write Protect bit in the Geode L
Many thanks for the comments!
Committed revision 560.
Marc, do I need to put those two interrupt support cases back, then? I
just deleted them :-)
Let me know when the VSA is available that won't call them.
ron
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Author: rminnich
Date: 2008-01-24 22:54:22 +0100 (Thu, 24 Jan 2008)
New Revision: 560
Added:
coreboot-v3/northbridge/amd/geodelx/vsmsetup.c
Modified:
coreboot-v3/northbridge/amd/geodelx/Makefile
coreboot-v3/util/x86emu/vm86.c
Log:
This is a first cut at the implementation of VSM support.
Author: rminnich
Date: 2008-01-24 22:54:22 +0100 (Thu, 24 Jan 2008)
New Revision: 560
Added:
coreboot-v3/northbridge/amd/geodelx/vsmsetup.c
Modified:
coreboot-v3/northbridge/amd/geodelx/Makefile
coreboot-v3/util/x86emu/vm86.c
Log:
This is a first cut at the implementation of VSM support.
Hi,
as promised a short proposal on how to give the payload a chance to make
use of the console(s) established by coreboot.
There's an ACK for my serial patch, but I'll wait for responses on this
one, as the patch is a first step for this strategy.
The proposal is about a setup which would imple
Carl-Daniel Hailfinger wrote:
> On 24.01.2008 20:05, ron minnich wrote:
>> On Jan 24, 2008 10:06 AM, Carl-Daniel Hailfinger
>> <[EMAIL PROTECTED]> wrote:
>> ===
>
>
> With the fixes: Go ahead and commit.
> Acked-by: Carl-Daniel Hail
On 24.01.2008 20:05, ron minnich wrote:
> On Jan 24, 2008 10:06 AM, Carl-Daniel Hailfinger
> <[EMAIL PROTECTED]> wrote:
> ===
>
>>> --- northbridge/amd/geodelx/vsmsetup.c(revision 0)
>>> +++ northbridge/amd/geodelx/vsmsetup.
Uwe,
Thanks for the detailed review. I am working on a new set of patches.
Most of the southbridge code was derived the esb6300 code, and the
northbridge code is derived from the e7525 code. For the files you
marked "missing license header," does that mean I need to track down
every contributor t
On Jan 24, 2008 10:06 AM, Carl-Daniel Hailfinger
<[EMAIL PROTECTED]> wrote:
===
> > --- northbridge/amd/geodelx/vsmsetup.c(revision 0)
> > +++ northbridge/amd/geodelx/vsmsetup.c(revision 0)
> > @@ -0,0 +1,302 @@
> > +/*
On Jan 24, 2008 12:06 PM, Carl-Daniel Hailfinger
<[EMAIL PROTECTED]> wrote:
> On 23.01.2008 20:19, ron minnich wrote:
> > On Jan 23, 2008 11:06 AM, Marc Jones <[EMAIL PROTECTED]> wrote:
> >
> > + * Copyright (C) 2000 Scyld.
> > + * Copyright (C) 2000 Scyld Computing Corporation
> > + * Copyright
On 23.01.2008 20:19, ron minnich wrote:
> On Jan 23, 2008 11:06 AM, Marc Jones <[EMAIL PROTECTED]> wrote:
>
>> BUT, I don't think that you need them. VSA should default to reasonable
>> settings without the in15 calls. I need to test it in v2 this afternoon.
>> If VSA does require them I would r
On 23.01.2008 05:25, ron minnich wrote:
> OK, with 3073, something went worse.
>
r3073 and r3072 did not have any changes affecting you.
> Last night, I was flashing just fine. As of today, it's not id'ing it
> and it is reading 0xff back for that pass.
Maybe the port it reads from gives 0xff
On 24/01/08 17:15 +0100, Carl-Daniel Hailfinger wrote:
> On 24.01.2008 17:02, ron minnich wrote:
> > On Jan 24, 2008 6:34 AM, Carl-Daniel Hailfinger
> >
> >> What about compression of the VSA?
> >>
> >
> > On v3, we have the 'use compression' option in the Kconfig dialog.
> > Long term, I i
On 24.01.2008 17:02, ron minnich wrote:
> On Jan 24, 2008 6:34 AM, Carl-Daniel Hailfinger
>
>> What about compression of the VSA?
>>
>
> On v3, we have the 'use compression' option in the Kconfig dialog.
> Long term, I intend to use the same compression for vsa that we use
> for everything
On Jan 24, 2008 6:34 AM, Carl-Daniel Hailfinger
> What about compression of the VSA?
On v3, we have the 'use compression' option in the Kconfig dialog.
Long term, I intend to use the same compression for vsa that we use
for everything else, and to decompress it as is done in v2, but use
whatever c
On 24.01.2008 13:38, Peter Stuge wrote:
> I put a Spansion chip on a m57sli. This patch lets flashrom read the
> chip successfully. Writing is inconsistent.
>
> I've done two writes so far. Writing takes several minutes and I
> don't get any progress messages from flashrom.
>
> The first run was 4*
On 23.01.2008 17:05, Stefan Reinauer wrote:
> Jordan Crouse wrote:
>> Lets go back to basics on this one - put the blob in the LAR (easy to
>> do),
>> and then the code will know how to use it. Done and done.
>>
> Yes. All we need to know about the VSA binary is its start address in
> the lar. T
* Peter Stuge <[EMAIL PROTECTED]> [080124 13:38]:
> Index: util/flashrom/flash.h
> ===
> --- util/flashrom/flash.h (revision 3073)
> +++ util/flashrom/flash.h (working copy)
> @@ -166,6 +166,14 @@
> #define SHARP_LHF00L04
I put a Spansion chip on a m57sli. This patch lets flashrom read the
chip successfully. Writing is inconsistent.
I've done two writes so far. Writing takes several minutes and I
don't get any progress messages from flashrom.
The first run was 4*coreboot.rom and that booted right away with VGA
and
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