On Mon, Aug 17, 2009 at 12:06:04AM +0800, Jason Wang wrote:
hi all,
here is my usbrom latest progress.
1) usbrom can hook int13
2) usbrom can support int13 lba mode which including int13,ah=02,42,41
3) usbrom can be used to boot grub from usb disk. Grub can step into
stage1.5
Great!
Kevin O'Connor wrote:
On Wed, Aug 12, 2009 at 06:02:08AM -0400, Chris Kindt wrote:
These initial patches enable booting with the SeaBIOS VGA BIOS on
Geode LX hardware.
Wow. I was unaware that there was a GSOC project for this.
I have a few comments - see below.
+static union u64_u32_u
On Mon, Aug 17, 2009 at 01:21:17PM +0200, Arnaud Maye wrote:
I've got the VGA to operating correctly in seabios. Actually it was
as simple as enabling the VGA forwarding on the pci root complex, in
the northbridge. Actually during the coreboot boot, the VGA output
does not make much sense but
So for these two files, replace the -$(CONFIG_CPU_...) with -y.
With that change,
Acked-by: Ronald G. Minnich rminn...@gmail.com
ron
Yeah, I overlooked that.
Here it's the changed patch, I also uncommented the line that sourced
the Kconfig file in src/cpu/amd/model_fxx.
Cristi
Index:
Updated Patch:
seabios-vgarom-geodelx-v2.patch
-added clobber list to VSA2 functions
-converted _rom_pci data to c structure
-replaced asm int10 with direct call
-unset CONFIG_GEODELX
Signed-off-by: Chris Kindt chriski...@umbc.edu
diff --git a/Makefile
Dear coreboot community,
in a row of very unfortunate events the mainboard of our server
coreboot.org (Sun Fire x4100) broke down on Friday night/morning, and
did not get replaced until this morning. Thus, as you might have
noticed, all services were down for three days over the weekend. We will
Hello Guys,
I've got the VGA to operating correctly in seabios. Actually it was as
simple as enabling the VGA
forwarding on the pci root complex, in the northbridge. Actually during
the coreboot boot, the VGA
output does not make much sense but as soon the OS boots, I can see the
complete
--- src/cpu/amd/socket_AM2/Makefile.inc (revision 0)
+++ src/cpu/amd/socket_AM2/Makefile.inc (revision 0)
@@ -0,0 +1,16 @@
+obj-$(CONFIG_CPU_AMD_SOCKET_AM2) += socket_AM2.o
+subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += ../model_fxx
+
+subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += ../dualcore
Hello Kevin,
Kevin O'Connor wrote:
On Mon, Aug 17, 2009 at 01:21:17PM +0200, Arnaud Maye wrote:
I've got the VGA to operating correctly in seabios. Actually it was
as simple as enabling the VGA forwarding on the pci root complex, in
the northbridge. Actually during the coreboot boot, the
Dear Chris,
Am Samstag, den 15.08.2009, 00:23 -0400 schrieb Chris Kindt:
+// Writen for Google Summer of Code 2009 for the coreboot project
s/Writen/Written/
Bests,
Paul
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Description: Dies ist ein digital signierter Nachrichtenteil
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On Sat, Aug 15, 2009 at 12:00 AM, Chris Kindtchriski...@umbc.edu wrote:
+static union u64_u32_u lx_msrRead(u32 msrAddr)
+{
+ union u64_u32_u val;
+ asm __volatile__ (
+ movw $0x0AC1C, %%dx \n
+ movl $0xFC530007, %%eax \n
+ outl %%eax, %%dx
Author: oxygene
Date: 2009-08-17 16:33:03 +0200 (Mon, 17 Aug 2009)
New Revision: 4544
Modified:
trunk/coreboot-v2/src/arch/i386/Kconfig
trunk/coreboot-v2/src/mainboard/Kconfig
Log:
Add 4MB ROM image size to Kconfig
Signed-off-by: Cristi Magherusan cristi.magheru...@net.utcluj.ro
Acked-by:
Am 14.08.2009 02:33, schrieb Cristi Magherusan:
This patch enables Kbuild to create 4MB ROM images, instead of maximum 2MB as
before.
Acked by me and committed, r4544
Thanks,
Patrick
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Author: oxygene
Date: 2009-08-17 16:46:13 +0200 (Mon, 17 Aug 2009)
New Revision: 4545
Modified:
trunk/coreboot-v2/src/Kconfig
trunk/coreboot-v2/src/arch/i386/Makefile.inc
Log:
Allow setting up a VGABIOS image in Kconfig
Signed-off-by: Cristi Magherusan cristi.magheru...@net.utcluj.ro
Author: oxygene
Date: 2009-08-17 16:47:32 +0200 (Mon, 17 Aug 2009)
New Revision: 4546
Modified:
trunk/coreboot-v2/src/Kconfig
Log:
Remove unused normal image option in Kconfig
Signed-off-by: Cristi Magherusan cristi.magheru...@net.utcluj.ro
Acked-by: Patrick Georgi
Am 14.08.2009 04:31, schrieb Cristi Magherusan:
This patch introduces support for adding VGA BIOS images in Kbuild
Acked and committed, r4545
Thanks,
Patrick
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Am 14.08.2009 02:23, schrieb Cristi Magherusan:
This patch removes te NORMAL payload from Kbuild.
Acked and committed, r4546
Thanks,
Patrick
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Dear coreboot readers!
This is the automatic build system of coreboot.
The developer oxygene checked in revision 4544 to
the coreboot repository. This caused the following
changes:
Change Log:
Add 4MB ROM image size to Kconfig
Signed-off-by: Cristi Magherusan cristi.magheru...@net.utcluj.ro
Am 12.08.2009 23:45, schrieb Thomas Jourdan:
I can send a patch for review but it's not really clean code :
- I need some memory to store the page translation tables before going
to 64 bits. It's hardcoded to some unused (I hope) location. How can I
allocate space in a generic way ? Is it
Author: oxygene
Date: 2009-08-17 17:19:52 +0200 (Mon, 17 Aug 2009)
New Revision: 4547
Modified:
trunk/coreboot-v2/util/cbfstool/util.c
Log:
Move CBFS header to a safer place.
Signed-off-by: Thomas Jourdan thomas.jour...@gmail.com
Acked-by: Patrick Georgi patrick.geo...@coresystems.de
Am 12.08.2009 23:45, schrieb Thomas Jourdan:
Hi guys
I think I found a bug in CBFS. It's about the cbfs master header
location. Under certains circumstances, it can be overwritten by a file,
hence corrupting the rom.
Good find! Acked and committed, r4547.
Thanks,
Patrick
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coreboot
This bit can be set for one PCIe port or the other, actually two
possible settings but both cannot be enabled in the same time. So
the bit to set depends where the GFX card is attached in fact.
Should we proceed with this detection to set the correct bit or
can we assume the user
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer oxygene checked in revision 4545 to
the coreboot repository. This caused the following
changes:
Change Log:
Allow setting up a VGABIOS image in Kconfig
Signed-off-by: Cristi Magherusan
Author: rminnich
Date: 2009-08-17 17:42:18 +0200 (Mon, 17 Aug 2009)
New Revision: 4548
Modified:
trunk/coreboot-v2/documentation/Kconfig.tex
Log:
Add more docs, this time for southbridge.
No real difference from northbridge.
Signed-off-by: Ronald G. Minnich rminn...@gmail.com
Acked-by:
On Mon, Aug 17, 2009 at 8:28 AM, Myles Watsonmyle...@gmail.com wrote:
The correct way to do this is to add the functionality to the chipset init
function. It should check the bit that was set in the device structure and
write the correct thing to the PCI configuration space.
How about we go
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer oxygene checked in revision 4546 to
the coreboot repository. This caused the following
changes:
Change Log:
Remove unused normal image option in Kconfig
Signed-off-by: Cristi Magherusan
Hello!
Around 1:30AM (EDT NY Time) I was busy restoring a tar file of one of my
systems when it was then time to run SVN and update that local repository to
what's considered normal on the ones at the host.
I kept timing out there. I tried doing the same thing at the regular one,
same thing. I
Hello!
My mistake. The current issue out is indeed September, and the next month
issue will indeed be the October one.
As I stated before, they always mention what the subscriber has to look
forward to in the contents for the current month.
The theme for the October issue is Hack this! and they
On Mon, Aug 17, 2009 at 9:51 AM, ron minnich rminn...@gmail.com wrote:
On Mon, Aug 17, 2009 at 8:28 AM, Myles Watsonmyle...@gmail.com wrote:
The correct way to do this is to add the functionality to the chipset
init
function. It should check the bit that was set in the device structure
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer oxygene checked in revision 4547 to
the coreboot repository. This caused the following
changes:
Change Log:
Move CBFS header to a safer place.
Signed-off-by: Thomas Jourdan thomas.jour...@gmail.com
Acked-by:
Hi Guys,
I could use a pointer to some CBFS info, to get the Via epia-n build
running again since the change to use CBFS was mandated.
Before CBFS buildrom gave me a 384K coreboot.rom which, when
concatenated with vga.bin and bochs.bin gave me my 512k
coreboot.final.bin for programming.
I see
On Mon, Aug 17, 2009 at 9:12 AM, Myles Watsonmyle...@gmail.com wrote:
For me the steps would be:
1. Make sure that the device that needs the config writes is in the above
list.
I am after painful detail :-)
So, what is the name of this device? src/northbridge/...
2. Add code like this:
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer rminnich checked in revision 4548 to
the coreboot repository. This caused the following
changes:
Change Log:
Add more docs, this time for southbridge.
No real difference from northbridge.
Signed-off-by:
On Mon, Aug 17, 2009 at 10:00 AM, Harrison, Jon (SELEX GALILEO, UK)
jon.harri...@selexgalileo.com wrote:
Hi Guys, I'm back.
Just been catching up on traffic.
Downloaded latest and it looks like my changes did not go in after all ?
So... latest patches attached. Info below.
ron minnich wrote:
$(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions
- $(Q)printf 'INCLUDE ldoptions\n' $@
- $(Q)printf '$(foreach ldscript,$(ldscripts),INCLUDE $(ldscript)\n)'
$@
+ $(Q)cat $(obj)/ldoptions $@
+ $(Q)cat $(ldscripts) $@
This could be simplified a little
On Fri, Aug 14, 2009 at 6:19 PM, Peter Stugepe...@stuge.se wrote:
ron minnich wrote:
$(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions
- $(Q)printf 'INCLUDE ldoptions\n' $@
- $(Q)printf '$(foreach ldscript,$(ldscripts),INCLUDE $(ldscript)\n)'
$@
+ $(Q)cat $(obj)/ldoptions $@
Hi Daniel,
On 11.08.2009 18:32, Daniel Toussaint wrote:
I am using the open source drivers , radeon and radeonhd. When I try it on a
similar board with AMI bios , xrandr can switch on the HDMI port without any
problems - with radeon and radeonhd. I guess I could give Catalyst a try to
see if
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer myles checked in revision 4549 to
the coreboot repository. This caused the following
changes:
Change Log:
Get the Via EPIA-N(L)/CN400 to a reasonable level of maturity::
Tested on Via EPIA-NL8000EG with FILO
Okay, so actually we are talking about the PCIe Port (PEA) peripheral in
the ep80579. So actually
a source file for it is already in the repo as Myles pointed out earlier:
northbridge\intel\i3100\pciexp_porta.c
The PCIe portA can be either x8 (PEA) or in double x8 (PEA0 and PEA1).
In the
On Mon, Aug 17, 2009 at 10:49 AM, Arnaud Mayearnaud.m...@4dsp.com wrote:
Ideally we want this to operate with the card connected where the card is
actually connected to.
And that can not be determined from hardware, right? has to be set in
a Config.lb.
ron
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ron minnich wrote:
On Mon, Aug 17, 2009 at 10:49 AM, Arnaud Mayearnaud.m...@4dsp.com wrote:
Ideally we want this to operate with the card connected where the card is
actually connected to.
And that can not be determined from hardware, right? has to be set in
a Config.lb.
ron
On Mon, Aug 17, 2009 at 10:57 AM, ron minnich rminn...@gmail.com wrote:
On Mon, Aug 17, 2009 at 9:12 AM, Myles Watsonmyle...@gmail.com wrote:
For me the steps would be:
1. Make sure that the device that needs the config writes is in the above
list.
I am after painful detail :-)
I'm
Actually it should work because in devices\device.c is the
set_vga_bridge_bits() function. This function
scans all the devices for PCI_BASE_CLASS_DISPLAY and
PCI_CLASS_DISPLAY_OTHER. So
I guess 00.02.00 or 00.03.00 should be assigned with the PCI_BRIDGE_CTL_VGA
as it will be the
first
On Mon, Aug 17, 2009 at 11:41 AM, coreboot information
i...@coresystems.de wrote:
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer myles checked in revision 4549 to
the coreboot repository. This caused the following
changes:
Compilation of via:epia-n
On Saturday 08 August 2009 11:43:20 Zheng Bao wrote:
Great. I will submit my code after this weekend.
I can't wait the coming of the new era.
Is there already something according to RS780 in the tree?
Did you already commit your patch?
Zheng.
Kind regards,
Harald
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On 17.08.2009 20:15, Harald Gutmann wrote:
On Saturday 08 August 2009 11:43:20 Zheng Bao wrote:
Great. I will submit my code after this weekend.
I can't wait the coming of the new era.
Is there already something according to RS780 in the tree?
Did you already commit your patch?
hi,
i have a m2a-vm hdmi and could provide dumps if needed. just tell me
exactly what you need.
best regards
khn
2009/8/17 Carl-Daniel Hailfinger c-d.hailfinger.devel.2...@gmx.net:
Hi Daniel,
On 11.08.2009 18:32, Daniel Toussaint wrote:
I am using the open source drivers , radeon and
On Monday 10 August 2009 00:33:05 Rudolf Marek wrote:
Hi all,
I'm prepared to come to Germany ;) as we discussed earlier seems best
target for a meeting.
Germany wouldn't be far away, and I think I can take the time to attend the
party!
Are there any further details on that topic? When?
Am 17.08.2009 18:56, schrieb Harrison, Jon (SELEX GALILEO, UK):
Or point to a good example to get started from.
I guess something needs to be added to targets/via/epia-n/Config.lb ??
..
..
romimage fallback
option COREBOOT_EXTRA_VERSION = -epia_n-fallback
payload
It is now possible to embed an image of a floppy into a CBFS flash
file and then boot from that image with SeaBIOS.
I've used this to boot FreeDOS directly from flash on my epia-cn. An
lzma compressed bootable FreeDOS floppy uses about 95K (for the base
kernel and command interpreter).
More
attached.
ron
Start to add support for via southbridges.
And, not incidentally, correct an error in southbridge/via/Makefile.inc.
subdir-y is wrong; should be subdir-$(CONFIG_etc)
Signed-off-by: Ronald G. Minnich rminn...@gmail.com
Index: southbridge/via/vt8237r/Kconfig
attached.
ron
Correct usage. Please see documentation/Kconfig.pdf for the writeup.
Signed-off-by: Ronald G. Minnich rminn...@gmail.com
Index: src/northbridge/via/cx700/Makefile.inc
===
--- src/northbridge/via/cx700/Makefile.inc
attached.
Cn400 support.
Signed-off-by: Ronald G. Minnich rminn...@gmail.com
Index: src/northbridge/via/cn400/Kconfig
===
--- src/northbridge/via/cn400/Kconfig (revision 0)
+++ src/northbridge/via/cn400/Kconfig (revision 0)
@@ -0,0
Acked-by: Ronald G. Minnich rminn...@gmail.com
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