On 1/10/10 10:48 PM, Patrick Georgi wrote:
attached patch makes qemu use the udelay function in
src/pc80/udelay_io.c instead of the equivalent copy in
src/cpu/emulation/qemu-x86/northbridge.c.
Similar changes can be done for AMD boards (just with UDELAY_LAPIC), I
think.
Signed-off-by:
Author: oxygene
Date: 2010-01-11 10:05:52 +0100 (Mon, 11 Jan 2010)
New Revision: 5006
Modified:
trunk/src/cpu/emulation/qemu-x86/northbridge.c
trunk/src/mainboard/emulation/qemu-x86/Kconfig
trunk/src/mainboard/emulation/qemu-x86/Options.lb
Log:
Make qemu use the udelay function in
Knut Kujat escribió:
Hello,
over this week I've tried to do a proper IRQ assignment on the H8QME-2+
I've got here. So opened mp_tables.c and started changing the irq
routing values with those I got form the board booting with a factory
bios. Then I started giving the devices the irq they
On January 9, 2010 at 9:11 PM Myles Watson myle...@gmail.com wrote:
-Original Message-
Am 09.01.2010 13:29, schrieb j...@settoplinux.org:
Yes you can add Thomson IP1000 and RCA RM4100 to the list. They build
fine with
Kconfig.
Have you boot tested them yet?
I tried
2010/1/8 Patrick Georgi patr...@georgi-clan.de:
In that case, your ROM is probably not entirely mapped yet. That's an
issue that has to be fixed per chipset (southbridge mostly).
I see explicit support for it in cs5530 (even though that _might_
require some more changes), and somewhere in the
On January 10, 2010 at 7:31 AM ron minnich rminn...@gmail.com wrote:
great idea, we need it. I think it ought to be a .tex file. But this
is a good start, needs to be in svn
yes and a wiki page please??
Thanks,
Joseph Smith
Set-Top-Linux
www.settoplinux.org
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Rudolf Marek wrote:
The DQS values are stored in chipset S3 NVRAM during first boot,
and used later when resume to fill them in. It could be done via
simple backup of all mem cntrl regs but it is not done so.
I think this is a brilliant idea for improvement - it would also
reduce the resume
Am 11.01.2010 14:42, schrieb Peter Stuge:
I don't think svn or wiki matters. .tex is nice because you can
easily make .pdf and print. Ron has inspired me to use Lyx. :)
markdown can be transformed to tex for those that want it (and thus to
pdf), but it's still editable with a simple text
Hello,
I want to display the current date and time inside functions like
add_mainboard_resources, suspend_resume or to find the elapsed time between the
end of coreboot and the end of the payload for example.
I search how to get the current time from protected mode in coreboot. Since
there is
conged...@voila.fr wrote:
I want to display the current date and time inside functions like
add_mainboard_resources, suspend_resume or to find the elapsed time
between the end of coreboot and the end of the payload for example.
I suggest to do this is by passive measurement outside the running
On January 11, 2010 at 1:52 PM Patrick Georgi patr...@georgi-clan.de wrote:
Am 11.01.2010 14:42, schrieb Peter Stuge:
I don't think svn or wiki matters. .tex is nice because you can
easily make .pdf and print. Ron has inspired me to use Lyx. :)
markdown can be transformed to tex for
On January 11, 2010 at 2:24 PM Peter Stuge pe...@stuge.se wrote:
conged...@voila.fr wrote:
I want to display the current date and time inside functions like
add_mainboard_resources, suspend_resume or to find the elapsed time
between the end of coreboot and the end of the payload for
Piotr Piwko wrote:
I've found that the booting process hangs on this part of
cbfs_master_header() function (src/lib/cbfs.c):
...
outb(0xa1, 0x80); // --- It is printed
void *ptr = (void *)*((unsigned long *) CBFS_HEADPTR_ADDR);
printk_spew(Check CBFS header at %p\n, ptr);
header =
On Mon, Jan 11, 2010 at 2:24 PM, Peter Stuge pe...@stuge.se wrote:
Did you already try the v3 support for adl/msm800sev?
yes, try this first. See if it goes. Then you'll need to match up what
v3 does with what v2 does, and if you get it fixed, I will thank you A
LOT.
Would be nice to have the
Patrick Georgi wrote:
4. Implement it like in southbridge/amd/amd8111:
4a. Add a new file (I recommend
southbridge/$vendor/$device/bootblock.c) with a static void
bootblock_southbridge_init(void) function that enables rom mapping
4b. Set BOOTBLOCK_SOUTHBRIDGE_INIT to point to the file
Please
Matthias Wenzel wrote:
+++ b/phoenix.c
..
@@ -117,10 +117,10 @@ PhoenixModule(unsigned char *BIOSImage, int BIOSLength,
int Offset)
ModuleName = PhoenixModuleNameGet(Module-Type);
if (ModuleName) {
- filename = malloc(strlen(ModuleName) + 7);
+ filename =
Knut Kujat wrote:
I fixed the 2 cpu and just 8 GB ram issues,
How?
//Peter
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Andrej Skirn wrote:
I don't see any mention of needing SeaBios to get the VGA working
on the Wiki, although Peter Stuge suggested it.
It depends on the VGA BIOS. Some of them rely on more BIOS interrupt
services being available, some work with less services. coreboot
tries to provide some few
Peter Stuge wrote:
Matthias Wenzel wrote:
+++ b/phoenix.c
..
@@ -117,10 +117,10 @@ PhoenixModule(unsigned char *BIOSImage, int
BIOSLength, int Offset)
ModuleName = PhoenixModuleNameGet(Module-Type);
if (ModuleName) {
-filename = malloc(strlen(ModuleName) + 7);
+
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