[coreboot] coreboot release 4.8 - Targeting May 15.

The coreboot 4.8 release is planned for May 15. That's the day that we'll choose the commit to base the release on and create the release tag in git. The tarballs will be available on the website shortly afterwards. For anyone who feels like contributing to the release notes, you can work on

Re: [coreboot] POWER9 / Talos II coreboot support?

On 05/03/2018 06:02 PM, ron minnich wrote: > > > On Thu, May 3, 2018 at 1:20 PM Timothy Pearson > > > wrote: > > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA256 > > I think I was being a bit pessimistic / too

Re: [coreboot] POWER9 / Talos II coreboot support?

On Thu, May 3, 2018 at 1:20 PM Timothy Pearson < tpear...@raptorengineering.com> wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA256 > > I think I was being a bit pessimistic / too careful here. We're close > to getting the docs publicly released, but that doesn't help anyone > wanting

Re: [coreboot] POWER9 / Talos II coreboot support?

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 I think I was being a bit pessimistic / too careful here. We're close to getting the docs publicly released, but that doesn't help anyone wanting access right now, which is why I mentioned the other route. IBM's committed to getting the

Re: [coreboot] [RFH] Status of the Lenovo X201

I uploaded a status report for the X201 and it contains the smashed stack message. Since then I booted several times but was not able to reproduce this stack smashing issue. It seems like that this kind of error occurs only once after flashing. Please find attached a diff of the notable

Re: [coreboot] Please upload board status Asus AM1I-A

Thumbs up for you! After enabling MRC_CACHE ram initialization is 1.1 seconds less. Regards, - Eli On 03/05/18 19:18, Kyösti Mälkki wrote: > On Thu, May 3, 2018 at 6:56 PM, Elisenda Cuadros wrote: >> Dear Paul, >> >> Sorry for the delay. >> >> I uploaded another build from

Re: [coreboot] KGPE-D16 / Problem booting with two CPUs

Hi Kyösti, I will try to boot again with 6276+6238 with the current build and I will inform the result. Regards, - Eli On 03/05/18 20:07, Kyösti Mälkki wrote: > On Thu, May 3, 2018 at 8:57 PM, Elisenda Cuadros wrote: >> Finally I acquired another 6276 CPU (it was the fastest

Re: [coreboot] KGPE-D16 / Problem booting with two CPUs

On Thu, May 3, 2018 at 8:57 PM, Elisenda Cuadros wrote: > Finally I acquired another 6276 CPU (it was the fastest and cheapest > option). > > It works perfect. > Maybe not related, but KGPE-D16 was affected by a regression [1] on SMP init. That was present on master from Aug 2017

Re: [coreboot] KGPE-D16 / Problem booting with two CPUs

Finally I acquired another 6276 CPU (it was the fastest and cheapest option). It works perfect. If I can try (in the future) another different 16-core CPU, I will report the result. Thank you for you kind support. Regards, - Eli On 11/04/18 21:30, Timothy Pearson wrote: > This may be a

Re: [coreboot] Please upload board status Asus AM1I-A

On Thu, May 3, 2018 at 6:56 PM, Elisenda Cuadros wrote: > Dear Paul, > > Sorry for the delay. > > I uploaded another build from current master to the board_status repository. > > I disabled the serial console and rebooted twice before uploading the data. > > I think RAM

Re: [coreboot] POWER9 / Talos II coreboot support?

"There is no legal issue that we are aware of with using them to develop a libre firmware solution like coreboot; IBM just doesn't want the detailed register manuals distributed verbatim online at this time." This is worrisome. Intel docs used to be the same way in 1999, otherwise LinuxBIOS

Re: [coreboot] Please upload board status Asus AM1I-A

Dear Paul, Sorry for the delay. I uploaded another build from current master to the board_status repository. I disabled the serial console and rebooted twice before uploading the data. I think RAM initialization time is more or less the same. Is there anything else I can do to debug this?

Re: [coreboot] [URGENT] Full List of AMD-based boards that are going to be removed from coreboot unless people cough up a board status update

Release notes for 4.7 are published in the download section of coreboot, alongside the releases [1]. If you mean a blog post, I agree, I didn't do one of those for 4.7. As far as the panic about boards getting removed, while it would be good to remove UNUSED boards from the current master

Re: [coreboot] POWER9 / Talos II coreboot support?

+1 Same for me, I would gladly help with the port of coreboot to Talos II (even if I am not a coreboot expert, I do have some background in firmware development..), but there are 2 problems : - the time : I will be able to spend my free time on coreboot development again only after june 2018;

Re: [coreboot] POWER9 / Talos II coreboot support?

On Thu, May 03, 2018 at 06:32:29AM -0500, Timothy Pearson wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA256 > > On 05/03/2018 03:44 AM, Kyösti Mälkki wrote: > > On Wed, May 2, 2018 at 9:22 PM, Timothy Pearson > > wrote: > >> -BEGIN PGP SIGNED

Re: [coreboot] POWER9 / Talos II coreboot support?

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/03/2018 03:44 AM, Kyösti Mälkki wrote: > On Wed, May 2, 2018 at 9:22 PM, Timothy Pearson > wrote: >> -BEGIN PGP SIGNED MESSAGE- >> Hash: SHA256 >> >> We've been kicking around the idea for some time of

Re: [coreboot] Why do we have FSP-S

Hi David, I tried to stay away from commenting, but now that you pulled this red binaryPI card from your pocket :) On Wed, May 2, 2018 at 9:49 PM, David Hendricks wrote: > > Bruce Griffith's e-mail about AMD's binary PI provides some great > insights into these

[coreboot] Contribution trolling (was Re: Thread derailment)

Hello Zoran, did you just try to derail the thread-derailment thread? Or did you try to make any point at all? > [coreboot] How to handle vbt.bin > https://www.mail-archive.com/coreboot@coreboot.org/msg51401.html > > You, GOOGLE designers, are here talking essays (War and Peace) about > what to