On Fri, May 4, 2018 at 7:25 PM, Aaron Durbin via coreboot
wrote:
> On Fri, May 4, 2018 at 10:01 AM, Jonathan A. Kollasch
> wrote:
>> On Fri, May 04, 2018 at 05:23:40PM +0200, Piotr Król wrote:
>>> Hi Aaron,
>>> I tried to boot PC Engines apu2 on
On Sat, May 5, 2018 at 4:26 PM, Kyösti Mälkki wrote:
> On Sun, May 6, 2018 at 12:17 AM, Aaron Durbin wrote:
>>> I find it particularly hard to be civil on your first question, so
>>> trying with sarcasm instead. After 5000 or so development hours and
On Sun, May 6, 2018 at 12:17 AM, Aaron Durbin wrote:
>> I find it particularly hard to be civil on your first question, so
>> trying with sarcasm instead. After 5000 or so development hours and
>> direct support from AMD, is the boot sequence for soc/stoneyridge
>> prototypes
On Sat, May 5, 2018 at 5:36 AM, Nico Huber wrote:
> On 04.05.2018 23:41, Aaron Durbin via coreboot wrote:
>> On Fri, May 4, 2018 at 3:20 PM, Youness Alaoui
>> wrote:
>>> Hi,
>>>
>>> I've just pushed a commit for review on gerrit
>>>
On Sat, May 5, 2018 at 6:27 PM, Marshall Dawson
wrote:
>> So did you hit problems with CAR_GLOBAL in agesa_get_dispatcher(),
>> when experimeting CZ vs ST? I don't see why this code works even for
>> dual-core ST but I did not evaluate CAR layout. Documentation part
On Fri, May 4, 2018 at 8:49 PM, Kyösti Mälkki wrote:
> On Fri, May 4, 2018 at 8:22 PM, Aaron Durbin wrote:
>> On Fri, May 4, 2018 at 11:16 AM, Kyösti Mälkki
>> wrote:
>>> On Fri, May 4, 2018 at 7:19 PM, Kyösti Mälkki
>
> So did you hit problems with CAR_GLOBAL in agesa_get_dispatcher(),
> when experimeting CZ vs ST? I don't see why this code works even for
> dual-core ST but I did not evaluate CAR layout. Documentation part for
> fixed MTRRs in gcccar.inc appears to be same.
>
I don't remember specifically
On 04.05.2018 23:41, Aaron Durbin via coreboot wrote:
> On Fri, May 4, 2018 at 3:20 PM, Youness Alaoui
> wrote:
>> Hi,
>>
>> I've just pushed a commit for review on gerrit
>> (https://review.coreboot.org/#/c/coreboot/+/26108/) and I'm hoping to
>> open the
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On 05/05/2018 11:53 AM, Kyösti Mälkki wrote:
> On Sat, May 5, 2018 at 3:06 AM, Marshall Dawson
> wrote:
>>> My current guess is AP CPUs do not see initialised memory for
>>> _car_region_start .. _end. That region is
On Sat, May 5, 2018 at 3:06 AM, Marshall Dawson
wrote:
>> My current guess is AP CPUs do not see initialised memory for
>> _car_region_start .. _end. That region is set up using fixed MTRRs in
>> low memory and probably not synced between cores so early in romstage.
>
10 matches
Mail list logo