Dear Daniel,
Please see my comments inline...
On 03/11/2018 04:32, Daniel Gröber wrote:
> On Sat, Nov 03, 2018 at 12:10:25AM +0100, Angel Pons wrote:
>> Is it me, or is that thing a SPI flash chip on a PCB plus a few
>> transistors? It seems like copying the PCB design is rather doable, or am I
Hi,
On Sat, Nov 03, 2018 at 12:10:25AM +0100, Angel Pons wrote:
> Is it me, or is that thing a SPI flash chip on a PCB plus a few
> transistors? It seems like copying the PCB design is rather doable, or am I
> missing something?
Indeed, very doable, but tedious work ;)
Here you go:
i have tried it, microcode is now updated, but this does not help with
linux not wants to boot with iommu enabled
Am 02.11.2018 um 21:29 schrieb Mike Banon:
> For our Richland 15h family AMD CPUs (and for 16h also) , this
> microcode update procedure - accessible from coreboot's configuration
>
Hello,
Is it me, or is that thing a SPI flash chip on a PCB plus a few
transistors? It seems like copying the PCB design is rather doable, or am I
missing something?
Regards,
Angel Pons
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
In that case, I'd also like to point you to the deadline for submitting
main track talks which is tomorrow(!).
https://fosdem.org/2019/news/2018-08-10-call-for-participation/
Having a coreboot/LinuxBoot talk there would be awesome. Ron/David,
could you submit something or do you have someone in
(This is the firmware storage module required to use OpenBMC on the
KGPE-D16/KCMA-D8 boards - with it at last one can have feature
equivalency with a proprietary system)
Great opportunity if you need but don't have one - they appear to be
brand new.
Raptor says either the ASMB4 or the ASMB5 will
I"m leaning to yes, by which I mean if you do it, I'll show up.
I can't believe I said that.
On Fri, Nov 2, 2018 at 7:20 AM Carl-Daniel Hailfinger
wrote:
>
> Hi!
>
> FOSDEM next year will be on 2 & 3 February 2019.
> The deadline for applying for a stand is today.
> Do we want a
For our Richland 15h family AMD CPUs (and for 16h also) , this
microcode update procedure - accessible from coreboot's configuration
"menuconfig" menu - is broken, I've observed this 0K problem too. You
should leave this "Include CPU microcode in CBFS" option as "Do not
include microcode updates"
I tried only the one included in current master tree.
But CBFS reports me an 0KB blob as an output ... so that its mostlikele
the reason it halts after boot (maybe updating an not working microcode
to the cpu than ?)
i have microcodes enabled per linux kernel update
dmesg | grep microcode:
[
On Fri, Nov 2, 2018 at 9:15 AM 'Ron Minnich' via linuxboot <
linuxb...@googlegroups.com> wrote:
> I"m leaning to yes, by which I mean if you do it, I'll show up.
>
> I can't believe I said that.
> On Fri, Nov 2, 2018 at 7:20 AM Carl-Daniel Hailfinger
> wrote:
> >
> > Hi!
> >
> > FOSDEM next year
Which microcode gives you a brick? Have you tried those new 2018
microcodes (not merged yet to coreboot) for 15h generation -
https://review.coreboot.org/c/coreboot/+/28273 ? If not, here is a
quick & secure way to get them -
Hi Mike, i hope i can help u i am just a User of coreboot and noo skilled
coreboot hacker yet lol.
The A10-6800K should work as its the same CPU core/ gen.
do not include microcode it makes the rom a brick mode.
U have to add a VGA bios if u are using the Internal GPU.
i am using a F2A85M rev 1.1
Nice report. Do you think A10-6800K CPU would have worked at this
motherboard? Or only A8-6600K is supported? Also, what hardware
revision of this motherboard do you have? (there were F2A85M / --//--
PRO and some other revisions, so I'm a bit confused) . I am seriously
considering doing a similar
Hi,
Please find the latest report on new defect(s) introduced to coreboot found
with Coverity Scan.
1 new defect(s) introduced to coreboot found with Coverity Scan.
1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent
build analyzed by Coverity Scan.
New defect(s)
Hi!
FOSDEM next year will be on 2 & 3 February 2019.
The deadline for applying for a stand is today.
Do we want a coreboot/flashrom/LinuxBoot stand/booth?
There will be a hardware enablement devroom as well, and we might be
able to participate there, but that's not necessarily giving us a chance
Hello coreboot developers:
Looks that coreboot development has been very active lately integrating FSP,
adding new platforms and getting ready for the 4.9 release.
And also I can see new payloads "WOW" (like LinuxBoot, Yabits)... what a
revolution of features and code.
I am using coreboot
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