[coreboot] coreboot leadership meeting minutes for May 8 & May 22

2019-05-22 Thread Martin Roth
coreboot leadership meeting notes are now public: https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkKrgKjeDQ/edit#heading=h.j7tqwova2640 Anyone interested in joining the leadership meetings in the future can check the calendar on the coreboot website for call-in information.

[coreboot] Re: How to add NUVOTON NCT6776F support with serial port logic enabled ???

2019-05-22 Thread Kyösti Mälkki
On Wed, May 22, 2019 at 6:14 PM Дмитрий Понаморев wrote: > > The controversial decision but the console output is not connected directly > to the processor but to the superio Nuvoton. > I did not find any settings to enable LPC (LPC_EN) for the Atom C2000 to. > In

[coreboot] Re: How to add NUVOTON NCT6776F support with serial port logic enabled ???

2019-05-22 Thread Shreesh Chhabbi
Usually LPC_CLKOUTx signals are programmed to native function, so that controller inside SOC generates the clock required. FSP code for LPC is stable enough to configure LPC controller registers to generate clocks. Did you verify configuration of all LPC gpios? They should be programmed to

[coreboot] Re: How to add NUVOTON NCT6776F support with serial port logic enabled ???

2019-05-22 Thread Дмитрий Понаморев
The controversial decision but the console output is not connected directly to the processor but to the superio Nuvoton. I did not find any settings to enable LPC (LPC_EN) for the Atom C2000 to. In atom-c2000-microserver-datasheet-334978.pdf I found register LPCC (LPC control register). This

[coreboot] Ballot results

2019-05-22 Thread Patrick Georgi via coreboot
Hi everybody, thanks to all contributors who voted on the issues brought up by the coreboot leadership team. We had 119 eligible voters and three questions. I'll now summarize the results: # How to handle copyright notices https://civs.cs.cornell.edu/cgi-bin/results.pl?id=E_9e4f5ea789b9ceb9 59

[coreboot] Re: Asus M5A88-V (EVO?) Status

2019-05-22 Thread Mike Banon
> did the ASUS KFSN4-DRE ever receive family 15h support, in addition to 10h? > or was that only the KGPE boards? When I go to a "./src/mainboard/asus/kgpe-d16" or "./src/mainboard/asus/kcma-d8" and do this search: find . -type f -print0 | xargs -0 grep -n "15h" - there are multiple matches at

[coreboot] Re: Gpg keys for coreboot distribution

2019-05-22 Thread Mike Banon
What's good about the AtomBIOS ROMs: you can use AtomDis tool ( [1] / [2] ) to get some idea - about what's inside them and what they're doing. Run "make" to compile it and then use a command like ./atomdis pci1002,990b.rom F > pci1002,990b.rom.dis . I'm sharing my disassemblies as .dis files at

[coreboot] Re: inteltool does not properly dump gpio values for south bridge CM238 chipset

2019-05-22 Thread justidl3
Thanks, I was actually able to get it up and running on coreboot 4.9. The main issue was that i am on fedora, and CONFIG_STRICT_DEVMEM is enabled by default. adding GRUB_CMDLINE_LINUX"iomem=relaxed" while also adding the proper defines in gpio.c and gpio_group.c seemed to fix the issue. my

[coreboot] Re: inteltool does not properly dump gpio values for south bridge CM238 chipset

2019-05-22 Thread Ranga Rao
Hi Justin, Ensure the GPIO’s for the south bridge you are looking for kaby lake 7280 are available in coreboot\util\inteltool\gpio.c CM238 is a skylake chipset -> https://en.wikipedia.org/wiki/List_of_Intel_chipsets Have you tried inteltool -g -G? Regards Ranga From: Justin Dong-Il Lee