It's patch cleanup time again. This cleanup was last done almost 2
years ago, so there are a lot of old patches that haven't been touched
in a while.
Next week I'm going to abandon all of the open patches that haven't
been touched in over 18 months.
The list of roughly 250 patches to be
For anyone who doesn't understand what Patrick is referring to, any
comments made in for a file need to be marked as resolved before the
patches can be submitted now. Top level comments made with the
"Reply" button and saying something nice, do not need to be resolved
To see what comments need
I'd check the smbus base address right before the FSP starts with and
without your change. If it's only set with your change, then try
clearing it before calling the FSP.
See what the BAR is after the FSP runs, and make sure that the address
coreboot is using is the same. The early FSPs had a
Attendees:
==
Patrick, Matt, Stefan, Arthur, David, Felix, Ron, Philipp, Martin,
Michal (3mdeb)
Topics:
===
### New feature enablement with gerrit 3.0?
*
[https://twitter.com/GerritReview/status/1128687067217768448](https://twitter.com/GerritReview/status/1128687067217768448)
On Thu, May 23, 2019 at 7:13 PM Julius Werner wrote:
>
> ...
> In general I think it's fine if you discuss things on the call as they
> come up, but if you notice that it's something that would interest the
> community at large (e.g. proposed style changes) it would be nice if
> you could
coreboot leadership meeting notes are now public:
https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkKrgKjeDQ/edit#heading=h.j7tqwova2640
Anyone interested in joining the leadership meetings in the future can
check the calendar on the coreboot website for call-in information.
Hi Chris,
I'll get my public key uploaded to the website shortly. Thanks for
pointing out the issue.
Martin
On Tue, May 14, 2019 at 12:34 PM Chris Laprise wrote:
> Hi all,
>
> I'm about to embark on a coreboot build+flash per Mike Banon's G505s
> page, but before building I want to verify
require
bugfixes, or would adding new features to the chip be expected? Or
even just reviews of code affecting their chip?
Martin
On Wed, May 1, 2019 at 10:01 AM Peter Stuge wrote:
>
> Martin Roth wrote:
> > I'd like to discuss the issue of what's expected from developers after
>
I'd like to discuss the issue of what's expected from developers after
code is added to the coreboot tree. It seems like there's a feeling
that if a company pushes code to coreboot, or hires someone to push
code to coreboot that there's an obligation to help maintain that code
going forward.
--
24 April 2019 meeting minutes
--
Attendees: StefanR, WernerZ, PatrickG, MartinR, MattD, Dhendricks,
FelixH, PhilippD, Jay Trivedi, Aheymans
Hello all,
In recent months, Marc Jones, a longtime contributor and leader in
the coreboot community, hasn't been able to participate as much as he
has wanted to, and is opening up his leadership position for someone
who is better able to focus on it. The coreboot leadership is looking
for a
Hi Alex,
I think that porting the gigabyte platform could be at least part of
a GSOC project. The port by itself probably wouldn't be enough to be
considered a full project, since much of the work can already be done
automatically by autoport.
I'd probably discourage the HP port due to the age
Attendees: Julius Werner, Patrick Georgi, Martin Roth, Stefan
Reinauer, Werner Zeh, Philipp Deppenwiese
Make the coreboot leadership process more open
- We need to start posting the meeting minutes to the mailing list again.
- Discussed whether to make the coreboot leadership meeting public
I don't think the issue was ever fully debugged.
On Thu, Sep 13, 2018 at 7:05 AM Jorge Fernandez Monteagudo
wrote:
>
> Hi,
>
>
> Anybody could give me more info about this message I've seen in:
>
>
> https://www.coreboot.org/Board:amd/parmer
>
>
> at the end you can see:
>
>
> Other issues
>
>
coreboot now has nightly static analysis using scan-build:
https://www.coreboot.org/scan-build/
We aren't currently keeping any sort of metrics or making a global
list of all errors, we're just publishing the output for the
individual boards.
coreboot also runs bi-weekly scans using coverity's
On Thu, Jun 14, 2018 at 12:35 PM Leah Rowe wrote:
> On 14/06/18 19:01, Martin Roth wrote:
> > * The wiki requires a separate login from everything else, which
> > has to be created manually.
> Not only that, but it wasn't clear how to get an account in the first
> pla
I feel like we've discussed this a number of times, but maybe it
hasn't happened completely in open forums where everyone involved can
see it. If that's the case, I apologize.
This isn't really a decision that can just be voted upon and if enough
people want to keep the wiki, the direction would
Just a reminder that we're going to do the release in on May 15, 8 days
from now, and we need help with the release notes. I've started them at
https://pads.ccc.de/yGXyCFe7g7 and have added a list of commits to the
bottom of the document for reference.
If you have a favorite commit, or feel that
The coreboot 4.8 release is planned for May 15. That's the day that we'll
choose the commit to base the release on and create the release tag in
git. The tarballs will be available on the website shortly afterwards.
For anyone who feels like contributing to the release notes, you can work
on
Release notes for 4.7 are published in the download section of coreboot,
alongside the releases [1]. If you
mean a blog post, I agree, I didn't do one of those for 4.7.
As far as the panic about boards getting removed, while it would be good to
remove UNUSED boards
from the current master
Hi T.mike,
You're correct that this check is installed as part of 'make gitconfig'.
The code that's installed is in util/gitconfig/precommit. For time
reasons, not all of the tests that are run on the server are run in this
script
To run all of the checks that are run on the server locally,
the normal/production payload is a
> Linux kernel.
>
>
>
> Thanks,
>
>
>
> - Jay
>
>
>
> *From:* coreboot [mailto:coreboot-boun...@coreboot.org] *On Behalf Of *Martin
> Roth
> *Sent:* Monday, March 12, 2018 10:18 AM
> *To:* Jay Talbott
> *Cc:* corebo
Hi Jay,
Are they using the coreboot version of memtest86plus?
What commit is being built?
What version of GCC?
Building with GCC 7.3.0 from the latest commit at
review.coreboot.org/memtest86plus, I do get one warning that should be
cleaned up, but it builds fine. The errors you posted look
coreboot uses the site-local directory to allow users to extend the
coreboot build outside of the regular coreboot coreboot files.
Create the coreboot/site-local directory, and add Makefile.inc and Kconfig
files. Both of these files will get picked up by coreboot.
To run steps at the start of
r cancelled ? If delayed, what's the
> blocking issue ?
>
> Thanks,
> Youness.
>
> On Wed, Oct 4, 2017 at 11:24 AM, Martin Roth <gauml...@gmail.com> wrote:
>> The release will happen towards the end of the month. Generally I
>> try to have the release sched
I've got a supermicro H8SCM board, although I don't think I've ever tried
to boot it, so I don't know its state. I also suspect that it's got a
family 10h processor, not a fam15.
I can try to get it set up this weekend, and I can bring it to the
conference with me if that would help.
Here's the
The release will happen towards the end of the month. Generally I
try to have the release scheduled a bit before the month ends so
there's a little room to slip. I'll sit down this weekend and start
sorting out where we are and send out another email with release
plans.
If there are any bugs in
I'd say that it doesn't make sense to require that coreboot builds
with anything other than the coreboot toolchain.
Additionally, It isn't reasonable to introduce a new requirement this
close to the release.
Martin
On Wed, Sep 20, 2017 at 12:17 AM, Paul Menzel
Hi Tirumalesh,
The patch for the main code is here: https://review.coreboot.org/#/c/20861/
SOC code:
https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/denverton_ns
The only board that uses it right now is the CRB:
https://review.coreboot.org/#/c/20862/
Mainboard code:
Hi Tirumalesh,
Coreboot does support c2000 - "Rangeley", and there are patches in
review for c3000 currently.
Martin
On Tue, Sep 12, 2017 at 2:48 PM, Tirumalesh wrote:
> Hi,
>
> I am new to coreboot, could someone help me understand
>
> 1. Does coreboot support atom
Last week's meeting was another quick meeting, so the suggestion was
made to switch from bi-weekly to monthly (every 4 weeks). The next
meeting will bee Thursday, September 14. Check the calendar to find
the meeting in your timezone:. https://coreboot.org/calendar
We'd also like to see if we
It's patch cleanup time again.
Next week I'm going to abandon all of the open patches that haven't been
touched in over 18 months.
The list of 35 patches to be abandoned is here:
https://review.coreboot.org/#/q/status:open+before:2016-02-15
As always, if there's anything that is still useful and
You can also find the microcode in the older FSP packages:
https://downloadmirror.intel.com/25063/eng/Baytrail_FSP_Gold4.tgz
M013067222D, M0130673321, M0130678815, M0130679901
Unfortunately, these files didn't make the transition into the new github
site.
The debug version of the FSP that's
We are currently looking for a volunteer to host the 2018 North American
coreboot conference.
The only real requirements for the location is that it's relatively close
to a major airport and that it can hold 30-50 people comfortably. From the
feedback we got after the Denver conference, it
There are numerous places in shell scripts where '~' doesn't expand to
match $HOME. I'd recommend putting the config in the coreboot directory
and setting the config file to './.seabiosconfig'.
If you really want it in your home directory, you can use
'$$HOME/.seabiosconfig'.
Martin
On Thu, Jun
We recently added the ability for anyone to submit a configuration for
the jenkins test builds. This will help us to build-test currently
untested configurations.
To add a new test configuration for jenkins, add a miniconfig for the
platform into the coreboot/configs directory. The
On Sat, Jun 10, 2017 at 4:33 AM, Paul Menzel wrote:
...
> Seeing the lack of manpower for AMD systems, I am concerned about
> two(?) solutions that need to be maintained. If the current experiment
> succeeds, there should be a roadmap how the current boards
Also, IIRC, the network drivers communicate with the ME (on some, if not
all versions of the ME) so there can be personal data (network SSIDs) saved
in your BIOS ROM. If you don't want these to be public, maybe you don't
want to post your ME binary.
Martin
On Sun, Jun 11, 2017 at 5:27 AM,
These are the minutes from yesterday's coreboot community meeting.
Information about the next meeting is at the bottom.
Today's meeting was very short again, with not much news due to a focus on
the Denver conference for the past couple of weeks. We had a total of 7
people attending.
We *DO* have coreboot lanyards this year!
https://drive.google.com/a/google.com/file/d/10_xsPK6JpZx8mRXtP3xkKz8TcfezW-m4SQ/view?usp=sharing
We will be able to register people at the door if they show up, but they're
going to be on their own for lunch, and they get no swag. So hopefully
everyone
Everyone who is attending the Denver conference should have gotten an
invoice from the Software Freedom Conservancy, and an email about the
conference from me.
If you are planning on attending and have not received these emails, please
let me know immediately so we can get you accounted for.
These are the minutes from yesterday's coreboot community meeting.
Information about the next meeting is at the bottom.
The meeting yesterday was very short, with only 5 people attending.
###
Thursday May 25, 2017
General
On Thu, May 25, 2017 at 11:58 AM, Timothy Pearson
wrote:
...
>> It's this a false positive? i.e. it's a problem with the test or
>> actually coreboot doesn't boot?
...
> I've been wondering if I should lower the debug level on the test stand
> for this particular
, May 25, 2017 at 9:20 PM, Juliana Rodrigues
<juliana.o...@gmail.com> wrote:
> Hey,
>
> It is a shame that I've learned about the conference just now.
> Plane tickets to Denver are too expensive atm.
>
> Juliana
>
> 2017-05-25 23:43 GMT-03:00 Martin Roth <gauml...@gmai
t;
>
>
> From: coreboot [mailto:coreboot-boun...@coreboot.org] On Behalf Of Martin
> Roth
> Sent: Friday, 3 February 2017 1:32 AM
> To: coreboot
> Subject: [coreboot] 2017 North American coreboot Conference
>
>
>
> We are happy to announce that the 2017 North Ame
Hi Benjamin,
Yes, coreboot does support the E3845 via the Intel FSP. Among other
boards, it's used in the Minnowboard turbot, which is supported in
src/mainboards/intel/minnowmax
Information about the Baytrail FSP can be found here:
northbridge/intel/i440bx
Here's an example of Arthur Heymans fixing intel/pineview:
https://review.coreboot.org/19414
Here's Damien Zammit updating intel/x4x:
https://review.coreboot.org/13131
Martin
On Fri, May 12, 2017 at 10:33 AM, Peter Stuge <pe...@stuge.se> wrote:
> Martin Roth wrot
These are the minutes from today's coreboot community meeting.
Information about the next meeting is at the bottom.
###
Thursday, May 11, 2017
General coreboot news & discussions
* The coreboot 4.6 release is done.
-
Along with the latest coreboot release, coreboot announced some standards
for removing platforms after upcoming releases.
Summary:
* After the 4.7 release platforms that do not support cbmem in romstage
will be removed. Please see the list of platforms to be removed if no work
is done to update
These are the minutes from today's coreboot community meeting.
Information about the next meeting is at the bottom.
###
Thursday, April 27, 2017
General coreboot news & discussions
* 4.6 release delayed? - It will happen this
Hi Dhanasekar,
You built a BIOS for Mohon Peak, and it's not running on QEMU? I
wouldn't expect that to work. That's why we have the coreboot builds
that are specifically for QEMU. You wouldn't expect to be able to pull
the BIOS off of one board, drop it onto another board and have it
work,
https://www.coreboot.org/Denver2017
The North American coreboot conference is in Denver Colorado, USA this
year on June 5 - 6, with an extra day on the 7th for hacking and to
work on upstream coreboot. That's just under two months from now.
Registration
---
The prices are:
-
Here are the meeting minutes from yesterday's coreboot community meeting.
Info about the next meeting (Thursday, April 13) is at the bottom.
###
Thursday, March 30th, 2017
General coreboot news & discussions
* AGESA updates by
nd add SMU firmware to
> be consumed by fanless OPNs.
>
> Change-Id: I1c9b5ded6b494fac1553cc2ec7756a7a47386ecf
> Signed-off-by: Marshall Dawson <marshalldawson...@gmail.com>
> Reviewed-on: https://review.coreboot.org/18988
> Tested-by: build bot (Jenkins)
>
d not find fast boot cache area
> FSP MRC cache not present.
>
> Thanks,
> Sibi
>
> -Original Message-
> From: Martin Roth [mailto:gauml...@gmail.com]
> Sent: Friday, March 24, 2017 9:13 PM
> To: Rajasekaran, Sibi <sibi_rajaseka...@dell.com>
> Cc: Ma
Hi Nico,
I think that's a great idea, and I'll see what I can set up.
We can search the commit message for "no functional changes" or
"binary-stable" and then run a build of the previous commit as well as
the current commit, then compare the checksums for each build to make
sure they match.
As I recall, the rangeley FSP actually *REQUIRES* the mrc cache. Not
having it would be a definite problem.
Did you select "Use MRC Cache in FMAP"? If you did, that puts it
outside of cbfs, so it wouldn't show up in that list.
Are you working from upstream coreboot, or a tree from somewhere
I think you want ifdtool -n
-n | --newlayout update regions using a flashrom layout file
Martin
On Thu, Mar 23, 2017 at 3:03 PM, ron minnich wrote:
> the minnowmax has nested firmware volumes. We'd like to rearrange things now
> that the wonderful mecleaner has
Hi Kory,
I'm not sure what the proprietary software is, but you're going to
want to use flashrom or a hardware flash tool instead of the
proprietary software to flash the ROM.
https://www.flashrom.org/Flashrom
And just since it always needs to be said:
You need to make sure you have a backup
> P.S. I notice you replied to me individually rather than to the list.
> If that was not intentional, please feel free to CC the list in your
> reply :)
>
>
> On 21/03/2017, Martin Roth <gauml...@gmail.com> wrote:
>> Well, ultimately, we'd like to have every board in the
So from the start, I just want to say that I'm not arguing just to
argue - I want to make sure we pick the correct license here. I'm not
really opposed to BY-SA, but I'm not sure I see the benefit to saying
that coreboot's documentation can only be shared under that particular
version of that
Hey Sam. You're absolutely right, and I appreciate you pointing this
out. We need to get this fixed. Actually, as part of coreboot
joining the Software Freedom Conservancy, our documentation NEEDS an
open license of one sort or another.
Is there a reason we shouldn't switch to CC BY 4.0?
- Do
Most of our current automated testing is just build testing, although
we're working to expand that. The boot testing we DO have doesn't
currently include any boards with an ME - they're currently all boards
that don't require any blobs.
Martin
On Tue, Mar 21, 2017 at 10:12 AM, Sam Kuper
Hi Gert, Yes, it's possible.
In the coreboot payload menu, select
"[ ] Add a PXE ROM"
This opens up a new menu
"PXE Options --->"
In that menu, the top option is:
"PXE ROM to use (Add an existing PXE ROM image) --->"
select that, and switch to
"( ) Build and add an iPXE ROM"
Select the
Additionally, the meeting software needs to work well for everyone,
pretty much anywhere in the world. The coreboot community is an
amazingly diverse group. So the meeting method needs to have a way to
work well in pretty much any OS you can think of, or there needs to be
an alternate method of
Here are the meeting minutes of yesterday's coreboot community meeting.
Info about the next meeting (March 31) is at the bottom.
##
# Thursday, March 16, 2017
General coreboot news & discussions
* Next coreboot release - 4.6 -
The meeting is happening in 20 minutes.
https://bluejeans.com/616384323
Phone bridge call in numbers: https://www.bluejeans.com/numbers
Meeting ID: 616384323
Current agenda & history:
https://coreboot-meeting.pads.ccc.de/CommunityMeetingTopics
Martin
On Thu, Mar 16, 2017 at 1:28 AM, Paul
Hey, I'm not sure if people pay much attention to these, but you can
safely ignore these issues. I'm not even seeing them show up as
issues inside coverity, so I'm not sure why they are presented here.
1) These issues are in the chromeec codebase, not the coreboot
codebase. We've marked them as
Mainly we're using proprietary software because it works better than
the open source alternatives we tried.
We wanted to use the open source solutions, and tried a number of
options in the months since the CCM started. They all had serious
issues with people not being able to hear one another.
that's
easy to work with.
Would that work for you?
Martin
On Fri, Mar 3, 2017 at 3:03 AM, taii...@gmx.com <taii...@gmx.com> wrote:
> On 03/03/2017 01:45 AM, Martin Roth wrote:
>
> As brought up in the previous coreboot community meeting, the coreboot
>> project
>
sking for too much, don't I? ;-)
>
> (anyway, it is too late)
>
> Zoran
> ___
>
> On 3/3/17, Martin Roth <gauml...@gmail.com> wrote:
> > As brought up in the previous coreboot community meeting, the coreboot
> > project
> > is discussing the idea of
As brought up in the previous coreboot community meeting, the coreboot project
is discussing the idea of switching from the mailing list to a forum. This
idea did not originate with the coreboot leadership, but from a request by
members of the community.
I know many people have some strong
Here are the meeting minutes of today's coreboot community meeting.
Info about the next meeting (March 16) is at the bottom.
##
# Thursday, March 2nd, 2017
General coreboot news & discussions
* coreboot was not accepted for GSoC
ere:
>>
>> https://www.raptorengineering.com/coreboot/kgpe-d16-bmc-port-offer.php
>>
>> If you would like to see this happen, please contact Martin Roth at
>> gauml...@gmail.com to make a pledge to this community-driven
>> crowdfunding campaign.
>>
>> Thanks
As brought up in the last coreboot community meeting, the coreboot project
is discussing the idea of switching from the mailing list to a forum. This
idea did not originate with the coreboot leadership, but from a request by
members of the community.
I know many people have some strong feelings
that on
> some platforms even LOG_ERROR spews uninteresting spam right now, but we
> should probably consider that a bug with the code that does so instead.)
>
> On Fri, Feb 24, 2017 at 2:05 PM, Martin Roth <gauml...@gmail.com> wrote:
>
>> Hi Paul,
>> I agree
Hi Paul,
I agree that it seems reasonable to always print the banner to the
console. My recommendation is that we don't even add it as an option. If
there's a console set up, write the banner to it.
As I recall from Sage's version of coreboot, they made this same change,
and printed it at
Hi Paul,
checkpatch is currently not a gating item in jenkins and should always
pass right now. The checkpatch build was added to jenkins to allow people
to see at the results of the console output for the patch without having to
download and run checkpatch themselves.
Unfortunately,
I believe that the only Xeon chips that are supported by coreboot are using
the FSP. These are the Broadwell-DE (Xeon D family) & Ivy Bridge Gladden
(E3-1125C / E3-1105C v2).
Not that they're high power, but the C2000 (Rangeley/Avaton) chips also use
the FSP, but don't have an ME. These are
Please, let's keep things calm and civil. There's no call for personal
attacks of this nature. Let's not create drama.
Thanks.
Martin
On Fri, Feb 17, 2017 at 6:24 PM, taii...@gmx.com wrote:
> This is a product that doesn't exist yet and that may not ever exist at
> all.
>
>
Here are the meeting minutes of today's coreboot community meeting.
Info about the next meeting (March 2) is at the bottom.
##
General coreboot news
* coreboot is working on joining the Software Freedom Conservancy in a
fiscal
We are happy to announce that the 2017 North American coreboot Conference
will be held in Denver, Colorado on June 5th & 6th, with an optional
hacking day on June 7th.
Register here: https://goo.gl/o2j4gX
The cost will be $250 for corporate attendees, $100 for individuals, and
$25 for
I'm not really sure what's going on, and without a debug console, it's
kind of hard to tell.
Here are some random thoughts to give you ideas for what you might
want to try next:
Does the system boot up otherwise? Is it possible to ssh into it to
get the log out with the cbmem utility? That
Using your ROM, I'm getting USB keyboard in both grub and linux.
You might try setting SeaBIOS's usb-time-sigatt to something higher
than 100: https://www.seabios.org/Runtime_config
"The USB2 specification requires devices to signal that they are
attached within 100ms of the USB port being
Hi Maxim,
Try this: Remove all of the memory in the board except for one DIMM
in the slot furthest away from the processor. AGESA on this chip has
a requirement (that some vendors apparently worked around) that DIMMs
be populated from the furthest slot to the closest.
It looks like the code
Hey, I have this problem even on my W530 and W541 systems with the
vendor BIOS, so I don't think this is really coreboot related. I've
taken two steps to fix it :
1) I use thinkfan to max out the fan speed early and keep it there longer.
2) I limit the processor speed to its maximum normal speed
Adding onto what others have said:
The additional accesses you're seeing are the cbfs searches for
additional ROMS and configuration data.
I don't think that it would save much time if we cached the cbfs
locations and filenames, but it's possible that it might save a very
small amount. I doubt
Hey Merlin,
I was taking and keeping track of the pledges for Talos, so I'd be
happy to continue.
Martin
On Wed, Jan 18, 2017 at 7:15 PM, Merlin Büge wrote:
> Everyone,
>
>
>> We would like to see $20k USD from the community; we'll match (and
>> actually slightly exceed)
what happens with that.
Martin
On Mon, Dec 5, 2016 at 10:48 AM, Martin Roth <gauml...@gmail.com> wrote:
> Update:
> I've added coreboot's commitment to purchase a board and a processor
> to the crowdsupply site.
>
> Board: 3700
> Processor: 1240
>
> We've got $6,200
coreboot intends to update our toolchain soon, and we'd like to get it
thoroughly tested before we do, so we need everyone's help.
Please download the toolchain patch, build the new toolchain, then
build and test any boards you're working on with it. You can either
reply to this thread with your
processor.
Thanks to everyone who committed to supporting the purchase.
Martin
On Thu, Nov 10, 2016 at 10:36 AM, Martin Roth <gauml...@gmail.com> wrote:
> Update:
> We've got $4400 promised, with 7 contributors.
>
> On Mon, Nov 7, 2016 at 2:22 PM, Martin Roth <gauml...@gmail.com
I've been working on adding configs (miniconfigs) for abuild as well.
The plan is to have a coreboot/configs directory with all of the
configs there. Two alternatives that were discussed were
coreboot/configs/VENDOR/MAINBOARD and just putting the configs in the
existing
I've just completed another round of gerrit cleanup, abandoning a bunch of
patches that are older than 18 months. Here's a link to what was just
abandoned:
https://review.coreboot.org/#/q/status:abandoned+comment:%22Cleanup:+Abandoning+patches%22
I plan to do this again in another month,
Update:
We've got $4400 promised, with 7 contributors.
On Mon, Nov 7, 2016 at 2:22 PM, Martin Roth <gauml...@gmail.com> wrote:
> Update:
> After the weekend, we're up to $3700 with 5 contributors.
>
> Martin
>
> On Sun, Nov 6, 2016 at 1:01 PM, David Hendricks &l
one ?
>
>
> Thanks
>
>
> Pierre
> --
> *From:* coreboot <coreboot-boun...@coreboot.org> on behalf of Martin Roth
> <gauml...@gmail.com>
> *Sent:* Monday, November 7, 2016 10:22:26 PM
> *To:* David Hendricks
> *Cc:* Paul Menzel; co
Update:
After the weekend, we're up to $3700 with 5 contributors.
Martin
On Sun, Nov 6, 2016 at 1:01 PM, David Hendricks <david.hendri...@gmail.com>
wrote:
>
>
> On Fri, Nov 4, 2016 at 9:36 AM, Martin Roth <gauml...@gmail.com> wrote:
>
>> Is getting a Talos
gle Hangouts? It's got a web interface and native clients for
> Android and iOS. (I'm not sure if you still need a binary plug-in for
> Firefox, but at least Chromium can run it natively via WebRTC.)
>
> On Fri, Nov 4, 2016 at 11:33 AM, Martin Roth <gauml...@gmail.com> wrote:
>
We were thinking of switching to the mumble server that Chris Ching has set
up, but it doesn't seem to have any web client or way to work around that.
After looking at a number of solutions, I think the solution we'd like to
try at this point is Blue Jeans - bluejeans.com. It's actually a paid
Is getting a Talos workstation as a build server something that people are
interested in contributing money for?
So far, we've got $2500 pledged from two contributors out of the $7500
needed to get a server.
Please email me privately with your contributions, unless you really want
to make it
Hi Riko,
Make sure you have "Allow use of binary-only repository"
(CONFIG_USE_BLOBS) selected in kconfig. This is disabled by default for
people who don't want any blobs in their builds.
I've verified that the file exists in that location.
Martin
On Mon, Oct 24, 2016 at 8:40 PM, Riko Ho
101 - 200 of 318 matches
Mail list logo