Re: [coreboot] 16GB dimm on Sandy/Ivy Bridge status

Hi Iru, >From T420 manual [1]: "Memory: Up to 8GB DDR3 - 1333MHz (2 DIMM Slots)" While it seems possible to use 16GB (2x 8GB), it isn't possible to use 16GB DIMMs. I haven't tested by myself, but it seems like a hardware limitation. Please provide raminit logs, just to make sure. Regards,

Re: [coreboot] Debug builds and memory testing

To clarify. DDR3L is the correct one to use (I was wrongly using DDR3) From: Naveed Ghori Sent: Tuesday, 31 May 2016 12:45 PM To: 'Mayuri Tendulkar'; coreboot Subject: Re: Debug builds and memory testing I was using DDR3 instead of the low voltage DDR3L From: Mayuri Tendulkar

Re: [coreboot] Debug builds and memory testing

I was using DDR3 instead of the low voltage DDR3L From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 31 May 2016 12:40 PM To: Naveed Ghori; coreboot Subject: Re: Debug builds and memory testing How u resolved memory issue? From: coreboot

Re: [coreboot] Debug builds and memory testing

How u resolved memory issue? From: coreboot [mailto:coreboot-boun...@coreboot.org] On Behalf Of Naveed Ghori Sent: 31 May 2016 06:52 To: coreboot Subject: Re: [coreboot] Debug builds and memory testing To update this: There are option in the menuconfig to enable various

[coreboot] 16GB dimm on Sandy/Ivy Bridge status

Hi, I'm tesing to see if the coreboot Sandy/Ivy MRC supports 16GB DIMMs. Here's my result. I'm using a MT16KTF2G64HZ-1G6A1[1]. My machine is Lenovo T420 with i7-3630QM. With this module inserted (I've tested 16G+0 and 16G+8G), the system can light up, but it'll then get crashed. - with GRUB2

Re: [coreboot] Debug builds and memory testing

To update this: There are option in the menuconfig to enable various debugging options and logs. From: Naveed Ghori Sent: Tuesday, 24 May 2016 2:04 PM To: coreboot Subject: Debug builds and memory testing Hi all, Is there a debug build of coreboot or a way to test memory very early on. My

Re: [coreboot] ASUS KFSN4-DRE Automated Test Failure [master]

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 05/30/2016 09:19 AM, Raptor Engineering Automated Coreboot Test Stand wrote: > The ASUS KFSN4-DRE fails verification for branch master as of commit > 17163755075149f36c37458af0cb5f398d2a6766 > > The following tests failed: > VIDEO_FAILURE >

[coreboot] Core boot on a fujitsu laptop motherboard

Hello, I am trying to set up coreboot on a fujitsu laptop with the mother board title of: DAFH5BMB6G0 I am not sure what mother board manufacturere to chose from the 65 choices. There is none for fujitsu though. Best regards -- coreboot mailing list: coreboot@coreboot.org

[coreboot] ASUS KFSN4-DRE Automated Test Failure [master]

The ASUS KFSN4-DRE fails verification for branch master as of commit 17163755075149f36c37458af0cb5f398d2a6766 The following tests failed: VIDEO_FAILURE Commits since last successful test: 1716375 pcengines/apu1: Rename Kconfig variables for pinmux e084935 AMD/spi: Do not reset fifo after

[coreboot] SeaBIOS with native graphics initialization?

Hi all, I'm currently running Libreboot 20150518 on ThinkPad X200, but I'd like to switch to Coreboot (the newest stable version, 4.4). The reason is that Libreboot seems to provide only one configuration and its build system seems difficult to understand in comparison to Coreboot. I'd like

[coreboot] building a payload using libpayload and SDL

Hello , I wanna building a payload using the libpayload and SDL library . Can you help me ! thx ᐧ -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot