[coreboot] autoport

Hi phcoder, I'm trying to resolve a question that came up with inteltool & autoport regarding how the probing of graphics should behave. Stefanct kept having his board reboot when he was running autoport, so he added this change to separate out the graphics call as "unsafe" when probing all.

Re: [coreboot] What purpose the "mrc.cache"?

1) The MRC cache is a location for saving the state of the memory registers. These values are typically used to restore the memory controller state on resume from S3 suspend, or to help the system boot faster. On systems using the Rangeley FSP it is not optional as it is on some other platforms.

Re: [coreboot] SeaBIOS with native graphics initialization?

Thanks, does CONFIG_VGA_BIOS also need to be set in Coreboot config file? On 05/31/16 09:08, Gerd Hoffmann wrote: > Hi, > >> Is that possible using native graphics initialization without vgabios? >> There are some recent references that it's possible. > > CONFIG_VGA_COREBOOT=y in seabios. >

[coreboot] What purpose the "mrc.cache"?

Dear Sir. My ENV. Platform : intel atom rangeley mohon peak CRB(C2358) This time, I'm try to study for MRC(Memory Reference Code). But, I'm can not found a some example code on coreboot source tree.(rangely) Anyway, I'm get a some hint on last image. Performing operation on

Re: [coreboot] 16GB dimm on Sandy/Ivy Bridge status

On Tue, 31 May 2016 07:07:46 +0200 Patrick Rudolph wrote: > Hi Iru, > From T420 manual [1]: > "Memory: Up to 8GB DDR3 - 1333MHz (2 DIMM Slots)" > > While it seems possible to use 16GB (2x 8GB), it isn't possible to use > 16GB DIMMs. > I haven't tested by myself, but it seems

[coreboot] How to change config of SDRAM of intel mohonpeak EVB on coreboot?

Dear Sir. My own product must need a change the value(config) of sdram. Such as size, speed, and etc. So, I'm try to search and study the coreboot source code, and found out the "vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h" This header are contained the some structure for

Re: [coreboot] SeaBIOS with native graphics initialization?

On Di, 2016-05-31 at 15:35 +0200, Piotr Kubaj wrote: > Thanks, > > does CONFIG_VGA_BIOS also need to be set in Coreboot config file? Yes (or manually add the rom via cbfstool). But CONFIG_VGA_ROM_RUN must be "n". cheers, Gerd -- coreboot mailing list: coreboot@coreboot.org