[coreboot] KGPE-D16 Coreboot SR-IOV support?

Hey does this have SR-IOV support? I want to know before I get a card. - thanks -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] CPU Turbo [KGPE-D16]

y'all helpful as always >:D On 12/12/2016 03:00 PM, Timothy Pearson wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 12/11/2016 07:52 PM, taii...@gmx.com wrote: Thanks! helpful as always >:D Yes c states and cc6 states are enabled, 1 or 2 cores can get up to around 100mhz or so less

Re: [coreboot] post_code to text file

Thank you for the hint, I have 'installed' cbmem by making tthe appropriate menuconfig changes and in util/cbmem "$make LD_FLAGS=-static". Though (and I apologize for my nieve-ness) how exactly to I use the "$ cbmem -c" command, specifically wher exactly in boot/start up process should I call

Re: [coreboot] spd binaries

On Fri, Dec 16, 2016 at 11:01 AM, Pok Gu wrote: > Thaiphoon Burne is the most popular and probably the only tool for > modifying the spd.bin. It has many built-in templates and you only need to > select the speed, clocking, and voltage you like (e.g., DDR3-1688/DDR3-1333 >

Re: [coreboot] Offering Gigabyte GA-890FXA-UD5 for porting

Hi Renze, > I just received a message from Idwer Vollering that there is no > raminit code available yet. Since I am not at the level where I can > write raminit code without proper documentation (which isn't > available as well) I won't be able to port coreboot to your board. > Sorry! no

Re: [coreboot] spd binaries

Thaiphoon Burne is the most popular and probably the only tool for modifying the spd.bin. It has many built-in templates and you only need to select the speed, clocking, and voltage you like (e.g., DDR3-1688/DDR3-1333 and CL10/CL11 and 1.35V/1.5V) and it will do all the rest calculations and

Re: [coreboot] How to add a new SuperIO ?

it's way easier if you push your changes to gerrit marked as a WIP. People can see the code and will likely spot any problems very quickly. On Fri, Dec 16, 2016 at 12:40 AM Agrain Patrick < patrick.agr...@al-enterprise.com> wrote: > Hi all, > > I'm trying to add a new superIO chip to the source

Re: [coreboot] Offering Gigabyte GA-890FXA-UD5 for porting

Hello Merlin, I just received a message from Idwer Vollering that there is no raminit code available yet. Since I am not at the level where I can write raminit code without proper documentation (which isn't available as well) I won't be able to port coreboot to your board. Sorry! Hopefully you

Re: [coreboot] Offering Gigabyte GA-890FXA-UD5 for porting

Hi, Taiidan and Renze, thank you for your responses. On Fri, 16 Dec 2016 03:46:07 +0100 Renze Nicolai wrote: > I am interested in porting Coreboot to your GA-890FXA-UD5. > A month ago I succesfully ported coreboot to my MS-7721 > (FM2-A75MA-E35) motherboard and having a go at

Re: [coreboot] your preferred method for supplying power to chip for RPi spi flashing?

Peter Stuge wrote: > Michael Carbone wrote: >> I have been attempting to use a raspberry pi for spi flashing and when I >> use the 3.3v pin the raspberry pi doesn't power up as the chip draws too >> much power through the 3.3v pin for the raspberry pi to also run. > > It's not the flash chip

[coreboot] How to add a new SuperIO ?

Hi all, I'm trying to add a new superIO chip to the source tree. The chip is an EXAR XR28V932. I tried to take example of the existing superIO chips, like the i3100 and it8716 to compose a correct source tree as following: [agrain1@frilldlin059 coreboot]$ ls -als ./src/superio/exar/xr28v382/