Re: [coreboot] Broadwell-DE hang in coreboot: mp_init.c

Hi Mark. I saw a very similar issue (similar because I have not analyzed it in detail due to missing time) with a 6 core Broadwell-DE. It hangs as well in SMM relocation. Same mainboard and coreboot binary with a 4 core Broadwell-DE does not have this effect. Werner >Von: coreboot

Re: [coreboot] OpenBMC & KGPE-D16

No problems. It took me several patches but I think I better understand the coding style and project layout now, and tests are passing after a rebase of the code and responding to review feedback. Thanks all for taking the time to review and for putting up with the spam :) James On Mon, Feb 26,

[coreboot] Fw: Broadwell-DE hang in coreboot: mp_init.c

This was my original email, see below.  It has it's own topic.  Hopefully it may it's way to the mailer. On Monday, February 26, 2018 2:39 PM, mark pleso wrote: Has anyone else seen a hang during coreboot booting on a Broadwell-DE?  The issue appears to be in

Re: [coreboot] Atom c3000 Harcuvar and Intel ME

My questions are:1. has anyone else seen a hang during smm relocation, w/cb 4.6/4.7, on a Broadwell-DE?2. if so, is the wbinvd() a valid way to resolve the hang?3. should our wbinvd() fix be upstreamed, without fully understanding why it is needed? All of code (cb, fsp, microcode, etc.) worked

Re: [coreboot] Atom c3000 Harcuvar and Intel ME

Am Montag, den 26.02.2018, 17:14 -0300 schrieb Sumo: > Hi, > > In the coreboot build menu there is no option regarding the Intel ME > integration. > The 'coreboot.rom' file is the full SPI flash image or this file is > suitable to > replace the BIOS region of the SPI flash

[coreboot] Broadwell-DE hang in coreboot: mp_init.c

Has anyone else seen a hang during coreboot booting on a Broadwell-DE?  The issue appears to be in mp_init.c, in the function smm_do_relocation().  This is coreboot 4.7, but I think the issue exists in 4.6 as well. Enabling the printk will stop the hang. Or, just adding a wbinvd() instruction

Re: [coreboot] Serial input / output with SeaBIOS 1.11.0

I didn't get it working with SeaBIOS' SERCON, but I just moved on to SgaBIOS. It turns out it's actually better for me than SERCON, because it provides serial redirection to the point where kernel takes over, while SERCON only provides till bootloader starts. That feature of SgaBIOS makes it

Re: [coreboot] OpenBMC & KGPE-D16

It's iKVM4. On 18-02-25 04:23:45, Timothy Pearson wrote: Actually that's quite odd -- it should not work that way. There is a hardware mux that is switched in when the module is installed; only the BMC can access the DRAM SPD lines without a BMC GPIO being set. Which module are you using, the

[coreboot] Atom c3000 Harcuvar and Intel ME

Hi, In the coreboot build menu there is no option regarding the Intel ME integration. The 'coreboot.rom' file is the full SPI flash image or this file is suitable to replace the BIOS region of the SPI flash (0x0080--0x00ff)? (i.e. in the SPI flash we already have a region for Intel ME

Re: [coreboot] OpenBMC & KGPE-D16

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Thank you! If you have questions during the process please feel free to ask. On 02/26/2018 04:53 AM, James Hebden wrote: > On Sun, Feb 25, 2018 at 04:25:23AM -0600, Timothy Pearson wrote: >> On 02/25/2018 02:18 AM, Mike Banon wrote: Any

Re: [coreboot] OpenBMC & KGPE-D16

On Sun, Feb 25, 2018 at 04:25:23AM -0600, Timothy Pearson wrote: > On 02/25/2018 02:18 AM, Mike Banon wrote: > >> Any particular reason those patches were not upstreamed? > > > > Because a person who submitted these patches did not fix some problems, > > I'm aware of this. Upstreaming was never