[coreboot] Re: What should we do about freenode IRC services?

o. AFAICT the vast majority of my channels has moved to libera. Some have not decided yet, and 0 went to OFTC. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an em

Re: [coreboot] 8 GB DIMMs on Nehalem (Arrandale)

h slot it is, things go crazy with the vendor firmware and the raminit code of coreboot stops in the middle as described earlier. So there is nothing obvious left to try regarding DIMM combinations in the T410s. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list:

Re: [coreboot] 8 GB DIMMs on Nehalem (Arrandale)

However, cpuid with an x86_64 kernel shows (assumably via the cpuid op and edx): physical address extensions= true But that does only indicate support not use of PAE... I don't see how this would be relevant to memtest or the 64-bit kernels anyway. -- Kind regards/Mit freundlichen G

Re: [coreboot] 8 GB DIMMs on Nehalem (Arrandale)

(unless someone has a suitable scope and the knowledge already... the best scope I have access to is an Agilent MSO6104A but no idea where to even start - and no interposer obviously) but you seem to imply that the 8GB problem is an analogous one... do you think about the 16 GB problem as well? --

Re: [coreboot] 8 GB DIMMs on Nehalem (Arrandale)

s the binaries are different of course), no? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] 8 GB DIMMs on Nehalem (Arrandale)

is actually exactly the same as in the X201 and T410s: Ibex Peak. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] 8 GB DIMMs on Nehalem (Arrandale)

manage to boot Linux with an 8 GB DIMM (dmesg is attached including the e820 map), but it is quite broken and memtest86 locks up or reboots within seconds so that's probably not a good target for RE efforts. :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner [0.00] Initializing cgroup

[coreboot] Lenovo T410s

. The DIMM in question does not work with the Lenovo firmware in the T410s and fails during memory training with coreboot. Is this futile and simply not supported on this hardware? Why and how to tell? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot

Re: [coreboot] [RFC] Explicitly use C89 (was: Setting C99 by default)

On Tue, 29 Nov 2016 09:09:48 +0100 Gerd Hoffmann <kra...@redhat.com> wrote: > On Di, 2016-11-29 at 00:41 +0100, Stefan Tauner wrote: > > Paul can you please - without looking it up - name two new features of > > C99 compared to C89? > > Named initializers. &g

Re: [coreboot] [RFC] Explicitly use C89 (was: Setting C99 by default)

Paul can you please - without looking it up - name two new features of C99 compared to C89? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] 16GB dimm on Sandy/Ivy Bridge status

the maximum. The question remains if a single channel can address the whole range but given that it does not make sense economically that point is rather moot anyway. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] autoport segfault on ibexpeak

On Wed, 4 May 2016 19:00:40 -0600 Trammell Hudson <hud...@trmm.net> wrote: > On Thu, May 05, 2016 at 01:14:28AM +0200, Stefan Tauner wrote: > > Felix suggested that inteltool -a might be the culprit... and I can > > confirm this. However, inteltool has worked without such i

Re: [coreboot] autoport segfault on ibexpeak

On Thu, 5 May 2016 00:14:36 +0200 Stefan Tauner <stefan.tau...@alumni.tuwien.ac.at> wrote: > 2) about a dozen or so seconds after running autoport my laptop > completely locks up. Any ideas why this might happen? Felix suggested that inteltool -a might be the culprit... and I

[coreboot] autoport segfault on ibexpeak

May 3 23:24 lspci.log -rw-r--r-- 1 root root160 May 3 23:24 pin_hwC0D0 -rw-r--r-- 1 root root 48 May 3 23:24 pin_hwC0D3 -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner Unsupported PCI device 8086:0044 Unsupported PCI device 8086:0046 Unsupported PCI device 8086:3b64 Unsupported

Re: [coreboot] A talk about coreboot

imilar talk in two weeks. Can I please re-use some of your stuff under a CC BY-SA license? https://creativecommons.org/licenses/by-sa/4.0/ -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] VT-d on samus proposal draft

lems do you expect to encounter? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] FlexICE github (was: Issue with internal access to the W39V040FB)

On Sat, 23 Jan 2016 17:51:27 +0100 Stefan Tauner <stefan.tau...@alumni.tuwien.ac.at> wrote: > On Sat, 23 Jan 2016 19:32:14 +0300 > Andrey Korolyov <and...@xdel.ru> wrote: > > > BTW, are there still any FWH-capable romulators in production? Looks > > like most

Re: [coreboot] ASRock IMB-A180-H (GfxSamuInit)

: http://review.coreboot.org/#/c/5361/ -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] memtest86 reading 0k memory

the discrepancy between the tables and that leads to problems downstream... but that's arguable. What is not arguable: some action is required. :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] ASRock IMB-A180-H

On Mon, 06 Apr 2015 07:22:12 +0300 Kyösti Mälkki kyosti.mal...@gmail.com wrote: On Mon, 2015-04-06 at 02:15 +0200, Stefan Tauner wrote: Hi, I am (finally) playing a bit with coreboot. Thanks to the excellent work of Kyösti with the BBB I have USB output in place. Unfortunately what I

[coreboot] ASRock IMB-A180-H

into it yet at all... but hints are welcome anyway :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [flashrom] New flashrom logo - fonts

On Fri, 13 Mar 2015 14:36:35 +0100 Stefan Tauner stefan.tau...@alumni.tuwien.ac.at wrote: On Fri, 13 Mar 2015 08:37:49 +0100 Carl-Daniel Hailfinger c-d.hailfinger.devel.2...@gmx.net wrote: On 11.03.2015 14:30, Stefan Tauner wrote: This will be the last poll that evaluates specific

Re: [coreboot] [flashrom] New flashrom logo - fonts

On Fri, 13 Mar 2015 08:37:49 +0100 Carl-Daniel Hailfinger c-d.hailfinger.devel.2...@gmx.net wrote: On 11.03.2015 14:30, Stefan Tauner wrote: This will be the last poll that evaluates specific features of the logo. There may be another one to determine the final design. I have selected

Re: [coreboot] [flashrom] New flashrom logo - fonts

anyway to get a better feeling about general preferences. http://epicdecide.com/ad3645e6-9a70-4cce-bd05-bf0e66e668e9/ On Sun, 8 Mar 2015 18:07:51 +0100 Stefan Tauner stefan.tau...@alumni.tuwien.ac.at wrote: Do you know what we haven't done in a long time? A poll! ;) This time it's all about

Re: [coreboot] [flashrom] New flashrom logo - flashes

: http://epicdecide.com/bac504d1-0061-46c4-ac7c-9beecaba87e0/ Colors: http://epicdecide.com/3dc56f58-59f9-4921-b048-4cb89b48a09b/ -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [flashrom] New flashrom logo - colors

On Thu, 05 Mar 2015 08:58:28 +0100 Carl-Daniel Hailfinger c-d.hailfinger.devel.2...@gmx.net wrote: On 05.03.2015 02:05, Stefan Tauner wrote: Thanks to everyone who has voted on the initial vote! Are the results available? Not publicly. Apparently one CAN look at every voter's result so I

Re: [coreboot] [flashrom] New flashrom logo - colors

be to make it completely yellow without colored outlines like so: http://buildbot.flashrom.org/poll-colors/yellow_icon.png What do you think? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [flashrom] New flashrom logo - please vote!

- it is a valid concern - but I draw the line not to cross elsewhere. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [flashrom] New flashrom logo - please vote!

additional comments are very much welcomed! If you think all of them are crap and you have some better ideas I'd like to hear them too :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [flashrom] New flashrom logo

on that idea I have created a lettering containing the SOIC chip and bolt. I doubt this would produce any confusion :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] New flashrom logo

regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] New flashrom logo

On Sun, 22 Feb 2015 02:26:19 +0100 Peter Stuge pe...@stuge.se wrote: Peter Stuge wrote: Stefan Tauner wrote: What do you think about my suggestions and the whole matter? soic8_30degrees is really good. I would only suggest to perhaps rotate clockwise around the X axis a little

Re: [coreboot] New flashrom logo

it to make the whole logo-project relation memorable... and I really think that a flash and a rom/chip qualifies to represent flashrom in such a way :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo

[coreboot] New flashrom logo

. I have not decided on an appropriate license... probably something similar to how the coreboot hare is licensed. What do you think about my suggestions and the whole matter? I would love to see proposals for alternatives as well! -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot

Re: [coreboot] Release Engineering (again)

for? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] GSoC 2015

everything is fine at this stage. Do you have a project idea already? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Plans for upcoming Broadwell Thinkpads

regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] How to edit coreboot wiki page

this page? By sending a message to the mailing list asking how you get the permission to edit that page ;) You should have got your login data by email now. If you have any questions regarding the wiki please post them here (or on IRC), thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

Re: [coreboot] coreboot hackaton/meeting in Prague - october 2014 - official date set

comes too, discuss/hack on flashrom of course. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Life hack #37: how to make a great touchpad

Alex, you have missed something very important here: 0: Look at any Chromebook, notice the lack of a trackpoint, facepalm :P -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Flash access on ASUS F2A85 variants

indeed have a problem. Can someone please send me the verbose output of flashrom to confirm which one it is? And I am also looking for testers with these boards, because I think the abort on SpiHostAccessRomEn is a bug in flashrom. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot

Re: [coreboot] [flashrom] flashrom-related GSoC 2014 project

of the proposals, so I would like to know before further discussions if this one even has a chance of getting selected/what the basic view of the mentors is regarding my projects. Maybe we can save everyone a bit of time by focussing on only one of the two. -- Kind regards/Mit freundlichen Grüßen, Stefan

Re: [coreboot] Changes to the coreboot Project Structure

freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] GSoC-2014 Coreboot project

about the goal and the test environment. Does not seem to be public. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [flashrom] flashrom-related GSoC 2014 project

Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [announce] coreboot for the 21st century

at all. :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] ARM Linux kernel payload (was: GSoC-2014 Coreboot project)

to see it finished. I've tested it - it works well at least in QEMU. A solution is still needed for ARM though. What are the problems there/what needs to be done? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org

[coreboot] flashrom-related GSoC 2014 project

-based PC somewhere that I could port... I'd need to build a parallel flasher for that first though (cortex m3 board and stuff already collecting dust...) but that would probably be based on serprog and peter would veto for sure ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot

Re: [coreboot] new, need help and whatnot

mentioned and more here: http://flashrom.org/ISP -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [flashrom] Enabling Dediprog by default in flashrom

, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [x60s] Its alive! Its alive!

On Wed, 26 Jun 2013 15:59:54 -0700 Aaron Durbin adur...@chromium.org wrote: On Wed, Jun 26, 2013 at 3:58 PM, Stefan Tauner stefan.tau...@student.tuwien.ac.at wrote: One thing he did not mention is that cbmem seems to not work on his device. I don't know anything about cbmem but I looked

Re: [coreboot] [x60s] Its alive! Its alive!

for coreboot table at f Mapping 1MB of physical memory at 0xf. any ideas why this could happen? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Enabling Dediprog by default in flashrom

this fact noted in their datashets. So testing any apparently non-fast read chip does not suffice. We would rather be able to check the opcode on the SPI bus with a logic analyzer directly. Are there any Dediprog users who can help us with that please? -- Kind regards/Mit freundlichen Grüßen, Stefan

[coreboot] Looking for dediprog users...

better? I would also like to know if any dediprog sf300 or sf600 users are reading this and would like to see support for it in flashrom. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] fixed AMD SPI speed settings (leading to problems on E350M1/USB3)

with the frequency set by NormSpeed? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Summer project

mean with challenging :) http://www.coreboot.org/Datasheets#Intel http://lennartb.home.xs4all.nl/coreboot/coreboot.html -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Wiki cleanup (was: Request to become wiki admin)

On Wed, 3 Apr 2013 22:23:45 +0200 Stefan Reinauer stefan.reina...@coreboot.org wrote: * Stefan Tauner stefan.tau...@student.tuwien.ac.at [130402 16:50]: please make Patrick and me (or at least him :) a (coreboot) wiki admin so that we can delete obsolete pages, thanks. Hi Stefan! done

[coreboot] Request to become wiki admin

Hi, please make Patrick and me (or at least him :) a (coreboot) wiki admin so that we can delete obsolete pages, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Git

for everybody to debug this interactively, so feel free to join IRC for example via the webchat: http://webchat.freenode.net/?channels=corebootuio=d4 -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo

Re: [coreboot] coreboot 2013 Google Summer of Code: Call for mentors and project ideas

, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] IMC on persimmon (was: Flashrom erase failure)

-working external flash programmer), I can not help you further ATM. -Original Message- From: Stefan Tauner [mailto:stefan.tau...@student.tuwien.ac.at] Sent: Friday, March 01, 2013 12:09 PM To: Racine, Michel Cc: flash...@flashrom.org Subject: Re: [flashrom] Flashrom erase failure

[coreboot] Off-topic: what's a fast, easily accessible I/O (pin)?

be minimal, but without major hardware hacks (no soldering to CPU pins or similar please :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] First ROM Image

technique to create backups. To do this you boot with a known-good chip, swap it for an empty one after boot and write to that one instead for experiments etc. It is usually a good idea to clearly mark the backup chip(s) ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot

Re: [coreboot] [flashrom] (help me to get better) flashrom support for thinkpads with locked down opcodes

On Mon, 27 Aug 2012 06:18:53 +0200 Stefan Reinauer stefan.reina...@coreboot.org wrote: * Stefan Tauner stefan.tau...@student.tuwien.ac.at [120826 21:31]: As you probably all know the procedure to relieve the coreboot- supported thinkpads from their proprietary firmware is not completely

[coreboot] (help me to get better) flashrom support for thinkpads with locked down opcodes

, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [flashrom] Support for IBM/Lenovo Thinkpad T60 Flash

into flashrom in the coreboot-wiki: http://www.coreboot.org/Lenovo_x60x -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Intel SCH CMC(Chipset Microcode) state machine binary?

to parts of the flash only. but of course calculation + dd is the better way to do this, especially if the data is on disk and not on a flash chip ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo

Re: [coreboot] flash-chip (and compatibles)

with other vendors. if you have found an offer that suits you, you could ask us again... -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] new coreboot twitter account

)... just in case. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] SPI flashing

are talking about S3 here i guess? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] looking for coreboot snapshots

/gitweb?p=coreboot.git;a=summary -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [RFC] usb flashing protocol (was: cheapish and free usb spi flashing device)

of which are (probably) already implemented in flashrom in one form or another while others might be useful to have in there and have been discussed or at least thought through already by someone. so feel free to contribute please. ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

Re: [coreboot] [RFC] cheapish and free usb spi flashing device

be a problem either. BUT.. since there is not really interest in _my_ new flasher anyway and everyone seem to have built his own, i think we should just concentrate on the usb protocol. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http

[coreboot] [RFC] cheapish and free usb spi flashing device

operation. this way one could clone chips easily without a pc, but i am not sure at all if thats worth it. what do you think? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot