[coreboot] [coreboot - Feature #500] coreboot bootsplash only supports jpeg and does not support extended resolutions

2023-07-14 Thread Thierry Laurion
Issue #500 has been updated by Thierry Laurion. This is fixed with https://review.coreboot.org/c/coreboot/+/76424 Tested with native 1366x768 resolution under x230 and 1024x768 referred jpeg about created following https://puri.sm/posts/librem-13-coreboot-report-february-25th-2017/ guide

[coreboot] [coreboot - Bug #500] libgfxinit bootsplash only supports jpeg and does not support extended resolutions

2023-07-13 Thread Thierry Laurion
Issue #500 has been updated by Thierry Laurion. icon says >needs to use `bytes_per_line / 4` instead of `x_resolution` when calculating >the address from snippet above. Will try again tomorrow. Bug #500: libgfxinit bootsplash only support

[coreboot] [coreboot - Bug #500] libgfxinit bootsplash only supports jpeg and does not support extended resolutions

2023-07-13 Thread Thierry Laurion
Issue #500 has been updated by Thierry Laurion. File signal-2023-07-13-171801.jpeg added File signal-2023-07-13-171757.jpeg added Here are screen tearing when under native 1366x768. bootsplash and fbwhiptail output Bug #500: libgfxinit bootsplash only

[coreboot] [coreboot - Bug #500] libgfxinit bootsplash only supports jpeg and does not support extended resolutions

2023-07-13 Thread Thierry Laurion
Issue #500 has been updated by Thierry Laurion. https://paste.debian.net/1285804/ was proposed by alpernebbi This created the same rear tearing I observed with fbwhiptail at the moment of drawing bootsplash then when trying to draw to fb when not under 1024x768. My coreboot config changed

[coreboot] [coreboot - Bug #500] (New) libgfxinit bootsplash only supports jpeg and does not support extended resolutions

2023-07-13 Thread Thierry Laurion
Issue #500 has been reported by Thierry Laurion. Bug #500: libgfxinit bootsplash only supports jpeg and does not support extended resolutions https://ticket.coreboot.org/issues/500 * Author: Thierry Laurion * Status: New * Priority: Normal * Assignee

[coreboot] [coreboot - Bug #456] coreboot 4.19 tarballs have bad timestamps

2023-02-15 Thread Thierry Laurion
Issue #456 has been updated by Thierry Laurion. % Done changed from 0 to 100 Bug #456: coreboot 4.19 tarballs have bad timestamps https://ticket.coreboot.org/issues/456#change-1420 * Author: Thierry Laurion * Status: Feedback * Priority: High * Category

[coreboot] [coreboot - Bug #456] coreboot 4.19 tarballs have bad timestamps

2023-02-15 Thread Thierry Laurion
Issue #456 has been updated by Thierry Laurion. Martin Roth wrote in #note-3: > New 4.19 tarballs have been pushed, but they use the same name. I updated > the release notes stating that they had been updated. > > I looked at changing the name, but to do that, the actual re

[coreboot] [coreboot - Bug #457] (New) Haswell (t440p): CAR memory region should not conflict with CBFS_SIZE > 8mb

2023-02-08 Thread Thierry Laurion
Issue #457 has been reported by Thierry Laurion. Bug #457: Haswell (t440p): CAR memory region should not conflict with CBFS_SIZE > 8mb https://ticket.coreboot.org/issues/457 * Author: Thierry Laurion * Status: New * Priority: Normal * Target vers

[coreboot] [coreboot - Bug #456] (New) coreboot 4.19 tarballs are unusable

2023-02-08 Thread Thierry Laurion
Issue #456 has been reported by Thierry Laurion. Bug #456: coreboot 4.19 tarballs are unusable https://ticket.coreboot.org/issues/456 * Author: Thierry Laurion * Status: New * Priority: High * Category: infrastructure * Target version: 4.19 * Start date

[coreboot] Add ivy bridge/ sandy bridge IFD and ME extracted blobs

2020-03-01 Thread Thierry Laurion
/issues/307#issuecomment-578524123 https://github.com/osresearch/heads/issues/307#issuecomment-552961256 https://github.com/osresearch/heads/issues/307#issuecomment-588264758 Thanks -- Thierry Laurion ___ coreboot mailing list -- coreboot@coreboot.org

[coreboot] Re: Final calls for S3 suspend support on amdfam10-15

2019-08-20 Thread Thierry Laurion - Insurgo Technologies Libres / Open Technologies
I could provide such resume logs for kgpe-d16. How do I produce them? On August 21, 2019 2:43:44 AM UTC, Matt B wrote: >Is a lack of C bootblock support common to all family 15h platforms? >(Including the G505s and any others?) >In other words, would it only need to be implemented once for all

Re: [coreboot] Asus KGPE-D16 non-working S3 suspend with Qubes 4

2018-12-10 Thread Thierry Laurion
ton results in what appears to be a fresh cold-boot. > > > > Does anyone know whether there is a specific coreboot/cmos option I > > could be missing or if it is a Qubes configuration issue? > > > > Kind regards, > > > > Pete > > > -- > Merlin Büge > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot > -- Thierry Laurion -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Schematics and PCB design for ASMB4 (Was: There are ASMB5's on fleabay right now for $30/ea (firmware storage module required for OpenBMC on the KGPE-D16/KCMA-D8))

2018-11-05 Thread Thierry Laurion
? :-) > > -- > Timothy Pearson > Raptor Engineering > +1 (415) 727-8645 (direct line) > +1 (512) 690-0200 (switchboard) > https://www.raptorengineering.com > > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot > -- Thierry Laurion -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] coreboot is going to make kcma-d8 obsolete

2018-04-06 Thread Thierry Laurion
I agree. This is wrong. Kgpe-d16 and alike are the last resorts for x86 blob free hardware. This NEEDS to be kept maintained and upstreamed. Le ven. 6 avr. 2018 18:41, taii...@gmx.com a écrit : > Like I have said before these types of policies are eventually going to > result

Re: [coreboot] Server systems shipped with coreboot

2018-03-25 Thread Thierry Laurion
Le dim. 25 mars 2018 14:08, taii...@gmx.com a écrit : > On 03/25/2018 11:12 AM, thierry.laur...@gmail.com wrote: > > > For the KGPE-D16, an integration effort was made in Heads to support > > such board. > > > > https://github.com/osresearch/heads/issues/134 > > > > * OpenBMC

Re: [coreboot] Server systems shipped with coreboot

2018-03-25 Thread thierry . laurion
Sorry for the previous mistypings. Redoing this mail properly. On 03/24/2018 07:41 PM, Thierry Laurion wrote: > Hi all, > > Le ven. 23 mars 2018 13:56, <tpear...@raptorengineering.com <mailto:tpear...@raptorengineering.com>> a écrit : > > I am not a lawyer,

Re: [coreboot] Server systems shipped with coreboot

2018-03-25 Thread thierry . laurion
On 03/23/2018 05:22 PM, taii...@gmx.com wrote: > Please also keep in mind that it is impossible to disable ME. That is not a binary yes/no fact. Depending of the ME version, it is possible to deactivate it. The following x230 is not a server, but an example for older ME versions. The resulting

Re: [coreboot] Server systems shipped with coreboot

2018-03-25 Thread thierry . laurion
For the KGPE-D16, an integration effort was made in Heads to support such board. https://github.com/osresearch/heads/issues/134 * OpenBMC support merged into coreboot so the server can boot * Flashrom support to flash OpenBMC directly from within Heads * Flashrom support to reflash Heads

Re: [coreboot] Server systems shipped with coreboot

2018-03-24 Thread Thierry Laurion
Hi all, Le ven. 23 mars 2018 13:56, a écrit : > I am not a lawyer, but have some understanding of the relevant liability > law. This is not legal advice. > > If damage is cause to the hardware that the ME would have prevented, very > likely. Damage orevrntrd by

Re: [coreboot] Server systems shipped with coreboot

2018-03-23 Thread Thierry Laurion
Hi all, Searching legal implications of reselling deblobbed hardware, and can't fight straight answers. If the bios is replaced, and ME is disabled with its modules erased, could the maker pursue the seller for having made those modifications? Thanks, Thierry Le mar. 23 janv. 2018 13:56,

Re: [coreboot] OpenBMC & KGPE-D16

2018-02-24 Thread Thierry Laurion
Any particular reason those patches were not upstreamed? Le ven. 23 févr. 2018 21:40, Thierry Laurion <thierry.laur...@gmail.com> a écrit : > Timothys patches were mot included un coreboot > https://review.coreboot.org/#/c/coreboot/+/19822/ > > Le ven. 23 févr. 2018 17:40, El

Re: [coreboot] OpenBMC & KGPE-D16

2018-02-24 Thread Thierry Laurion
Timothys patches were mot included un coreboot https://review.coreboot.org/#/c/coreboot/+/19822/ Le ven. 23 févr. 2018 17:40, Elisenda Cuadros a écrit : > Hello, > > Thank you for your reply. > > I reflashed (same build) the BMC module with a hotplug. Now it works > like a charm,

Re: [coreboot] OpenBMC & KGPE-D16

2018-02-23 Thread Thierry Laurion
Better here, sorry. https://github.com/osresearch/heads/issues/134 Le ven. 23 févr. 2018 00:26, Thierry Laurion <thierry.laur...@gmail.com> a écrit : > Actually if others of you want to contribute, there is this heads kgpe-d16 > port that permits to flash directly from the heads core

Re: [coreboot] OpenBMC & KGPE-D16

2018-02-22 Thread Thierry Laurion
Actually if others of you want to contribute, there is this heads kgpe-d16 port that permits to flash directly from the heads coreboot payload with Timothy's patches on the flashrom tools. You may want to take a look here : https://github.com/flammit/heads/pull/9#issuecomment-362022411 Le jeu. 22

Re: [coreboot] KGPE-D16 AMD-vi fails because combined sata is enabled

2017-11-05 Thread Thierry Laurion
ult value. > > > > Am Fr., 3. Nov. 2017 um 04:56 Uhr schrieb Thierry Laurion < > thierry.laur...@gmail.com>: > >> As I understand the code, KGPE-d16 doesn't use AGESA part (nor any?). >> >> Any reason why this value would be defaulting to enabled for whole sb700

Re: [coreboot] KGPE-D16 AMD-vi fails because combined sata is enabled

2017-11-02 Thread Thierry Laurion
UINT32 SataReserved1 :6; //17:12, Not used currently UINT32 SataEspPort :6; //23:18 SATA port is external accessiable on a signal only connector (eSATA:) Le jeu. 2 nov. 2017 à 09:33, Peter Stuge <pe...@stuge.se> a écrit : > Thierr

[coreboot] KGPE-D16 AMD-vi fails because combined sata is enabled

2017-11-01 Thread Thierry Laurion
Xen error: (XEN) AMD-Vi: SP5100 erratum 28 detected, disabling IOMMU. (XEN) If possible, disable SATA Combined mode in BIOS or contact your vendor for BIOS update. (XEN) AMD-Vi: Error initialization (XEN) I/O virtualisation disabled -but HAP is working, (XEN) HVM: SVM enabled (XEN) HVM: Hardware

Re: [coreboot] KGPE-D16/KCMA-D8 TPM support?

2017-10-07 Thread Thierry Laurion
Any input on TPM since that post? I am planning on beginning to work on heads KGPE-D16 heads support, server/workstation on which Qubes v4 actually works. Initialisation of TPM throws errors on from Qubes, but it isn't owned yet, and haven't played with it yet. Bought this

Re: [coreboot] Recommended memory for coreboot + ASUS KGPE-D16

2017-05-09 Thread Thierry Laurion
Hi, On 04/30/2017 04:46 PM, taii...@gmx.com wrote: > On 04/30/2017 08:05 AM, BogDan Vatra wrote: > >> Hi, >> >> I'd like to build desktop/workstation for my personal use (lots of >> compilations + of course gaming on linux) >> I bought 2 x 6276 CPUs and a KGPE-D16, eprom programmer, etc. now I'm

Re: [coreboot] ThinkPad X230 alternative flash chips?

2017-04-15 Thread Thierry Laurion
In fact, all the 7mb is now available. Check that out! https://github.com/osresearch/heads/releases/tag/v0.2.0 Le ven. 14 avr. 2017 à 23:38, Thierry Laurion <thierry.laur...@gmail.com> a écrit : > The x230 has two rom chips. One that has 4mb that boots the system, and > one

Re: [coreboot] ThinkPad X230 alternative flash chips?

2017-04-14 Thread Thierry Laurion
The x230 has two rom chips. One that has 4mb that boots the system, and one that is 8mb that holds ME. http://osresearch.net/ planned on using freed space in the ME after deactivating it, but I haven't seen usage of that freed space yet. Le ven. 14 avr. 2017 à 21:15, Marek Behun

Re: [coreboot] coreboot ported to the ASUS KGPE-D16 (Libreboot: blobless, fully functional!)

2015-10-16 Thread Thierry Laurion
researchers only use such board and secure platforms. Cheers, -- Thierry Laurion -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Fwd: coreboot ported to the ASUS KGPE-D16 (Libreboot: blobless, fully functional!)

2015-09-27 Thread Thierry Laurion
to accelerate development and inclusion of amd boards to the point where researchers/developers will have alternative secure platforms to work from/on. Cheers, -- Thierry Laurion -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot