Re: [coreboot] Where is the first instrucion?

On Wed, Aug 10, 2016 at 3:34 AM Zoran Stojsavljevic < zoran.stojsavlje...@gmail.com> wrote: > > > Basically, in the classic car we got in 2005, the steps on x86 are: > > enable cache > *> do references to set tags* > > disable cache (really!) > > then cache as ram works. > > I am interested how

Re: [coreboot] Where is the first instrucion?

Hello! May I interfere as I have some interest in this topic too. Modern Intel CPUs have the special "no eviction mode" MSR which is used instead of CD bit to set up CAR. Am I understanding right that the purpose of it is to have the ability to use the caching for ROM along with CAR? --

Re: [coreboot] Where is the first instrucion?

Hello Ron, These are the excellent points! I did not know/had no clue this myself. It is a good remark, I would not know to search/discover for this!? The other good point is that CAR/NEM was developed by student in INTEL, doing his internship (which I always asked myself why such major things

Re: [coreboot] Where is the first instrucion?

Hi Ron I didn't know that and really appreciate all this information. I'll take a look at what you mentioned Thanks a lot! Em ter, 9 de ago de 2016 às 13:45, ron minnich escreveu: > I have not read this thread closely and maybe I'm telling you something > you know. But I

Re: [coreboot] Where is the first instrucion?

Hello Rafael, Once again... About your initial email. Code you have posted (in *RED*): f000:0fcb 66b9ff02mov ecx, 0x2ff *f000:0fd1 0f32 rdmsr ; read register 0x2ff (IA32_MTRR_DEF_TYPE)* *f000:0fd3 0fbae80b bts ax, 0xb ; Enable bit 11

Re: [coreboot] Where is the first instrucion?

Hi Zoran, thanks a lot for expending your time to help! I'll take a look. (It may take some time, but I will! ) Rafael R. Machado Em qua, 27 de jul de 2016 às 08:17, Zoran Stojsavljevic < zoran.stojsavlje...@gmail.com> escreveu: > Hello Rafael, > > I am looking into disassembly pointed by you:

Re: [coreboot] Where is the first instrucion?

Hello Rafael, I am looking into disassembly pointed by you: > f000:0fcb 66b9ff02mov ecx, 0x2ff > f000:0fd1 0f32 rdmsr ; read register 0x2ff (IA32_MTRR_DEF_TYPE) > f000:0fd3 0fbae80b bts ax, 0xb ; Enable bit 11 (MTRR Enable). >

Re: [coreboot] Where is the first instrucion?

> Oh no! The corporate copyright bogeyman's gonna get ya! Probably Intel Inside paranormal activities. ;-) Zoran On Tue, Jul 26, 2016 at 9:02 AM, Anthony Martin wrote: > Tony Marchini once said: > > I would like to start with, Do not disassemble

Re: [coreboot] Where is the first instrucion?

Tony Marchini once said: > I would like to start with, Do not disassemble copyrighted firmware and > CERTAINLY don't post your results to a public forum. Oh no! The corporate copyright bogeyman's gonna get ya! Keep learning, Rafael. Disassemble everything. Cheers, Anthony

Re: [coreboot] Where is the first instrucion?

Hi Anthony, thanks for the advise and for the explanation. You are totally right about posting firmware code on the forum. Rafael Em seg, 25 de jul de 2016 15:59, Tony Marchini escreveu: > I would like to start with, Do not disassemble copyrighted firmware and > CERTAINLY

Re: [coreboot] Where is the first instrucion?

Thanks a lot Zoran. I will! Rafael Em seg, 25 de jul de 2016 14:13, Zoran Stojsavljevic < zoran.stojsavlje...@gmail.com> escreveu: > Hello Rafael, > > Let me try hard... ;-) > > Let us look into what actually we have here, in Coreboot: in bootblock > phase, at the very beginning. > Let me tell

Re: [coreboot] Where is the first instrucion?

Hello Rafael, Let me try hard... ;-) Let us look into what actually we have here, in Coreboot: in bootblock phase, at the very beginning. Let me tell you what I am looking into (what cb tree): [zoran@localhost coreboot-09.06.2016]$ git describe 4.4-455-g538b324 Let us backtrace, to understand

Re: [coreboot] Where is the first instrucion?

Hi guys. Long time since my last e-mail. It's hard to synchronize my day work with my firmware studies. Since my projects are more UEFI related I usually do not have to much time to study the legacy way, but It's really cool and Ill not give up :) Since the last talk I was doing what everyone

Re: [coreboot] Where is the first instrucion?

On 01/10/2016 10:23 AM, ron minnich wrote: > One thing I think you'd enjoy doing is building the qemu target, setting > up qemu with gdb, and just watching what happens, instruction by > instruction, as the system boots. One exercise I liked doing was to rewrite the entire boot flow, from reset

Re: [coreboot] Where is the first instrucion?

Hi Peter and Rudolf. Thanks for the answers and tips. They are realy helpfull ! I'll take a look. Rafael R. Machado Em Sáb, 9 de jan de 2016 17:19, Rudolf Marek escreveu: > Hi, > > I guess your question is more general than the coreboot related right? > > If you have a

Re: [coreboot] Where is the first instrucion?

One thing I think you'd enjoy doing is building the qemu target, setting up qemu with gdb, and just watching what happens, instruction by instruction, as the system boots. ron On Sun, Jan 10, 2016 at 3:28 AM Rafael Machado < rafaelrodrigues.mach...@gmail.com> wrote: > Hi Peter and Rudolf. >

Re: [coreboot] Where is the first instrucion?

Hi, I guess your question is more general than the coreboot related right? If you have a firmware image dump of the flash (not the file you download from board vendor) then yes, first location to be executed is the instruction located 16 bytes before end of the image. In coreboot see in build/

[coreboot] Where is the first instrucion?

Hi everyone. I'new here and probably some of my questions may be kind of stupid. I'm trying to understand the boot processo of an old computer I have, and the plan is to port coreboot to it. My first question is. Where in the firmware binary can I find the first instrucional tha will be

Re: [coreboot] Where is the first instrucion?

Rafael Machado wrote: > I'm trying to understand the boot processo of an old computer I have, How old? Which processor does it have? > Does this mean the first instrucion on the firmware image is at BIOS > top - reset vector ? (0x - 0xfff0) Did you disassemble a coreboot.rom file