On Mon, Aug 2, 2010 at 8:10 AM, Brian Niebuhr bniebu...@gmail.com wrote:
Grant -
That's fine - I understand your position. I do wish you had decided
earlier that you weren't going to accept the patch in that form though
so I could have decided whether I wanted to spend any more time on it.
Davinci's EMAC device has an in-built MDIO controller and a CPDMA engine.
These hardware modules are not restricted to EMAC device alone. For example,
CPSW3G (3-port gigabit ethernet switch) hardware uses these very same modules
internally. This patch series separates out EMAC's MDIO and CPDMA
This patch removes code that has been rendered useless by the previous patches
in this series.
Signed-off-by: Cyril Chemparathy cy...@ti.com
---
drivers/net/davinci_emac.c | 107 --
include/linux/davinci_emac.h |3 -
2 files changed, 0
This patch switches the emac implementation over to the newly separated
MDIO driver.
With this, the mdio bus frequency defaults to a safe 2.2MHz. Boards may
optionally specify a bus frequency via platform data.
The phy identification scheme has been modified to use a phy bus id instead
of a
Davinci's MDIO controller is present on other TI devices, without an
accompanying EMAC. For example, on tnetv107x, the same MDIO module is used in
conjunction with a 3-port switch hardware.
By separating the MDIO controller code into its own platform driver, this
patch allows common logic to be
This patch removes davinci architecture code that has now been rendered
useless by the previous patches in the MDIO separation series.
Signed-off-by: Cyril Chemparathy cy...@ti.com
---
arch/arm/mach-davinci/board-da830-evm.c |5 -
arch/arm/mach-davinci/board-da850-evm.c |6
This patch hooks up the emac driver with the newly separated cpdma driver.
Key differences introduced here:
- The old buffer list scheme is no longer required
- The original code maintained mac address per rx channel, even if only one
rx channel was being used. With this change, mac
In addition to being embedded into the EMAC controller, the CPDMA hardware
block is used in TI's CPSW switch controller. Fortunately, the programming
interface to this hardware block remains pretty nicely consistent across these
devices.
This patch adds a new CPDMA services layer, which can then
Having switched over to the newly introduced cpdma layer, this patch now
removes a whole bunch of code that is now unused. This patch has been
maintained separate strictly for reasons of readability.
Signed-off-by: Cyril Chemparathy cy...@ti.com
---
drivers/net/davinci_emac.c | 929
Nori, Sekhar wrote:
Hello.
Nori, Sekhar wrote:
The CPGMAC pin list in da850.c was incorrectly split into two MII/RMII mode
specific pin lists, while what pin group is used is a function of how the board
is wired. Copy the pin lists to board-da850-evm.c, renaming them accordingly,
and
Hi Igor,
Shouldn't arch/arm/mach-omap2/board-am3517evm.c be on your list?
I think it should, or else it will be broken by:
[PATCH 5/8] netdev: cleanup unused davinci mdio emac code
Correct. As stated in the series summary:
Additional omap tree patches will be required for am35xx as well
On Fri, Jul 16, 2010 at 04:46:58PM +0200, Raffaele Recalcati wrote:
From: Davide Bonfanti davide.bonfa...@bticino.it
This driver implements a pcm interface without the use of a DMA but with
a copy_from_user.
There's a buffer in the driver that is filled with davinci_pcm_copy.
I will be out of the office starting 2010-08-03 and will not return until
2010-08-06.
I will respond to your message when I return.
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Hi Nicolas,
On Tue, Aug 03, 2010 at 01:21:14, Nicolas Luna wrote:
Hi Sekhar,
Yes there is an other device on the bus, but I removed it and I
decreased the clock to 20khz. I cannot go below because the i2c seems
not to work. It does solved the problem.
I modified the driver to add a
Sekhar,
On Tue, Aug 3, 2010 at 12:43 PM, Nori, Sekhar nsek...@ti.com wrote:
Hi Nicolas,
On Tue, Aug 03, 2010 at 01:21:14, Nicolas Luna wrote:
Hi Sekhar,
Yes there is an other device on the bus, but I removed it and I
decreased the clock to 20khz. I cannot go below because the i2c
Hi Omar,
[...]
+while ((reg = __raw_readl(regs-user[0].access)) USERACCESS_GO)
+;
potential infinite loop? I saw another place in your series using time_after,
might fit in here too.
[...]
+while ((__raw_readl(regs-control) CONTROL_IDLE) == 0)
+;
Hi Omar,
[...]
+if (ctlr-channels[chan_num])
+goto err_chan_busy;
Mem leaking 'chan'
Thanks. Will modify for v2.
Regards
Cyril.
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This is a bugfix for the original tnetv107x submission series. The psc_regs
base array was being discarded post-init, and this was causing a crash during
post-init clock enable/disable.
Signed-off-by: Cyril Chemparathy cy...@ti.com
---
arch/arm/mach-davinci/tnetv107x.c |2 +-
1 files
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