I don't quite understand the lib interfaces.
For GetMemoryProtectionsLib, it only exposes PopulateMpsGlobal(). The comments
say it's called by lib constructor. Then can we avoid adding the API? We could
just declare it as the lib constructor in INF.
For SetMemoryProtectionsLib, it introduces a
Clear CR4.CET bit before restoring MSR IA32_S_CET.
Backup/restore MSR IA32_U_CET in SMI.
Use current CR4 value when changing CR4.CET.
Initial mSmmInterruptSspTables to 0.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
Chao,
MpInitLib is to avoid code duplication between CpuMpPeim and CpuDxe.
If you only need MP protocol but not MP PPI, do you still need to add MpInitLib?
Can MpInitLib code be included in CpuDxe folder?
Thanks,
Ray
From: Chao Li
Sent: Friday, November 3, 2023
From: mindachen1987
Add base address PCD for eMMC and SDMMC
Add application command for SDMMC
Add PCD for Ultra High Speed (UHS) option
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Cc: Michael D Kinney
Cc: Li Yong
Co-authored-by: John Chew
Signed-off-by: mindachen1987
---
The buffer address passed into the read/write block function sometimes
larger than 4GB. This driver only support 32-bit DMA addressing.
MMC timeout will occur if DMA buffer is allocated in 64-bit address.
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Cc: Michael D Kinney
Cc: Li Yong
From: mindachen1987
This driver do not have dependency on ArmLib. It will cause compilation
error when compile with risv architecture.
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Cc: Michael D Kinney
Cc: Li Yong
Signed-off-by: mindachen1987
---
From: mindachen1987
Add PCD for little endian CPU. During RX, the endianess of data receive
via DMA will be swap.
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Cc: Michael D Kinney
Cc: Li Yong
Co-authored-by: mindachen1987
Signed-off-by: John Chew
---
From: mindachen1987
Remove DMA enable in CTRL register
Added DMA polling handling for RX/TX
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Li Yong
Co-authored-by: John Chew
Signed-off-by: mindachen1987
---
v3:
- CC Ard in this patch series [John Chew]
v2:
- Added maintainer to all patch in this series [Sunil]
- Implement addition memory allocation strategy, where dma buffer
is force to allocation below 4GB (Please refer to pathc 0005)
[Sunil]
v1:
This patch series involves the
This patch include QSPI driver and Flash driver protocol.
QSPI driver:
1. Used indirect read/write
2. Master mode only
3. Require to setup qspi driver after located protocol
4. Require to free device if no longer needed
5. Support command read/write & data
From: mindachen1987
- Add a new JH7110 silicon package.
- These files Contain platfrom specific Guids, PCDs and defines
used for JH7110 SoC.
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Li Yong
Co-authored-by: John Chew
Signed-off-by: mindachen1987
Acked-by: Sunil V L
---
File:
Platform/StarFive/
Silicon/StarFive/
Maintainers:
Sunil V L
Minda Chen
John Chew
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Li Yong
Signed-off-by: John Chew
---
Maintainers.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git
From: mindachen1987
Implement Pci Host Bridge and Pci Segment driver:
JH7110 SoC contains two PCI segment:
- PCI Segment 0 (USB):
32-bit Memory: 0x3000_ ~ 0x3FFF_
64-bit Memory: 0x9__ ~0x9_4000_
- PCI Segment 1 (NVME):
32-bit Memory: 0x3800_ ~ 0x37FF_
Support for efi variable to store in QSPI flash.
This driver is responsible to initialize both QSPI and Flash driver.
Firmware Volume(FV) Initialization:
1. Copy flash content into allocated shadow buffer (RAM)
2. Check FV header validity
3. If not valid, erase flash based
v4:
- Add maintainer.txt patch [Sunil]
- Add Sunil's Ack in patch 1/6...5/6 [John Chew]
v3:
- Combine "Add VisionFive 2 platform" patch series with
"Patches for JH7110 SoC platform" patch series [Sunil]
- Change commit message for [1/5], [4/5], [5/5] in this patch series
[Sunil]
Added a new library named LoongArch64MpInitLib.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
---
.../LoongArch64MpInitLib/DxeMpInitLib.inf | 45 +
.../LoongArch64MpInitLib/DxeMpInitLib.uni
Add two libraries named Fdt16550SerialPortHookLib and
EarlyFdtSerialPortLib16550, requested by LoongArch virtual
machine.
The Fdt16550SerialProtHookLib is referenced from ArmVirtPkg.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Add infrastructure files to build edk2 for LoongArch QEMU virtual
machine.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Xianglai Li
Co-authored-by: Bibo Mao
---
Add a new library LoongArch64CpuMmuLib. It provides two-stage MMU library
instances, PEI and DXE.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Baoqi Zhang
Co-authored-by: Dongyan
Add CsrRead, CsrWrite and CsrXChg functions for LoongArch, and use them
to operate the CSR register of LoongArch architecture.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by: Chao Li
Co-authored-by: Bibo Mao
---
Added a new library named LoongArch64CpuExceptionHandlerLib, and
modified the way LoongArch exceptions are expressed.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Baoqi Zhang
---
This patch set will enable LoongArch virtual machine in edk2, the new
LoongArch virtual machine is located in OvmfPkg/LoongArchVirt/, it is a
generic platform that dose not require any actual hardware.
Patch1-Patch14: Submit the common library and driver for LoongArch
virtual machine and real
Added a new DXE driver named CpuDxeLoongArch64.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Baoqi Zhang
Co-authored-by: Dongyan Qian
---
UefiCpuPkg/CpuDxeLoongArch64/CpuDxe.c
Adding LoongArch local interrupt function set, which is used to control
the opening or closing of the local interrupt when the global interrupt
is enabled.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by: Chao Li
---
Platfrom PEI module for LoongArch platfrom initialization.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Xianglai Li
Co-authored-by: Bibo Mao
---
Add NorFlashQemuLib for LoongArch, it is referenced from ArmVirtPkg.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Xianglai Li
Co-authored-by: Bibo Mao
---
Adding Csr.h for LoongArch64, it is use for accessing the CSR registers.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by: Chao Li
---
MdePkg/Include/Register/LoongArch64/Csr.h | 221 ++
1 file
From: joelopez333
REF:https://edk2.groups.io/g/devel/topic/102310377#110456
- Add a read after the final PCI Configuration space write
in RootBridgeIoPciAccess.
- When configuration space is strongly ordered, this ensures
that program execution cannot continue until the completion
is
Thank you, Laszlo. I'll make sure to do that moving forward!
Patrick Henz
-Original Message-
From: Laszlo Ersek
Sent: Thursday, November 2, 2023 6:28 AM
To: devel@edk2.groups.io; mike.maslen...@gmail.com; Henz, Patrick
Cc: hao.a...@intel.com; ray...@intel.com
Subject: Re:
Hi Nickle,
I fixed all your comments, Abner and Mike comments.
I also created PR
https://github.com/tianocore/edk2/pull/4994/
I fixed all Uncrustify errors and CI passed except PatchCheck which shows the
error
* Missing Signed-off-by! (Note: this must be added by the code contributor!)
Which I'm
From: Michael Kubacki
The code in this directory is licensed under Apache License, Version
2.0. Therefore, the directory is listed under paths with licenses
other than BSD-2-Clause Plus Patent. The directory link points to the
complete Apache License, Version 2.0 on apache.org.
Cc: Andrew Fish
From: Michael Kubacki
Updates the CodeQL queries opted into by edk2 to a set of queries from
the standard CodeQL query package `codeql/cpp-queries`.
After testing a large number of queries the included set here were
found to be the most useful with the least number of false positives.
Some
From: Michael Kubacki
Since a large number of CodeQL queries are being enabled to identify
issues that the community can collectively resolve, audit mode needs to
be enabled to prevent the build from failing.
In the future, this global audit mode can be disabled and individual
packages can
From: Michael Kubacki
Adds a workflow to run CodeQL against all packages built in
.pytool/CISettings.py. The following is done:
1. Determine which packages to build against. Those that support
are managed by .pytool/CISettings.py will be selected.
For each package:
2. Determine how to
From: Michael Kubacki
Adds the `--codeql` parameter to `stuart_update` and
`stuart_ci_build`.
- `stuart_update --codeql` - Downloads the CodeQL CLI locally. The
command will pull the appropriate binary for the host OS.
- `stuart_ci_build --codeql` - Runs CodeQL during the build resulting
in
From: Michael Kubacki
Adds a Python module to the CodeQL plugin directory that exports
functions commonly needed for Stuart-based platforms to easily
enable CodeQL in their platform build.
This functionality has already moved to edk2-pytool-extensions
From: Michael Kubacki
Adds a CodeQL plugin that supports CodeQL in the build system.
1. CodeQlBuildPlugin - Generates a CodeQL database for a given build.
2. CodeQlAnalyzePlugin - Analyzes a CodeQL database and interprets
results.
3. External dependencies - Assist with downloading the CodeQL
From: Michael Kubacki
CodeQL currently runs via the codeql-analysis.yml GitHub workflow
which uses the `github/codeql-action/init@v2` action (pre-build)
and the `github/codeql-action/analyze@v2` action (post-build) to
setup the CodeQL environment and extract results.
This infrastructure is
From: Michael Kubacki
CodeQL currently runs via the codeql-analysis.yml GitHub workflow
which uses the github/codeql-action/init@v2 action (pre-build)
and the github/codeql-action/analyze@v2 action (post-build) to
setup the CodeQL environment and extract results.
This infrastructure is removed
On Thu, Nov 2, 2023 at 3:59 PM wrote:
>
> From: Michael Kubacki
>
> - Adds Apache License 2.0 as an acceptable source license per
> discussion in https://edk2.groups.io/g/devel/message/110226
> - Updates the URL for existing licenses to match the current path
> used by opensource.org.
> -
Commit 8da978bf68535ec9fc41f400f22f09b033dd535a
On 11/2/2023 11:59 AM, Michael Kubacki wrote:
From: Michael Kubacki
- Adds Apache License 2.0 as an acceptable source license per
discussion in https://edk2.groups.io/g/devel/message/110226
- Updates the URL for existing licenses to match the
Reviewed-by: Michael D Kinney
> -Original Message-
> From: mikub...@linux.microsoft.com
> Sent: Thursday, November 2, 2023 8:59 AM
> To: devel@edk2.groups.io
> Cc: Andrew Fish ; Laszlo Ersek ;
> Leif Lindholm ; Kinney, Michael D
> ; Pedro Falcato ;
> Sean Brogan
> Subject: [PATCH v2
Good work Zhen!
Reviewed-by: Nate DeSimone
-Original Message-
From: devel@edk2.groups.io On Behalf Of Zhen Gong
Sent: Sunday, October 29, 2023 1:28 PM
To: devel@edk2.groups.io
Cc: Gong, Zhen
Subject: [edk2-devel] [PATCH edk2-platforms v2 0/4] IpmiFeaturePkg: Add server
management
From: Michael Kubacki
- Adds Apache License 2.0 as an acceptable source license per
discussion in https://edk2.groups.io/g/devel/message/110226
- Updates the URL for existing licenses to match the current path
used by opensource.org.
- The submodule list in this file is stale and is very
On Tue, Oct 31, 2023 at 9:25 PM wrote:
>
> From: Michael Kubacki
>
> - Adds Apache License 2.0 as an acceptable source license per
> discussion in https://edk2.groups.io/g/devel/message/110226
> - Updates the URL for existing licenses to match the current path
> used by opensource.org.
> -
Thanks Laszlo.
I'd like to get this patch merged soon if there are no concerns from
others so I can rebase the series that spurred the discussion.
For those in the CC, please take an opportunity to review if you would like.
- Michael
On 11/2/2023 6:15 AM, Laszlo Ersek wrote:
On 10/31/23
Canceled
Mike
From: Kinney, Michael D
Sent: Wednesday, November 1, 2023 2:08 PM
To: devel@edk2.groups.io
Cc: Kinney, Michael D
Subject: TianoCore Community Meeting Agenda Topics
Any agenda topics for the meeting this week?
If no topics, we will cancel.
Mike
-=-=-=-=-=-=-=-=-=-=-=-
*TianoCore edk2-test Bug Triage Meeting*
*When:*
Thursday, November 2, 2023
10:00pm to 11:00pm
(UTC+08:00) Asia/Shanghai
*Where:*
https://armltd.zoom.us/j/91247522013?pwd=ei9nUndTbG9oWEROS2M1aVREZkpiQT09=addon
*Organizer:* Edhaya Chandran edhaya.chand...@arm.com (
Enable the following modules builds for AARCH64:
- OpensslLibAccel.inf
- OpensslLibFullAccel.inf
Signed-off-by: Pierre Gondois
---
CryptoPkg/CryptoPkg.dsc | 23 ---
CryptoPkg/Readme.md | 14 +++---
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git
Add AARCH64 specific implementations of:
- OPENSSL_cpuid_setup(), probing hardware capabilitie
(presence of FEAT_AES, etc.)
- OPENSSL_rdtsc(), returning non-trusted entropy by accessing
system counter.
Signed-off-by: Pierre Gondois
---
.../Library/OpensslLib/OpensslLibAccel.inf| 5 +-
Add native instruction support for AARCH64.
Signed-off-by: Pierre Gondois
---
.../Library/OpensslLib/OpensslLibAccel.inf| 21 ++-
.../OpensslLib/OpensslLibFullAccel.inf| 21 ++-
CryptoPkg/Library/OpensslLib/UefiAsm.conf | 6 ++
A ArmReadIdAA64Isar0Reg() function was recently added
to BaseLib. Use it instead of its ArmReadIdIsar0() equivalent,
which was private to the BaseRngLib library.
This also allows to avoid the confusion between the following
registers:
- ID_ISAR0_EL1: allows to probe for Divide instructions, Debug
To enable AARCH64 native instruction support for Openssl,
some interfaces must be implemented. OPENSSL_cpuid_setup()
allows to probe the supported features of the platform.
Add ArmReadIdAA64Isar0Reg() to read the AA64Isar0, containing
Arm64 instruction capabilities.
A similar ArmReadIdAA64Isar0()
To enable AARCH64 native instruction support for Openssl,
some interfaces must be implemented. OPENSSL_rdtsc() requests
an access to a counter to get some non-trusted entropy.
Add ArmReadCntPctReg() to read system count.
A similar ArmReadCntPct() function is available in the ArmPkg,
but the
Various OpensslLib implementations are available in edk2. The
OpensslLibAccel.inf and OpensslLibFullAccel.inf ones use
architecture specific instructions, e.g. AESE, PMULL, SHA256H, ...,
allowing to improve speed.
Enable support for Aarch64's native instructions:
- Add ArmReadCntPctReg() and
Adding InitializeFloatingPointUnits, EnableFloatingPointUnits and
DisableFloatingPointUnits functions for LoongArch64.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by: Chao Li
---
MdePkg/Include/Library/CpuLib.h
Added LoongArch64 architecture CPU IO width.
https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Cc: Abner Chang
Cc: Daniel Schaefer
Signed-off-by: Chao Li
---
EmbeddedPkg/EmbeddedPkg.dec | 3 +++
1 file changed, 3 insertions(+)
diff --git
Add a CPU timer driver named StableTimerDxe, which proviedes
EFI_TIMER_ARCH_PROTOCOL for LoongArch.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Baoqi Zhang
---
This library provides interface related to restart and shudown the
LoongArch64 virtual machine.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Xianglai Li
Co-authored-by:
This library for PEI phase, and obtains the QemuFwCfg base address by
directly parsing the FDT, reads and writes the data in QemuFwCfg by
operating on the QemuFwCfg base address.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc:
Use a register to save PeiServiceTable pointer. This Library provides
PeiServiceTable pointer saveing and retrieval serivces.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by:
This library is provides boot mananger interfaces, and it is referenced
from ArmVirtPkg.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Xianglai Li
Co-authored-by: Bibo Mao
Add IoCsrRead8, IoCsrRead16, IoCsrRead32, IoCsrRead64, IoCsrWrite8,
IoCsrWrite16, IoCsrWrite32, IoCsrWrite64 to operate the IOCSR registers
of LoongArch architecture.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by:
Moved PcdDeviceTreeInitialBaseAddress and PcdDeviceTreeAllocationPadding
to OvmfPkg for easier use by other architectures.
Build-tested only (with "ArmVirtQemu.dsc").
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd
Add LoongArch AsmCpucfg function and Cpucfg definitions.
Also added Include/Register/LoongArch64/Cpucfg.h to IgnoreFiles of
EccCheck.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by: Chao Li
---
Add the LoongArch64 CPU Timer library, using CPUCFG 0x4 and 0x5 for
Stable Counter frequency.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
---
.../BaseLoongArch64CpuTimerLib.inf| 30
Add SEC code for LoongArch virtual machine.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Xianglai Li
Co-authored-by: Bibo Mao
---
Adding SetExceptionBaseAddress and SetTlbRebaseAddress functions
for LoongArch64.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by: Chao Li
---
MdePkg/Include/Library/BaseLib.h | 20 +
*Reminder: TianoCore edk2-test Bug Triage Meeting*
*When:*
Thursday, November 2, 2023
10:00pm to 11:00pm
(UTC+08:00) Asia/Shanghai
*Where:*
https://armltd.zoom.us/j/91247522013?pwd=ei9nUndTbG9oWEROS2M1aVREZkpiQT09=addon
*Organizer:* Edhaya Chandran edhaya.chand...@arm.com (
This library is provides real time clock for LoongArch virtual machine.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Baoqi Zhang
Co-authored-by: Xianglai Li
---
Add PciCpuIo2Dxe for LoongArch, this module is similar to
ArmPciCpuIo2Dxe drvier.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
Co-authored-by: Xianglai Li
Co-authored-by: Bibo Mao
---
Add a new header file CpuMmuLib.h, whitch is referenced from
ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
LoongArch64 is added, and more architectures can be accommodated in the
future.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Eric Dong
Cc: Ray Ni
Cc:
This Library is used to collect APs resources, but is currently NULL
for OvmfPkg, because it is not used by the LoongArch virtual machine.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
---
Add LoongArch gets stable counter ASM function.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by: Chao Li
---
MdePkg/Include/Library/BaseLib.h | 12 ++
MdePkg/Library/BaseLib/BaseLib.inf
On 2023-11-02 10:19, PierreGondois wrote:
+/// SCMI Message Ids for the Performance Protocol.
+typedef enum {
+ ScmiMessageIdPerformanceDomainAttributes = 0x3,
+ ScmiMessageIdPerformanceDescribeLevels = 0x4,
+ ScmiMessageIdPerformanceLimitsSet = 0x5,
+
On Thu, Nov 2, 2023 at 11:28 AM Laszlo Ersek wrote:
>
> On 11/1/23 02:12, Mike Maslenkin wrote:
> > On Tue, Oct 31, 2023 at 7:52 PM Henz, Patrick wrote:
> >>
> >> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4578
> >>
> >> The implementation of XhcGetElapsedTicks did not account for
> >>
On Thu, Nov 2, 2023 at 11:47 AM Jake Garver wrote:
>
> Ard, Pedro,
>
> How would you like to proceed here?
>
> Do nothing. Treat it as a toolchain bug and not attempt a work-around.
> Practically speaking, this means the Ubuntu20 container at
> https://github.com/tianocore/containers cannot
Ard, Pedro,
How would you like to proceed here?
1.
Do nothing. Treat it as a toolchain bug and not attempt a work-around.
Practically speaking, this means the Ubuntu20 container at
https://github.com/tianocore/containers cannot be updated to the latest GCC
10.x (10.5). We can pin it to
On 11/1/23 21:11, Taylor Beebe wrote:
> This patch is the final in this series which needs a review. Can someone
> take a look?
I'll try to do that.
I didn't have mail delivery enabled for the list in August. Can you
resend v4, rebased, and with the R-b / A-b tags given thus far picked up?
On 11/1/23 02:12, Mike Maslenkin wrote:
> On Tue, Oct 31, 2023 at 7:52 PM Henz, Patrick wrote:
>>
>> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4578
>>
>> The implementation of XhcGetElapsedTicks did not account for
>> non-zero start and stop values for the performance counter
>> timer,
On 11/2/23 01:20, Rebecca Cran wrote:
> Allow .rtf files created by applications such as Notepad to be committed
> as-is without further manual editing by skipping the requirements for
> CRLF, no tabs and no trailing whitespace.
>
> Signed-off-by: Rebecca Cran
> ---
>
On 11/2/23 09:49, Tan, Dun wrote:
> Laszlo,
>
> Thanks for your thorough and detailed research on this topic. With the test
> result that you reproduced, I agree with your opinion.
> So this patch set will be dropped and I'll raise another new patch set. In
> the new patch set, I'll only change
On 10/31/23 23:27, Jeremy Linton wrote:
> On 10/31/23 12:37, Neal Gompa via groups.io wrote:
>> From: Neal Gompa
>>
>> Currently, the ReadyToBoot event is only signaled when a formal Boot
>> Manager option is executed (in BmBoot.c -> EfiBootManagerBoot ()).
>>
>> However, the introduction of
On 10/31/23 18:37, Neal Gompa wrote:
> From: Neal Gompa
>
> Currently, the ReadyToBoot event is only signaled when a formal Boot
> Manager option is executed (in BmBoot.c -> EfiBootManagerBoot ()).
>
> However, the introduction of Platform Recovery in UEFI 2.5 makes it
> necessary to signal
On 10/26/23 13:05, Leif Lindholm wrote:
On Wed, Oct 25, 2023 at 13:25:40 +0200, pierre.gond...@arm.com wrote:
From: Pierre Gondois
When generating _CPC objects, some fields are mandatory.
Mandatory by spec or mandatory by current API?
If the former, could we either warn or add a Pcd to
On 10/26/23 12:45, Leif Lindholm wrote:
On Wed, Oct 25, 2023 at 13:25:36 +0200, pierre.gond...@arm.com wrote:
From: Pierre Gondois
The _PSD object (cf. ACPI 6.4, s8.4.5.5 _PSD (P-State Dependency)
allows to describe CPU's power state dependencies. Add a PsdToken
field to the
Hello Leif,
Thanks for the review,
On 10/26/23 12:05, Leif Lindholm wrote:
On Wed, Oct 25, 2023 at 13:25:30 +0200, pierre.gond...@arm.com wrote:
From: Pierre Gondois
Rename PERFORMANCE_PROTOCOL_VERSION to reflect the different
versions of the protocol. The macro is neither used in edk2 nor
On 10/26/23 13:03, Leif Lindholm wrote:
On Wed, Oct 25, 2023 at 13:25:39 +0200, PierreGondois wrote:
From: Pierre Gondois
The SCP holds some power information that could be advertised
through the _CPC object. The communication with the SCP is done
through SCMI protocols (c.f. ArmScmiDxe).
On 10/26/23 12:37, Leif Lindholm wrote:
On Wed, Oct 25, 2023 at 13:25:31 +0200, PierreGondois wrote:
From: Pierre Gondois
Sidebar: I think if you correct your name in your git config, the
above tag will drop out.
Ok I will check.
The PERFORMANCE_DESCRIBE_FASTCHANNEL Scmi command is
Call Redfish override protocol to notify platform that the Redfish
changes system settings and about to perform system reboot. Platform
firmware can do platform specific operation before system rebooted.
To follow platform policy, platform can reject system reboot by
returning error status and
Introduce Redfish override protocol. If platform likes to do specific operation
before system reboot, platform implement this protocol and Redfish feature core
driver will call it to notify platform that system is going to reboot. Platform
can reject system reboot by returning error status based
Introduce Redfish override protocol to notify platform that the Redfish
changes system settings and about to perform system reboot.
Signed-off-by: Nickle Wang
Cc: Abner Chang
Cc: Igor Kulchytskyy
Cc: Nick Ramirez
---
RedfishClientPkg/RedfishClientPkg.dec | 2 +
On 10/31/23 22:25, mikub...@linux.microsoft.com wrote:
> From: Michael Kubacki
>
> - Adds Apache License 2.0 as an acceptable source license per
> discussion in https://edk2.groups.io/g/devel/message/110226
> - Updates the URL for existing licenses to match the current path
> used by
On Tuesday, October 31, 2023 8:45 AM, Erdem Aktas wrote:
>
> On Sun, Oct 29, 2023 at 11:42 PM Sun, CepingX
> mailto:cepingx@intel.com>>
> wrote:
> >
> > On Saturday, October 28, 2023 12:45 AM, Erdem Aktas wrote:
> > This should be the [PATCH V1 2/2] I assume?
> > Yes, the name is
From: Ceping Sun
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4572
According to section 3.2 of the [GHCI] document, if the return status
of MapGPA is "TDG.VP.VMCALL_RETRY", TD must retry this operation for the
pages in the region starting at the GPA specified in R11.
In this patch, when
From: Ceping Sun
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4572
According to section 3.2 of the [GHCI] spec, if the return status
of MapGPA is "TDG.VP.VMCALL_RETRY", TD must retry this operation
for the pages in the region starting at the GPA specified in R11.
Currently, TDVF has not
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4572
According to section 3.2 of the [GHCI] spec, if the result is
"TDG.VP.VMCALL_RETRY" for TDG.VP.VMCALL.MapGPA, TD must retry the
mapping for the pages in the region starting at the GPA specified in r11.
Currently, TDVF does not properly
Laszlo,
Thanks for your thorough and detailed research on this topic. With the test
result that you reproduced, I agree with your opinion.
So this patch set will be dropped and I'll raise another new patch set. In the
new patch set, I'll only change the code for BaseIoLibIntrinsic instance and
[AMD Official Use Only - General]
Only one comment in line.
> -Original Message-
> From: Igor Kulchytskyy
> Sent: Thursday, November 2, 2023 4:18 AM
> To: devel@edk2.groups.io
> Cc: Chang, Abner ; Nickle Wang
> ; Mike Maslenkin
> Subject: [PATCH v2] RedfishPkg: RedfishDiscoverDxe: Fix
[AMD Official Use Only - General]
Reviewed-by: Abner Chang
> -Original Message-
> From: Wei6 Xu
> Sent: Tuesday, October 31, 2023 11:08 AM
> To: devel@edk2.groups.io
> Cc: Wei6 Xu ; Chang, Abner ;
> Nate DeSimone ; Liming Gao
>
> Subject: [PATCH edk2-platforms 1/1]
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