On Wed, Sep 04, 2019 at 06:43:03PM +0800, Abner Chang wrote:
> Support RISC-V image relocation.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Abner Chang
> ---
> MdePkg/Library/BasePeCoffLib/BasePeCoff.c | 3 +-
>
Emulator
Ovmf
MinPlatforms
And Intel Server Platform.
-Bob
-Original Message-
From: Gao, Liming
Sent: Thursday, September 5, 2019 9:09 PM
To: devel@edk2.groups.io; Feng, Bob C
Subject: RE: [edk2-devel] [Patch 0/2] Enable --genfds-multi-thread to default
build
Bob:
Can you list the
On Wed, Sep 04, 2019 at 04:04:23PM -0700, Ard Biesheuvel wrote:
> In some cases, the CLANG38 toolchain profile in LTO mode emits GOT
> based relocations in spite of our attempts to avoid this, by using
> hidden visibility, -Bsymbolic etc.
>
> On AARCH64, we managed to work around this by
Sorry for the incomplete mail.
I verified this patch on Ovmf, Emulator, MinPlatforms and Intel Server Platform.
Thanks,
Bob
-Original Message-
From: devel@edk2.groups.io On Behalf Of Bob Feng
Sent: Thursday, September 5, 2019 10:04 PM
To: Gao, Liming ; devel@edk2.groups.io
Cc: Shi,
On 09/05/19 12:37, Leif Lindholm wrote:
> Hi Bob, (+Laszlo, due to a question at the end)
>
> On Thu, Sep 05, 2019 at 05:39:05AM +, Feng, Bob C wrote:
>> Would you try to install antlr4-python3-runtime on debian.
>> pip install antlr4-python3-runtime
>
> I'd rather not. For the reasons
Thanks Laszlo!
Pushed: 8a1305a11f3bda2d6c1ab758e4aea79ee021dd1c
> -Original Message-
> From: Laszlo Ersek
> Sent: Thursday, September 5, 2019 9:16 PM
> To: Ni, Ray ; Dong, Eric ; Chiu,
> Chasel ; devel@edk2.groups.io
> Subject: Re: [PATCH v2] UefiCpuPkg: support single
>
On Wed, Sep 04, 2019 at 06:43:02PM +0800, Abner Chang wrote:
> RISC-V MMIO library instance. RISC-V only supports memory map I/O. However
> the first implementation
> of RISC-V EDK2 port uses PC/AT as the RISC-V platform spec. We have
> to keep the I/O functions as the temporary solution.
Can
On 09/04/19 11:52, Igor Mammedov wrote:
> it could be stolen RAM + black hole like TSEG, assuming fw can live without
> RAM(0x3+128K) range
> (in this case fwcfg interface would only work for locking down the range)
>
> or
>
> we can actually have a dedicated SMRAM (like in my earlier
Marc:
Please remove Change-Id: Ie5841047be350f411650ad30f16d210b98197dc4 in the
commit message for the updated one.
Thanks
Liming
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Marc W
> Chen
> Sent: Thursday, September 5, 2019 4:52 PM
>
Bob:
Does this change only impact -u option behavior?
Thanks
Liming
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Bob Feng
> Sent: Thursday, September 5, 2019 5:05 PM
> To: devel@edk2.groups.io
> Cc: Gao, Liming ; Shi, Steven ;
> Feng,
Bob:
Can you list the platform list have been verified with this change?
Thanks
Liming> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Bob Feng
> Sent: Thursday, September 5, 2019 11:11 AM
> To: devel@edk2.groups.io
> Subject: [edk2-devel]
On Thu, 5 Sep 2019 at 07:19, Leif Lindholm wrote:
>
> On Wed, Sep 04, 2019 at 04:04:23PM -0700, Ard Biesheuvel wrote:
> > In some cases, the CLANG38 toolchain profile in LTO mode emits GOT
> > based relocations in spite of our attempts to avoid this, by using
> > hidden visibility, -Bsymbolic
Hi All,
On 09/05/19 08:46, Ni, Ray wrote:
> Reviewed-by: Ray Ni
Please go ahead with the push, I'll skip this.
Thanks
Laszlo
>> -Original Message-
>> From: Dong, Eric
>> Sent: Wednesday, September 4, 2019 11:15 PM
>> To: Chiu, Chasel ; devel@edk2.groups.io
>> Cc: Ni, Ray ; Laszlo
Liming,
Yes, this change only impact -u option.
I separate _MultiThreadBuildPlatform function into two functions and create 2
new functions specially for IgnoreAutoGen, so the there looks big change for
build.py in this patch. I verified this patch on Ovmf, E
-Bob
-Original
On Thu, 5 Sep 2019 at 07:19, Leif Lindholm wrote:
>
> On Wed, Sep 04, 2019 at 04:04:23PM -0700, Ard Biesheuvel wrote:
> > In some cases, the CLANG38 toolchain profile in LTO mode emits GOT
> > based relocations in spite of our attempts to avoid this, by using
> > hidden visibility, -Bsymbolic
On Wed, Sep 04, 2019 at 06:43:04PM +0800, Abner Chang wrote:
> Implement RISC-V CPU related functions in BaseCpuLib.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
Apart from the CLA and the License of the new file, this one looks
fine to me.
/
Leif
> Signed-off-by: Abner
On Wed, Sep 04, 2019 at 06:43:06PM +0800, Abner Chang wrote:
> BaseTools changes for building EDK2 RISC-V platform.
> The changes made to build_rule.template is to avoid build errors cause by
> GCC711RISCV tool chain.
What errors?
> Contributed-under: TianoCore Contribution Agreement 1.0
>
lpc already has SMI negotiation feature, extend it by adding
optin ICH9_LPC_SMI_F_LOCKED_SMBASE_BIT to supported features.
Writing this bit into "etc/smi/requested-features" fw_cfg file,
tells QEMU to alias 0x3,128K RAM range into SMRAM address
space and mask this region from normal RAM
On Thu, Sep 05, 2019 at 07:25:39AM -0700, Ard Biesheuvel wrote:
> > > [BuildOptions]
> > > - GCC:*_*_*_DLINK_FLAGS = -shared -Wl,-Bsymbolic
> > > -Wl,-T,$(MODULE_DIR)/Scripts/PrePi-PIE.lds
> > > + GCC:*_*_*_DLINK_FLAGS =
> > > -Wl,-Bsymbolic,-pie,-T,$(MODULE_DIR)/Scripts/PrePi-PIE.lds
> >
> >
On Wed, Sep 04, 2019 at 06:43:12PM +0800, Abner Chang wrote:
> RISC-V generic SMBIOS DXE driver for building up SMBIOS type 4, type 7 and
> type 44 records.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Abner Chang
> ---
>
On Wed, Sep 04, 2019 at 06:43:14PM +0800, Abner Chang wrote:
> - Implement RISC-V DxeIpl.
> - Provide DxeIpl platform implementation-specifc library for RISC-V platform.
> Two libraries are provided in this commit,
> * Defualt library which simply switch stack and transfer
> control to DXE
Hi Abner,
Many thanks for this.
I have now gone through all of the patches, and left some specific as
well as some general comments. Please address those, or comment on why
you would prefer not changing.
For v2, could you do a few things please (some of which I've mentioned
throughout my
Andrew –
There is a standard call that provides this service, but I am porting over BSD
utils to the shell and they just take a straight path and call open. So I want
open to behave the way I expect it to. IN fact, the low level code separates
out the “drive” from the path already, but the
On 09/04/19 16:16, Philippe Mathieu-Daudé wrote:
> On 9/3/19 6:38 PM, Laszlo Ersek wrote:
>> The LoadImage() boot service is a bit unusual in that it allocates
>> resources in a particular failure case; namely, it produces a valid
>> "ImageHandle" when it returns EFI_SECURITY_VIOLATION. This is
On Thu, 5 Sep 2019 15:08:31 +0200
Laszlo Ersek wrote:
> On 09/04/19 11:52, Igor Mammedov wrote:
>
> > it could be stolen RAM + black hole like TSEG, assuming fw can live
> > without RAM(0x3+128K) range
> > (in this case fwcfg interface would only work for locking down the range)
> >
>
On Wed, Sep 04, 2019 at 06:43:09PM +0800, Abner Chang wrote:
> Add opensbi-HOWTO.txt for users to build RISC-V platform with RISC-V OpenSBI
> library.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Abner Chang
> ---
> RiscVPkg/opensbi/opensbi-HOWTO.txt | 17
On Wed, Sep 04, 2019 at 06:43:11PM +0800, Abner Chang wrote:
> The driver produces RISC-V EFI_CPU_ARCH_PROTOCOL and use RISC-V platform
> level timer library
>
> Due to RISC-V timer CSR is platform implementation specific, RISC-V CPU DXE
> driver invokes platform level timer library
> to access
On Wed, Sep 04, 2019 at 06:43:13PM +0800, Abner Chang wrote:
> RiscVCpuLib: Add RISC-V CPU Library.
> - This library provides CSR assembly functions to read/write RISC-V specific
> Control and Status registers.
>
> RiscVDxeIplHandoffLib
> RiscVDxeIplHandoffOpenSbiLib
> - Provide DxeIpl platform
On Thu, Sep 05, 2019 at 10:06:56AM -0700, Ard Biesheuvel wrote:
> On Thu, 5 Sep 2019 at 08:55, Leif Lindholm wrote:
> >
> > On Thu, Sep 05, 2019 at 07:25:39AM -0700, Ard Biesheuvel wrote:
> > > > > [BuildOptions]
> > > > > - GCC:*_*_*_DLINK_FLAGS = -shared -Wl,-Bsymbolic
> > > > >
On Thu, 5 Sep 2019 at 08:55, Leif Lindholm wrote:
>
> On Thu, Sep 05, 2019 at 07:25:39AM -0700, Ard Biesheuvel wrote:
> > > > [BuildOptions]
> > > > - GCC:*_*_*_DLINK_FLAGS = -shared -Wl,-Bsymbolic
> > > > -Wl,-T,$(MODULE_DIR)/Scripts/PrePi-PIE.lds
> > > > + GCC:*_*_*_DLINK_FLAGS =
> > > >
On Thu, 5 Sep 2019 at 10:16, Leif Lindholm wrote:
>
> On Thu, Sep 05, 2019 at 10:06:56AM -0700, Ard Biesheuvel wrote:
> > On Thu, 5 Sep 2019 at 08:55, Leif Lindholm wrote:
> > >
> > > On Thu, Sep 05, 2019 at 07:25:39AM -0700, Ard Biesheuvel wrote:
> > > > > > [BuildOptions]
> > > > > > -
On 09/04/19 10:25, Dandan Bi wrote:
> For the LoadImage() boot service, with EFI_SECURITY_VIOLATION retval,
> the Image was loaded and an ImageHandle was created with a valid
> EFI_LOADED_IMAGE_PROTOCOL, but the image can not be started right now.
> This follows UEFI Spec.
>
> But if the caller
On Wed, Sep 04, 2019 at 06:43:07PM +0800, Abner Chang wrote:
> Add RISC-V processor binding and RISC-V processor specific definitions and
> macros.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Abner Chang
> ---
> MdePkg/Library/BaseLib/BaseLib.inf
On Wed, Sep 04, 2019 at 06:43:10PM +0800, Abner Chang wrote:
> This is the abstract driver which incorporate with platform level RTC library
> (RealTimeClockLib) to provide Real Time Clock Architecture Protocol.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Abner
On Wed, 4 Sep 2019 at 19:20, Gao, Zhichao wrote:
>
> Acked-by: Zhichao Gao
>
Thanks
Pushed as 04d9d89b7dd4..23908d0f5cc6
> > -Original Message-
> > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> > Leif Lindholm
> > Sent: Thursday, September 5, 2019 12:38 AM
>
Ok, now I found my answer. DevShell library class must be included with StdLib
in order to correctly process shell-style input parameters. Without it, it
falls back on DevConsole
Thanks,
Tim
From: devel@edk2.groups.io On Behalf Of Tim Lewis
Sent: Thursday, September 5, 2019 10:25 AM
On Wed, Sep 04, 2019 at 06:43:15PM +0800, Abner Chang wrote:
> Add RISCV64 Arch.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
If you drop that contribution agreement:
Reviewed-by: Leif Lindholm
> Signed-off-by: Abner Chang
> ---
> MdeModulePkg/Logo/Logo.inf | 2 +-
> 1 file
Problem statement from Ard:
> Sometimes, the GCC compiler warns about variables potentially being used
> without having been initialized, while visual inspection reveals that
> this is impossible. In such cases, we need to initialize such a variable
> to an arbitrary value only to avoid breaking
Repo: https://github.com/lersek/edk2-CCodingStandardsSpecification.git
Branch: spurious_assign_bz_607
HTML-rendered views of the modified pages:
-
https://lersek.gitbooks.io/laszlo-s-fork-of-the-edk-ii-c-coding-standards-sp/content/v/spurious_assign_bz_607
-
Section "6.2 Comments" seems to permit "/*" for multi-line comments in
general. That's incorrect; "/*" comments are permitted only for a subset
of multi-line comments (namely Doxygen-style file and function header
comment blocks). Update the rule accordingly.
Cc: Andrew Fish
Cc: Leif Lindholm
The rule about avoiding comments in C code where the opening comment
characters are alone on a line conflicts with everyday edk2 practice --
we use comments like
//
// If the total number of lines in the popup is zero, then ASSERT()
//
all the time. This comment style is actively enforced
just a meta comment:
On 09/05/19 08:23, Dandan Bi wrote:
>> -Original Message-
>> From: Wu, Hao A
>> Sent: Thursday, September 5, 2019 1:38 PM
>> To: Bi, Dandan ; devel@edk2.groups.io
>> Cc: Wang, Jian J ; Ni, Ray ; Gao,
>> Liming ; Laszlo Ersek
>> Subject: RE: [patch 2/3] MdeModulePkg:
On Wed, Sep 04, 2019 at 06:43:08PM +0800, Abner Chang wrote:
> Update SmBios header file to conform with SMBIOS v3.3.0.
> The major update is to add definitions of SMBIOS Type 44h record.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Abner Chang
This would be
On 09/05/19 01:04, Ard Biesheuvel wrote:
> In some cases, the CLANG38 toolchain profile in LTO mode emits GOT
> based relocations in spite of our attempts to avoid this, by using
> hidden visibility, -Bsymbolic etc.
>
> On AARCH64, we managed to work around this by processing the GOT
> based
On Wed, Sep 04, 2019 at 06:43:16PM +0800, Abner Chang wrote:
> Add RISCV64 Arch.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
If you drop that contribution agreement:
Reviewed-by: Leif Lindholm
> Signed-off-by: Abner Chang
> ---
> NetworkPkg/Network.dsc.inc | 2 +-
> 1 file
On Wed, Sep 04, 2019 at 06:43:17PM +0800, Abner Chang wrote:
> Add RISC-V specific LD scripts. ."rela(INFO)" in the latest GccBase.lds
> causes PE32 relocation error. This is the temporaty solution untill we find
> the root casue.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
>
On 09/04/19 14:37, Ard Biesheuvel wrote:
> On Wed, 4 Sep 2019 at 00:52, Laszlo Ersek wrote:
>>
>> Since commit 35e242b698cd ("MdePkg/BaseLib: rewrite Base64Decode()",
>> 2019-07-16), Base64Decode() guarantees that DestinationSize is larger on
>> output than it was on input if
Hello,
I would appreciate any feedback you may have for this proposal.
Overview
--
This is a proposal to reduce SMM usage when using VariableSmmRuntimeDxe with
VariableSmm. It will do so by eliminating SMM usage for the vast majority of
runtime service GetVariable ( ) and
Today's behavior is to enable 5l paging when CPU supports it
(CPUID[7,0].ECX.BIT[16] is set).
The patch changes the behavior to enable 5l paging when two
conditions are both met:
1. CPU supports it;
2. The max physical address bits is bigger than 48.
Because 4-level paging can support to address
Your primary concern is my primary concern. I can think of two scenarios where
a runtime memory varstore would hurt.
The less severe one is that any variables measured into a TPM could appear to
be modified when read back so that if/when some entity wants to verify or
unseal something, they
BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Groups.io Inc//Groups.io Calendar//EN
METHOD:CANCEL
CALSCALE:GREGORIAN
BEGIN:VEVENT
STATUS:CANCELLED
UID:calendar.14...@groups.io
DTSTAMP:20190905T215637Z
ORGANIZER;CN=Stephano Cetola:mailto:stephano.cet...@intel.com
Hi Leif, thanks for went through these patches. I will check those comments and
submit another version.
Abner
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Leif Lindholm
> Sent: Friday, September 6, 2019 1:16 AM
> To: devel@edk2.groups.io;
Implement a S3 Advanced PEIM driver for supporting S3 feature.
So far this driver only install EFI_PEI_MM_ACCESS_PPI for S3 resume case.
Cc: Michael Kubacki
Cc: Sai Chaganty
Cc: Liming Gao
Signed-off-by: Marc Chen
---
.../S3Advanced/S3AdvancedPei/S3AdvancedPei.c | 36
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2154
Implement a S3 Advanced PEIM driver for supporting S3 feature.
So far this driver only install EFI_PEI_MM_ACCESS_PPI for S3 resume case.
Cc: Michael Kubacki
Cc: Sai Chaganty
Cc: Liming Gao
Signed-off-by: Marc Chen
---
Add DXE driver for Legacy Sio support
Cc: Hao Wu
Cc: Liming Gao
Cc: Ankit Sinha
Cc: Agyeman Prince
Cc: Kubacki Michael A
Cc: Nate DeSimone
Cc: Michael D Kinney
Signed-off-by: David Wei
---
.../LegacySioDxe/ComponentName.c | 173 ++
Add build option in build script for SIMICS QSP(Quick Start Platform) Platform
Add Maintainers of Simics QSP related packages
Cc: Hao Wu
Cc: Liming Gao
Cc: Ankit Sinha
Cc: Agyeman Prince
Cc: Kubacki Michael A
Cc: Nate DeSimone
Cc: Michael D Kinney
Signed-off-by: David Wei
---
Add CPU Pkg for SimicsX58. It is added for simics Quick Start Platform project
support
Cc: Hao Wu
Cc: Liming Gao
Cc: Ankit Sinha
Cc: Agyeman Prince
Cc: Kubacki Michael A
Cc: Nate DeSimone
Cc: Michael D Kinney
Signed-off-by: David Wei
---
.../SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
Create the SimicsOpenBoardPkg and its silicon Pkg to provide the support
for SIMICS quick start platform. it uses X58/ICH10 and emulated by SIMICS
model.
Different from v4:
Cleanup name of SkyLake
expand the QSP acronym to Quick Start Package
ExChange the patch number 6 and 7 to make patch6
Add BoardX58ICH10 modules for QSP(Quick Start Platform) Build tip
Cc: Hao Wu
Cc: Liming Gao
Cc: Ankit Sinha
Cc: Agyeman Prince
Cc: Kubacki Michael A
Cc: Nate DeSimone
Cc: Michael D Kinney
Signed-off-by: David Wei
---
.../Library/BoardInitLib/PeiBoardInitPostMemLib.c | 44 +++
*Reminder:* TianoCore Bug Triage - APAC / NAMO
*When:* Thursday, 5 September 2019, 5:00pm to 5:30pm, (GMT-07:00) America/Los
Angeles
*Where:* https://zoom.us/j/251103409
View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=470779 )
*Organizer:* Stephano Cetola
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=2057
Ecc can not handle the copyright format like
(C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP
This will cause Ecc to report wrong information.
This patch is going to handle this format
Cc: Liming Gao
Cc: Bob Feng
Hi everyone,
Putty is a popular terminal console software in windows and it support various
types of terminal keyboard type. I would like to add most of the type support.
Here is the key map info. Hope to get comments. Here is the type and mapping
table:
Putty function key map:
Reviewed-by: Eric Jin
-Original Message-
From: Heinrich Schuchardt
Sent: Wednesday, September 4, 2019 4:37 PM
To: EDK II Development
Cc: Jin, Eric ; Supreeth Venkatesh
; Stephano Cetola
; Heinrich Schuchardt
Subject: [edk2-test] [PATCH 1/1] uefi-sct/SctPkg: fix typo 'supproted'
Pushed at 30c4031acbdbdaddc824c67a27ac89a749447138
-Original Message-
From: devel@edk2.groups.io On Behalf Of Eric Jin
Sent: Tuesday, September 3, 2019 1:46 PM
To: Heinrich Schuchardt ; devel@edk2.groups.io
Cc: Supreeth Venkatesh ; Stephano Cetola
Subject: Re: [edk2-devel] [edk2-test]
Pushed at cce43fc3ae30d343964fe02f09242ec8604eb44b
-Original Message-
From: devel@edk2.groups.io On Behalf Of Eric Jin
Sent: Tuesday, September 3, 2019 3:43 PM
To: Heinrich Schuchardt ; devel@edk2.groups.io
Cc: Supreeth Venkatesh ; Stephano Cetola
Subject: Re: [edk2-devel] [edk2-test]
Pushed at a916582a12c414775a87c65718b7ebb0756f3fb5
-Original Message-
From: Heinrich Schuchardt
Sent: Wednesday, September 4, 2019 2:37 PM
To: Jin, Eric ; devel@edk2.groups.io
Cc: Supreeth Venkatesh ; Stephano Cetola
Subject: Re: [edk2-test] [PATCH 1/1] uefi-sct/SctPkg: fix typo
Reviewed-by: Eric Dong
> -Original Message-
> From: Chiu, Chasel
> Sent: Thursday, September 5, 2019 12:27 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Laszlo
> Ersek
> Subject: [PATCH v2] UefiCpuPkg: support single
> EFI_PEI_CORE_FV_LOCATION_PPI in PpiList
>
> REF:
Update the type of TopOfTemporaryRam from UINT32 to UINTN.
This change is intended to support X64 build scenarios.
The original code(line 64) may cast the overfloewed result
produced by "(TopOfTemporaryRam - sizeof (UINT32))"from
32bit to 64bit.
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate
Reviewed-by: Eric Dong
> -Original Message-
> From: Bi, Dandan
> Sent: Thursday, September 5, 2019 12:54 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Gao, Liming
> Subject: [patch] MdeModulePkg: Remove gEfiFormBrowserExProtocolGuid
>
> gEfiFormBrowserExProtocolGuid is not used in
> -Original Message-
> From: Wu, Hao A
> Sent: Thursday, September 5, 2019 1:38 PM
> To: Bi, Dandan ; devel@edk2.groups.io
> Cc: Wang, Jian J ; Ni, Ray ; Gao,
> Liming ; Laszlo Ersek
> Subject: RE: [patch 2/3] MdeModulePkg: Unload image on
> EFI_SECURITY_VIOLATION
>
> > -Original
> -Original Message-
> From: Bi, Dandan
> Sent: Thursday, September 05, 2019 2:24 PM
> To: Wu, Hao A; devel@edk2.groups.io
> Cc: Wang, Jian J; Ni, Ray; Gao, Liming; Laszlo Ersek; Bi, Dandan
> Subject: RE: [patch 2/3] MdeModulePkg: Unload image on
> EFI_SECURITY_VIOLATION
>
> >
Implement a S3 Advanced PEIM driver for supporting S3 feature.
So far this driver only install EFI_PEI_MM_ACCESS_PPI for S3 resume case.
Change-Id: Ie5841047be350f411650ad30f16d210b98197dc4
Cc: Michael Kubacki
Cc: Sai Chaganty
Cc: Liming Gao
Signed-off-by: Marc Chen
---
Reviewed-by: Ray Ni
> -Original Message-
> From: Dong, Eric
> Sent: Wednesday, September 4, 2019 11:15 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Ni, Ray ; Laszlo Ersek
> Subject: RE: [PATCH v2] UefiCpuPkg: support single
> EFI_PEI_CORE_FV_LOCATION_PPI in PpiList
>
>
From: "Tien Hock, Loh"
Remove some unused packages in Stratix 10 packages, clean up some commented
out codes
Signed-off-by: "Tien Hock, Loh"
Contributed-under: TianoCore Contribution Agreement 1.1
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Michael D Kinney
---
From: "Tien Hock, Loh"
Update maintainer list, SPDX license, remove unused packages
and remove hardcoded UART clock
Tien Hock, Loh (4):
Platform: Intel: Update maintainers list for Stratix 10 device
Platform: Intel: Update license to SPDX
Platform: Intel: Remove unused packages and clean
From: "Tien Hock, Loh"
Update maintainers list for Stratix 10 devices
Signed-off-by: "Tien Hock, Loh"
Contributed-under: TianoCore Contribution Agreement 1.1
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Michael D Kinney
---
Maintainers.txt | 5 +
1 file changed, 5 insertions(+)
diff --git
https://bugzilla.tianocore.org/show_bug.cgi?id=2080
This patch is to improve build -u option to re-use
GlobalVar__.bin file which is
introduced by multiple-process-autogen feature.
Cc: Liming Gao
Cc: Steven Shi
Signed-off-by: Bob Feng
---
.../Source/Python/AutoGen/AutoGenWorker.py| 2
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2157
Hii Pcd links to a efi variable. The Variable
default value is evaluated by related Hii Pcds
setting. If multiple Hii Pcds links to one variable,
and the offset overlap, the later Hii Pcds setting
should be effective. There is a tool bug
Hi John,
I'm not sure whether I understand the code correctly. If not, please correct me.
1. You change to the code to only exchange 32 bits(eax) instead of 64
bits(rax). After your change, how to handle the above 32 bits value (from bit
32 to bit 63)?
2. In this file, also have another two
From: "Tien Hock, Loh"
Added clock manager so that Stratix 10 UART clock doesn't need to be
hardcoded
Signed-off-by: "Tien Hock, Loh"
Contributed-under: TianoCore Contribution Agreement 1.1
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Michael D Kinney
---
From: "Tien Hock, Loh"
Update licenses to SPDX
Signed-off-by: "Tien Hock, Loh"
Contributed-under: TianoCore Contribution Agreement 1.1
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Michael D Kinney
---
Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf
| 22
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Zhang, Shenglei
> Sent: Thursday, September 5, 2019 2:20 PM
> To: devel@edk2.groups.io
> Cc: Kubacki, Michael A ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Gao, Liming
> Subject: [PATCH v2]
From: shenglei
FILE GUID in PeiEmuSerialPortLib.inf is same to
MdePkg\Library\BaseSerialPortLibNull\BaseSerialPortLibNull.inf.
PeiEmuSerialPortLib.inf FILE_GUID should be updated.
https://bugzilla.tianocore.org/show_bug.cgi?id=2144
Cc: Jordan Justen
Cc: Andrew Fish
Cc: Ray Ni
Signed-off-by:
The file guids of PeiEmuSerialPortLib.inf and SerialDxe.inf
are same to other guids. So update them to new ones.
https://bugzilla.tianocore.org/show_bug.cgi?id=2144
Cc: Jordan Justen
Cc: Andrew Fish
Cc: Ray Ni
Cc: Jian J Wang
Cc: Hao A Wu
Shenglei Zhang (1):
MdeModulePkg/SerialDxe: Update
FILE GUID in MdeModulePkg\Universal\SerialDxe\SerialDxe.inf is
same to the one gEdkiiSerialPortLibVendorGuid.
Its FILE GUID should be updated to another value.
https://bugzilla.tianocore.org/show_bug.cgi?id=2144
Cc: Jian J Wang
Cc: Hao A Wu
Signed-off-by: Shenglei Zhang
---
Hi Bob, (+Laszlo, due to a question at the end)
On Thu, Sep 05, 2019 at 05:39:05AM +, Feng, Bob C wrote:
> Would you try to install antlr4-python3-runtime on debian.
> pip install antlr4-python3-runtime
I'd rather not. For the reasons described by Laszlo in the
discussion leading to the
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