powerpc/motorola_powerpc: Add MVME2700 BSP

Hi, The MVME2700 can run the MVME2307 BSP. It is confusing in EPICS to have the MVME2700 referencing the mvme2307 BSP. This patch adds the BSP powerpc/mvme2700. The bsp.h header for the motorola_powerpc family needs the RTEMS_BSP device to control the legacy network stack's interface and attach

[PATCH] bsps/mvme2700: Add MVME2700 BSP

From: Chris Johns --- bsps/powerpc/motorola_powerpc/include/bsp.h | 8 .../bsps/powerpc/motorola_powerpc/abi.yml | 2 +- .../powerpc/motorola_powerpc/bspmvme2700.yml | 19 +++ 3 files changed, 24 insertions(+), 5 deletions(-) create mode 100644

Re: [PATCH 2/2] cpukit/libdl: Resolve size mismatch warnings

OK to the libdl patch Chris On 5/4/2023 7:33 am, Kinsey Moore wrote: > Resolve warnings about mismatched pointer and integer sizes in AArch64 > libdl when building with the ILP32 ABI. > --- > cpukit/libdl/rtl-elf.c | 4 ++-- > cpukit/libdl/rtl-mdreloc-aarch64.c | 31

Re: [PATCH rtems-lwip] rtemslwip/xil_shims: Perform flush with invalidate

On 4/4/2023 10:23 pm, Kinsey Moore wrote: > On Mon, Apr 3, 2023 at 8:00 PM Chris Johns > wrote: > > On 31/3/2023 8:13 am, Kinsey Moore wrote: > > Xilinx wrote their A53 HAL with the assumption that the CPU did not > > support cache invalidation without a

[PATCH 8/8] rtems/microblaze: Update to GDB 13.1

From: Chris Johns Note: GCC does not build on MacOS 13.3 due to the specific version of GCC the Microblaze is using. Updates #4892 --- rtems/config/6/rtems-microblaze.bset | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rtems/config/6/rtems-microblaze.bset

[PATCH 6/8] devel/mpfr: Add MPFR as a package

From: Chris Johns - This is a place holder incase we stop building MPFR in GCC. Updates #4892 --- bare/config/devel/mpfr-4.2.0.cfg | 18 ++ source-builder/config/mpfr.cfg | 62 2 files changed, 80 insertions(+) create mode 100644

[PATCH 5/8] devel/mpfr: Update to 4.2.0 to support MacOS AARCH64

From: Chris Johns - Use base64 checksums - Change MPFR URL Updates #4892 --- rtems/config/tools/rtems-gcc-12-newlib-head.cfg | 7 ++- source-builder/config/gcc-12.cfg| 17 + 2 files changed, 11 insertions(+), 13 deletions(-) diff --git

[PATCH 7/8] rtems/mipsstx39: Update to GDB 13.1 and stage build GMP

From: Chris Johns - Use a build set file to stage GMP as recent GDB versions require GMP. Update #4892 --- rtems/config/6/rtems-mips.bset| 2 +- rtems/config/tools/rtems-mipstx39-gdb-11.2.cfg| 3 --- rtems/config/tools/rtems-mipstx39-gdb-7.5.1-1.cfg | 11 ---

[PATCH 4/8] devel/gmp: Disable assemble builds on MacOS AARCH64

From: Chris Johns Updates #4892 --- source-builder/config/gmp.cfg | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/source-builder/config/gmp.cfg b/source-builder/config/gmp.cfg index ffd3b20..4e8d674 100644 --- a/source-builder/config/gmp.cfg +++

[PATCH 2/8] gdb: Use a virtual environment if present

From: Chris Johns - Detect and use a virtual environment if present - Supports MacOS with python.org in a venv Updates #4892 --- rtems/config/tools/rtems-gdb-13.1.cfg | 4 ++ source-builder/config/gdb-common-1.cfg | 58 -- 2 files changed, 39 insertions(+), 23

[PATCH 3/8] rtems/gcc: Do not build GMP in GCC, use the staged build

From: Chris Johns - Do not build GMP when building GCC. GMP is now built as a package for GDB. Building as a separate package lets use control how it is built. Updates #4892 --- source-builder/config/gcc-common-1.cfg | 29 +++--- 1 file changed, 8 insertions(+), 21

[PATCH 1/8] dtc: Disable warnings

From: Chris Johns Updates #4892 --- source-builder/config/dtc-1-1.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/source-builder/config/dtc-1-1.cfg b/source-builder/config/dtc-1-1.cfg index 686a1e0..d42e91e 100644 --- a/source-builder/config/dtc-1-1.cfg +++

[rtems-source-builder] Python Virtual Env and MacOS arm64

Hi, These patches provide: - GDB Python Virtual Env support If you start a build in a python virtual env it will be used as the path to python provided to GDB if GDB is version 13.* and later. Using a virtual env simplifes the support we need to maintain and in time this will become a

[PATCH 2/2] cpukit/libdl: Resolve size mismatch warnings

Resolve warnings about mismatched pointer and integer sizes in AArch64 libdl when building with the ILP32 ABI. --- cpukit/libdl/rtl-elf.c | 4 ++-- cpukit/libdl/rtl-mdreloc-aarch64.c | 31 +++--- cpukit/libdl/rtl-rap.c | 4 ++-- 3 files changed,

[PATCH 1/2] spec: Silence benign warnings in 3rd party code

Do not warn about excessive shifts in imported Xilinx driver code when building with the ILP32 ABI. The two instances of this warning produce the desired effect of setting the upper address bits to 0. --- spec/build/bsps/objnandpsu.yml | 3 ++- spec/build/bsps/objqspipsu.yml | 3 ++- 2 files

Re: [PATCH v2 3/3] bsps/microblaze: Fix UART transmit interrupt

Feel free to check in this patch. I just have a side note. I tried to write a Termios interrupt driver for a FIFO device some time ago: bsps/arm/imx/console/console-config.c It worked only without gaps because the device offered the ability to get the current FIFO level. Waiting for the FIFO

[PATCH 1/2] user/microblaze: Document QSPI NOR JFFS2 driver

--- user/bsps/bsps-microblaze.rst | 10 ++ 1 file changed, 10 insertions(+) diff --git a/user/bsps/bsps-microblaze.rst b/user/bsps/bsps-microblaze.rst index 32aad90..2a8a6dd 100644 --- a/user/bsps/bsps-microblaze.rst +++ b/user/bsps/bsps-microblaze.rst @@ -61,6 +61,16 @@ to include it in

[PATCH 2/2] user/microblaze: Document device tree support

--- user/bsps/bsps-microblaze.rst | 29 - 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/user/bsps/bsps-microblaze.rst b/user/bsps/bsps-microblaze.rst index 2a8a6dd..864b3c8 100644 --- a/user/bsps/bsps-microblaze.rst +++ b/user/bsps/bsps-microblaze.rst

[lwip 1/6] Generalize MDIO support

Add support for MDIO drivers. This is just a first step to unify the PHY/MDIO support in cpsw and uLan. Defining a proper API needs more work. --- cpsw/src/include/hw_mdio.h | 21 +++ cpsw/src/include/mdio.h | 59 --- cpsw/src/include/phy.h

[lwip 6/6] tms570: Add data cache support

--- uLan/ports/driver/tms570_emac/tms570_netif.c | 1 + 1 file changed, 1 insertion(+) diff --git a/uLan/ports/driver/tms570_emac/tms570_netif.c b/uLan/ports/driver/tms570_emac/tms570_netif.c index 4149bcb..eac9527 100644 --- a/uLan/ports/driver/tms570_emac/tms570_netif.c +++

[lwip 2/6] tms570: Fix warning

--- uLan/ports/driver/tms570_emac/tms570_netif.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/uLan/ports/driver/tms570_emac/tms570_netif.c b/uLan/ports/driver/tms570_emac/tms570_netif.c index 74758e5..c27f6d5 100644 ---

[lwip 4/6] tms570: Add EMACUse100Mbps()

--- uLan/ports/driver/tms570_emac/ti_drv_emac.h | 19 +++ uLan/ports/driver/tms570_emac/tms570_netif.c | 6 ++ 2 files changed, 25 insertions(+) diff --git a/uLan/ports/driver/tms570_emac/ti_drv_emac.h b/uLan/ports/driver/tms570_emac/ti_drv_emac.h index 54f22c8..a829edd

[lwip 5/6] tms570: Add endianess support

--- uLan/ports/driver/tms570_emac/tms570_netif.c | 135 +++ 1 file changed, 81 insertions(+), 54 deletions(-) diff --git a/uLan/ports/driver/tms570_emac/tms570_netif.c b/uLan/ports/driver/tms570_emac/tms570_netif.c index b484a42..4149bcb 100644 ---

[lwip 0/6] Add basic support for TMS570LC4357

In general, the lwIP stack lacks a generic MDIO/Phy framework. Sebastian Huber (6): Generalize MDIO support tms570: Fix warning tms570: Use new pin configuration API tms570: Add EMACUse100Mbps() tms570: Add endianess support tms570: Add data cache support cpsw/src/include/hw_mdio.h

[lwip 3/6] tms570: Use new pin configuration API

--- uLan/ports/driver/tms570_emac/tms570_netif.c | 55 +--- 1 file changed, 25 insertions(+), 30 deletions(-) diff --git a/uLan/ports/driver/tms570_emac/tms570_netif.c b/uLan/ports/driver/tms570_emac/tms570_netif.c index c27f6d5..46e025a 100644 ---

[PATCH 8/8] bsp/tms570: Add TMS570LC4357 support

--- bsps/arm/tms570/include/bsp/tms570-pins.h | 6 ++ bsps/arm/tms570/include/bsp/tms570.h | 22 ++ bsps/arm/tms570/start/init_pinmux.c | 4 3 files changed, 32 insertions(+) diff --git a/bsps/arm/tms570/include/bsp/tms570-pins.h

[PATCH 0/8] Add basic support for TMS570LC4357

Sebastian Huber (8): build: Add assert-in-set option action bsp/tms570: Export -mbe32 to pkg-config bsp/tms570: Enable cache manager implementation bsp/tms570: Add pin configuration variants bsp/tms570: Replace TMS570_MMR_SELECT_GMII_SEL bsp/tms570: Use 0x for hex constants

[PATCH 6/8] bsp/tms570: Use 0x for hex constants

--- bsps/arm/tms570/include/bsp/tms570.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/bsps/arm/tms570/include/bsp/tms570.h b/bsps/arm/tms570/include/bsp/tms570.h index f278a93606..86f33f896d 100644 --- a/bsps/arm/tms570/include/bsp/tms570.h +++

[PATCH 4/8] bsp/tms570: Add pin configuration variants

Rearrange pin function bit fields to allow the clearing of all function bits through TMS570_PIN_AND_FNC(). Move implementation details to source file. --- bsps/arm/tms570/include/bsp/tms570-pinmux.h | 76 +++ bsps/arm/tms570/start/pinmux.c | 103 ++-- 2

[PATCH 5/8] bsp/tms570: Replace TMS570_MMR_SELECT_GMII_SEL

Replace TMS570_MMR_SELECT_GMII_SEL with TMS570_MMR_SELECT_MII_MODE and TMS570_MMR_SELECT_RMII_MODE. --- bsps/arm/tms570/include/bsp/tms570lc4357-pins.h| 5 + bsps/arm/tms570/include/bsp/tms570ls3137zwt-pins.h | 5 - 2 files changed, 9 insertions(+), 1 deletion(-) diff --git

[PATCH 3/8] bsp/tms570: Enable cache manager implementation

--- spec/build/bsps/arm/tms570/obj.yml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/spec/build/bsps/arm/tms570/obj.yml b/spec/build/bsps/arm/tms570/obj.yml index 3c8e0ed0c4..6f6cd375c4 100644 --- a/spec/build/bsps/arm/tms570/obj.yml +++

[PATCH 7/8] bsp/tms570: Add TMS570_VARIANT

--- spec/build/bsps/arm/tms570/grp.yml| 2 ++ spec/build/bsps/arm/tms570/optvariant.yml | 21 + 2 files changed, 23 insertions(+) create mode 100644 spec/build/bsps/arm/tms570/optvariant.yml diff --git a/spec/build/bsps/arm/tms570/grp.yml

[PATCH 2/8] bsp/tms570: Export -mbe32 to pkg-config

--- spec/build/bsps/arm/tms570/optlinkflags.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/spec/build/bsps/arm/tms570/optlinkflags.yml b/spec/build/bsps/arm/tms570/optlinkflags.yml index 5d4f83fdcd..c1135c6616 100644 --- a/spec/build/bsps/arm/tms570/optlinkflags.yml +++

[PATCH 1/8] build: Add assert-in-set option action

--- wscript | 8 1 file changed, 8 insertions(+) diff --git a/wscript b/wscript index 567f42db2f..a5c8b5f236 100755 --- a/wscript +++ b/wscript @@ -825,6 +825,13 @@ class OptionItem(Item): value, self.data["name"], arg)) return value +def

[PATCH v2 1/3] bsps/microblaze: Allow copying FDT from U-Boot

From: "Maldonado, Sergio E. (GSFC-580.0)" --- bsps/microblaze/microblaze_fpga/include/bsp.h | 3 + .../microblaze_fpga/start/crtinit.S | 6 +- .../microblaze_invalidate_dcache_range.S | 104 ++ .../shared/fdt/microblaze-fdt-support.c | 36 +-

[PATCH v2 0/3] bsps/microblaze: FDT support and UART driver improvements

v2: - Allow UART driver to fill the transmit FIFO rather than just sending one byte at a time. Maldonado, Sergio E. (GSFC-580.0) (3): bsps/microblaze: Allow copying FDT from U-Boot bsps/microblaze: Add support for multiple UARTs bsps/microblaze: Fix UART transmit interrupt

[PATCH v2 3/3] bsps/microblaze: Fix UART transmit interrupt

From: "Maldonado, Sergio E. (GSFC-580.0)" --- bsps/microblaze/include/dev/serial/uartlite.h | 2 ++ bsps/microblaze/shared/dev/serial/uartlite.c | 22 ++- 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/bsps/microblaze/include/dev/serial/uartlite.h

[PATCH v2 2/3] bsps/microblaze: Add support for multiple UARTs

From: "Maldonado, Sergio E. (GSFC-580.0)" --- bsps/microblaze/include/dev/serial/uartlite.h | 2 + .../microblaze_fpga/console/console-io.c | 229 -- bsps/microblaze/shared/dev/serial/uartlite.c | 8 +- .../bsps/microblaze/microblaze_fpga/grp.yml | 32 +++

Re: [PATCH rtems-lwip] rtemslwip/xil_shims: Perform flush with invalidate

On Mon, Apr 3, 2023 at 8:00 PM Chris Johns wrote: > On 31/3/2023 8:13 am, Kinsey Moore wrote: > > Xilinx wrote their A53 HAL with the assumption that the CPU did not > > support cache invalidation without a flush, so the flush and > > invalidation functions were combined and all range