s.
Regards,
Alan
> Thank you,
> Mazaya
>
> On Tue, Jul 18, 2023 at 11:27 PM Alan Cudmore
> wrote:
>
>> Hi Mazaya,
>> I wonder if it is possible to initialize the processor to the state where
>> it can run the RTEMS image in RAM without using the prom ima
Hi Mazaya,
I wonder if it is possible to initialize the processor to the state where
it can run the RTEMS image in RAM without using the prom image? The
processor initialization would have to go in the resc script before the
image is loaded and started.
Also, as you mentioned, the renode Zephyr
Hi Noor,
If you have not done so already, would it be worth trying to build and
initialize the current libbsd with a loopback driver?
Are there other devices on the RPI4 such as the SD card or USB that may be
usable in the current libbsd on the Pi 4?
I know it will not get you the ethernet driver
Hi,
When I try to go to docs.rtems.org, www.rtems.org, or git.rtems.org, I get
an error from my browser: ERR:CERT_DATE_INVALID.
Just wanted to see if anyone else noticed this.
Thanks,
Alan
___
devel mailing list
devel@rtems.org
Tue, Apr 11, 2023, 2:54 PM Alan Cudmore wrote:
>
>> Sorry, meant to reply to the list too.. I think you pushed v2 of my
>> patch. I was up to v6 that fixed a bunch of issues.
>> What is the best way to fix this? Rewind, or I can submit a new patch
>> based on this.
>&g
nks.
>
> Please check that it looks good to you.
>
> --joel
>
> On Fri, Mar 31, 2023 at 11:15 AM Alan Cudmore
> wrote:
>
>> This patch adds the documentation for building and running RTEMS on the
>> Kendryte K210
>> RISC-V SoC. The generic riscv introducion was
I think it's in pretty good shape:
https://lists.rtems.org/pipermail/devel/2023-April/074845.html
I did not wrap the existing console sections, but I used line wrap to
format the other paragraphs to be 80 chars or less. I also updated the
hardcoded RTEMS versions to use macros.
Thanks,
Alan
This patch adds the documentation for building and running RTEMS on the
Kendryte K210 RISC-V SoC.
The generic riscv introducion was re-arranged to list the multilib variants
then the specific
hardware targets. In addition a couple of errors were fixed for the generic
QEMU commands.
V2
to only use
the boot CPU, so I would prefer to leave that alone for now.
Thanks,
Alan
On Sat, Apr 1, 2023 at 11:05 PM Alan Cudmore wrote:
> Update on K210/ticker on Renode:
> If I define CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR in the RISC-V BSP,
> ticker works on the unmodified .resc fil
This patch adds the documentation for building and running RTEMS on the
Kendryte K210 RISC-V SoC.
The generic riscv introducion was re-arranged to list the multilib variants
then the specific
hardware targets. In addition a couple of errors were fixed for the generic
QEMU commands.
V2
t; https://git.rtems.org/rtems-docs/tree/README.txt#n469
>
> Please note the line length. That can be relaxed when pasting in output
> but we
> need the written text to be within the bounds.
>
> Thanks
> Chris
>
> On 1/4/2023 3:15 am, Alan Cudmore wrote:
> > This p
This patch adds the documentation for building and running RTEMS on the
Kendryte K210 RISC-V SoC.
The generic riscv introducion was re-arranged to list the multilib variants
then the specific
hardware targets. In addition a couple of errors were fixed for the generic
QEMU commands.
V2
Update on K210/ticker on Renode:
If I define CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR in the RISC-V BSP, ticker
works on the unmodified .resc file.
Alan
On Sat, Apr 1, 2023 at 8:17 PM Alan Cudmore wrote:
> Hi Hesham,
> I found a difference between the .resc file I use to run single
renode-test setup for the K210 is here:
https://github.com/alanc98/k210-rtems-test
Note that if you run this, the rki test will fail unless you remove the
last test or build an RKI image for the k210:
https://github.com/alanc98/rki2/tree/rtems6
Alan
On Sat, Apr 1, 2023 at 6:13 PM Alan Cudmore
> 0x0.
> 22:28:58.9790 [WARNING] sysbus: [cpu1: 0x80009FE0] (tag:
> 'SYSCTL/clk_sel0') ReadDoubleWord from non existing peripheral at
> 0x50440020, returning 0x.
>
>
> On Sat, 1 Apr 2023 at 21:22, Alan Cudmore wrote:
> >
> > Hi Hesham,
> > I appl
Hi Hesham,
I applied your suggestions and sent a v3 patch.
Thanks for the review,
Alan
On Sat, Apr 1, 2023 at 1:43 PM Hesham Almatary
wrote:
> On Fri, 31 Mar 2023 at 17:15, Alan Cudmore wrote:
> >
> > This patch adds the documentation for building and running RTEMS on the
This patch adds the documentation for building and running RTEMS on the
Kendryte K210
RISC-V SoC. The generic riscv introducion was re-arranged to list the multilib
variants
then the specific hardware targets. In addition a couple of errors were fixed
for the
generic QEMU commands.
V2
This patch adds the documentation for building and running RTEMS on the
Kendryte K210
RISC-V SoC. The generic riscv introducion was re-arranged to list the multilib
variants
then the specific hardware targets. In addition a couple of errors were fixed
for the
generic QEMU commands.
V2
Hi Padmarao,
Thanks for reviewing the changes. I agree with your suggestions and will
send out a V2 patch soon.
Thanks,
Alan
On Thu, Mar 30, 2023 at 11:28 AM wrote:
> Hi Alan,
>
> > On Wed, 2023-03-29 at 10:32 -0400, Alan Cudmore wrote:
> >
> > This patch adds the do
Hi Hesham and Padmarao (and anyone else that is interested in RISC-V BSPS..
)
I would like your opinion on the documentation update I submitted for the
RISC-V BSPs.
I added support for the K210 BSP variant, but I also re-arranged the
variants into two lists:
- The multilib variants
- Target
This patch adds the documentation for building and running RTEMS on
the Kendryte K210 RISC-V SoC. The generic riscv introducion
was re-arranged to list the multilib variants then the specific
hardware targets. In addition a couple of errors were fixed for
the generic QEMU commands.
Closes #4876
Hi Gedare,
I accepted the agreements. I would like to be a secondary mentor again this
year. I'm interested in both RPI and RISC-V based projects.
Thanks,
Alan
On Tue, Mar 7, 2023 at 9:43 PM Gedare Bloom wrote:
> Hello all,
>
> RTEMS Project is again to participate in GSoC (2023). If you would
/
These might make an interesting RTEMS target, since the SoC has 64Mbytes of
PSRAM and can run Linux.
Alan
On Fri, Mar 17, 2023 at 7:41 AM wrote:
>
> I have tested it on the renode.io simulator and working fine.
>
> Regards
> Padmarao
> > On Wed, 2023-03-15 at 22:04 -040
Hi Sebastian,
I applied these three patches after my patches and ran them on my K210
board and simulator. I have a set of 12 tests including benchmarks, SMP01,
SMP08, ticker, etc. Everything ran OK.
Is there anything in particular I can try to test them like setting the
maximum CPUs to 1? (K210 is
-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: riscv
+bsp: kendrytek210
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2022 Alan Cudmore
+cppflags: []
+enabled-by: true
+family: riscv
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: ../../opto2
+- role: build
-k210.dts
new file mode 100644
index 00..cad413dc81
--- /dev/null
+++ b/bsps/riscv/riscv/dts/kendryte-k210.dts
@@ -0,0 +1,216 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) Alan Cudmore
+ * Copyright (C) Padmarao Begari
+ * Copyright (C) 2022 Microchip Technology Inc
SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup k210_regs
+ *
+ * @brief k210 RISC-V CPU defines.
+ */
+
+/*
+ * Copyright (c) 2022 Alan Cudmore
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following
a
subset of the of testsuite on the renode.io robot test framework.
Alan Cudmore (3):
bsps/riscv: add device tree source and device tree blob header for
k210 bsp variant
bsps/riscv: add riscv/kendrytek210 BSP variant source changes
spec: add riscv kendrytek210 variant build options
bsps
On Tue, Mar 14, 2023 at 11:35 PM Gedare Bloom wrote:
> >> >> > diff --git a/bsps/riscv/riscv/start/bspstart.c
> b/bsps/riscv/riscv/start/bspstart.c
> >> >> > index 30d479ce88..a0b6e683f6 100644
> >> >> > --- a/bsps/riscv/riscv/start/bspstart.c
> >> >> > +++ b/bsps/riscv/riscv/start/bspstart.c
>
Hi,
I noticed that my RISC-V builds with the RTEMS master and RSB master now
have this warning on each link:
[3405/4331] Linking build/riscv/rv64imafdc/testsuites/samples/minimum.exe
/home/alan/rtems/tools/6/lib/gcc/riscv-rtems6/12.2.1/../../../../riscv-rtems6/bin/ld:
warning:
On Mon, Mar 13, 2023 at 12:16 PM Gedare Bloom wrote:
> On Mon, Mar 13, 2023 at 9:53 AM Alan Cudmore
> wrote:
> >
> > Thanks for taking a look. Comments below.
> >
> > On Mon, Mar 13, 2023 at 11:04 AM Gedare Bloom wrote:
> >>
> >> On T
Thanks for taking a look. Comments below.
On Mon, Mar 13, 2023 at 11:04 AM Gedare Bloom wrote:
> On Thu, Mar 9, 2023 at 8:48 PM Alan Cudmore
> wrote:
> >
> > This patch set adds support for the Kendryte K210 RISC-V BSP variant.
> > The SoC uses existing PLIC, Timer, a
added. This is a generally good approach
> when integrating code vs build changes, so that you don't try to build
> something that doesn't exist.
>
> On Thu, Mar 9, 2023 at 8:48 PM Alan Cudmore
> wrote:
> >
> > This patch includes the spec/build options for the riscv kendryte
: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: riscv
+bsp: kendrytek210
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2022 Alan Cudmore
+cppflags: []
+enabled-by: true
+family: riscv
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid
ps/riscv/riscv/dts/kendryte-k210.dts
b/bsps/riscv/riscv/dts/kendryte-k210.dts
new file mode 100644
index 00..379aaf01a3
--- /dev/null
+++ b/bsps/riscv/riscv/dts/kendryte-k210.dts
@@ -0,0 +1,216 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) Alan Cudmore
+ * Cop
is addded.
Manufacturer, board links, and other information can be found in
ticket #4876.
Documentation that describes how to build and run the BSP on the
boards and simulator has been prepared and will be submitted after the bsp
is merged.
Updates #4876
Alan Cudmore (2):
spec: add riscv Kendryte
On Fri, Feb 24, 2023 at 4:09 AM Christian MAUDERER <
christian.maude...@embedded-brains.de> wrote:
> On 2023-02-24 03:52, Alan Cudmore wrote:
> > Hi all,
> >
> > On Thu, Feb 23, 2023 at 4:00 PM Karel Gardas
> > wrote:
> >
> >
> > Hi Pra
Improving Raspberry Pi 4 support would be a great GSOC project. Right now
the Beagleboard is my default for a low cost network enabled RTEMS board.
But a Pi4 with network and SMP support would be a great board to learn
RTEMS. Even better if the supply problems are addressed this year. In
addition
Hi all,
On Thu, Feb 23, 2023 at 4:00 PM Karel Gardas
wrote:
>
> Hi Prakhar,
>
> On 2/23/23 20:23, Prakhar Agrawal wrote:
> > I completely agree with all your points, but my rationale for
> > introducing the jetson nano or jetson AGX orin was because of their GPU
> > power.
>
> it's really nice
don't think there are any binary blobs needed, and an RTEMS image
can just be flashed to the boards using a "kflash.py" utility that is
available through pip, so getting started is easy: Just build RTEMS
images and either run on renode or flash via USB cable.
Alan
>
> On Thu, Dec 1,
Hi,
I have been working on a basic BSP for the Kendryte K210 RISC-V CPU,
and I was wondering if the community members would like me to submit
it.
The Kendryte K210 is a dual core 64 bit RISC-V processor with a wealth
of peripheral I/O, a built-in AI NPU, and 8 Megabytes of on-chip SRAM.
I like it
Hi Frank,The cFS uses files for:Loading individual applications. The current build system can link all applications with the cFE core and the OS image avoiding the need for dynamic loading.The cFE Executive Services startup scriptTable service filesAnd as you mention, any cFS application that uses
Hi,
I am running testsuite applications on a dual core RISC-V CPU. When I
run samples such as ticker.exe, the test ends without error messages.
On SMP tests, the tests seem to run correctly and end, but there is
always a fatal error from thread(s) on the other CPU.
(RTEMS_FATAL_SOURCE_SMP)
My
Hi Sam,You need to add the timer.h file to the list of files to be installed:https://git.rtems.org/rtems/tree/spec/build/bsps/microblaze/microblaze_fpga/obj.yml#n14Alan From: Sam PriceSent: Sunday, November 6, 2022 12:52 AMTo: DevelopmentSubject: Re: Microblaze 2nd timer interrupt I pushed my
This patch adds details on the packages needed for the RTEMS
source builder on openSUSE Leap 15.4 64 bit. The commands
were tested on a new install with the RTEMS source builder
master branch.
---
user/hosts/posix.rst | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff
On Fri, Oct 28, 2022 at 8:07 AM Sebastian Huber
wrote:
>
> On 22/10/2022 17:36, Alan Cudmore wrote:
> > On Thu, Oct 20, 2022 at 11:23 PM Alan Cudmore
> > wrote:
> >> On Thu, Oct 20, 2022 at 2:13 AM Sebastian Huber
> >> wrote:
> >>>
>
I agree – I am working on a riscv BSP variant (Sipeed MAIX Bit with K210 CPU) where the RTEMS image can be flashed directly to the board and boots without a bootloader.I was also wondering if the statement “Each variant corresponds to a GCC multilib” is still accurate as BSP variants such as the
On Thu, Oct 20, 2022 at 11:23 PM Alan Cudmore wrote:
>
> On Thu, Oct 20, 2022 at 2:13 AM Sebastian Huber
> wrote:
> >
> >
> >
> > On 20/10/2022 03:48, Alan Cudmore wrote:
> > > On Wed, Oct 19, 2022 at 12:24 AM Sebastian Huber
> > > wrote:
&g
On Thu, Oct 20, 2022 at 2:13 AM Sebastian Huber
wrote:
>
>
>
> On 20/10/2022 03:48, Alan Cudmore wrote:
> > On Wed, Oct 19, 2022 at 12:24 AM Sebastian Huber
> > wrote:
> >>
> >> On 18/10/2022 21:02, Alan Cudmore wrote:
> >>> *From: *Seba
On Wed, Oct 19, 2022 at 12:24 AM Sebastian Huber
wrote:
>
> On 18/10/2022 21:02, Alan Cudmore wrote:
> > *From: *Sebastian Huber <mailto:sebastian.hu...@embedded-brains.de>
> > *Sent: *Tuesday, October 18, 2022 11:15 AM
> > *To: *Alan Cudmore <mailto:alan.c
From: Sebastian HuberSent: Tuesday, October 18, 2022 11:15 AMTo: Alan Cudmore; j...@rtems.orgCc: rtems-de...@rtems.orgSubject: Re: Ping on ticket 4728 + patch On 18/10/2022 16:36, Alan Cudmore wrote:> On Tue, Oct 18, 2022 at 9:55 AM Joel Sherrill wrote:>> >> >> On Tue, Oc
On Tue, Oct 18, 2022 at 9:55 AM Joel Sherrill wrote:
>
>
>
> On Tue, Oct 18, 2022 at 8:44 AM Alan Cudmore wrote:
>>
>> The log does have the error, and I get it when building by hand too:
>> start.o: in function `.L0 ':
>> /home/alan/rtems/test-bu
Sun, Oct 16, 2022 at 9:32 AM Alan Cudmore > <mailto:alan.cudm...@gmail.com>> wrote:
> >
> > On Fri, Oct 14, 2022 at 9:19 AM Joel Sherrill > <mailto:j...@rtems.org>> wrote:
> > >
> > > Pushed. Thanks for pinging. It does help.
>
dation-io-kernel.exe
collect2: error: ld returned 1 exit status
I need to investigate this more.
> It might be nothing more than a test which doesn't fit in some section
> but I have no idea beyond that they are all noted as SMP. Chris may be
> helpful decoding the precise configuration.
eyond that they are all noted as SMP. Chris may be
> helpful decoding the precise configuration.
>
> --joel
>
> On Thu, Oct 13, 2022 at 8:27 PM Alan Cudmore wrote:
>>
>> Hi,
>> Sorry, I did not set a message subject in my previous email.
>>
>> Ping o
Hi,
Sorry, I did not set a message subject in my previous email.
Ping on this patch. I built all of the riscv/riscv BSPs that use it.
It works for the generic riscv/qemu BSP, the PolarFire BSP, and the
RISC-V BSP I am working on where the macro failed.
Ping on this patch. I built all of the riscv/riscv BSPs that use it.
It works for the generic riscv/qemu BSP, the PolarFire BSP, and the
RISC-V BSP I am working on where the macro failed.
https://lists.rtems.org/pipermail/devel/2022-September/073390.html
Thanks,
Alan
Hi Joel,This is relevant to my interests since I am working on a RISC-V BSP variant and I am adding a few options in the spec/build/bsps/riscv/riscv directory.Could this instance be fixed by moving it to the spec/build/bsps/riscv directory?Regards,AlanFrom: Joel SherrillSent: Wednesday, October
Ping for this RISC-V console fix - it builds without error on 310ARTY,
Polarfire, and generic RISCV variants. I tested it on the generic QEMU
riscv platform and Padmarao tested it on the PolarFire.
Thanks,
Alan
On Thu, Sep 29, 2022 at 12:12 PM Alan Cudmore
wrote:
> This fixes a prob
The merged BSP works for me, and I have the cFS bundle (
https://github.com/nasa/cfs) running on my Pi4.
What is the best way to support the ethernet, rtems-libbsd? It looks like
FreeBSD supports the Pi4 ethernet device. Any pointers to how libbsd
integration works for a RTEMS BSP?
On Wed, Oct 5,
Hi Padmarao,
The docs look good to me. I have a couple of minor comments inline.
I'm really glad to see this BSP in RTEMS.
Thanks,
Alan
On Wed, Sep 28, 2022 at 4:07 PM Padmarao Begari <
padmarao.beg...@microchip.com> wrote:
> Update the riscv documentation for the Microchip PolarFire SoC
> BSP
Hi Noor,
Looks good and builds for me - I have a few minor comments. Please see
inline comments below.
Thanks,
Alan
On Wed, Oct 5, 2022 at 1:41 AM Mohd Noor Aman
wrote:
> This patch adds the relevant documentations required for booting the new
> BSP.
> JTAG support is added for debugging. I
he following disclaimer in
>>>> the
>>>> + *documentation and/or other materials provided with the
>>>> distribution.
>>>> + *
>>>> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
>>>> "AS IS"
&
Hi Padmarao,Could you try this patch on your Polarfire board? It works on the generic QEMU BSP and the BSP I am working on which uses the FRDME310ARTY/SiFive UART. It builds with the Polarfire BSP, but I am not able to test it. I downloaded and built QEMU that has Polarfire support, but I need to
This fixes a problem with parsing the FDT compatible property by
replacing the RISCV_CONSOLE_IS_COMPATIBLE macro with calls to
the fdt_stringlist_contains function. The macro only works when
the compatible FDT entry is a single string and not a list of
strings. The new call will compare each item
gt; +extern "C" {
> +#endif /* __cplusplus */
> +
> +#define BSP_ARM_GIC_CPUIF_BASE 0xFF842000
> +#define BSP_ARM_GIC_DIST_BASE 0xFF841000
> +
> +#define BSP_RPI4_PL011_BASE 0xFE201000
> +#define BSP_RPI4_PL011_LENGTH 0x200
> +
> +#ifdef __cplusplus
> +}
> +#
: William Moore; Alan Cudmore; Hesham Moustafa; rtems-de...@rtems.orgSubject: rtems-tester for raspberry pi 4B Hey,Now that I have built a BSP, I wanted to run the rtems-tester for Raspberry Pi. But I'm confused on what to do now. The raspberry pi 2 bsp required u-boot in order to run the test which
I built the TF-A binary, your dev branch, used the config.txt described below, and was able to run unlimited.exe. (I’m using a Pi4b 2GB)Great milestone!Alan From: Noor AmanSent: Monday, September 19, 2022 11:11 AMTo: William Moore; Alan Cudmore; Hesham Moustafa; rtems-de...@rtems.orgSubject
Hi Padmarao,
The patches apply cleanly and build for me. What is the recommended
config.ini file for this BSP?
I used:
[riscv/mpfs64imafdc]
BUILD_TESTS=True
RTEMS_POSIX_API=True
RTEMS_SMP=True
BSP_START_COPY_FDT_FROM_U_BOOT=False
BSP_DTB_IS_SUPPORTED=True
BSP_DTB_HEADER_PATH=bsp/mpfs-dtb.h
I
Great progress Noor!
I will try your branch today.
Alan
On Mon, Sep 19, 2022 at 12:15 PM Joel Sherrill wrote:
>
>
> On Mon, Sep 19, 2022 at 10:11 AM Noor Aman wrote:
>
>> Hey everyone,
>> I've managed to get RTEMS6 on the Raspberry pi 4B rev 1.4. Every test ran
>> fine except for minimum.exe,
Note: Resending after learning how to use git send-email, please disregard
previous message.
This fixes the riscv fe310 console driver fe310_uart_read function. The function
reads the RX status/data register to check if data is available, but discards
the data and reads it a seconds time.
Also
From: Alan Cudmore
This fixes the riscv fe310 console driver fe310_uart_read function. The
function
reads the RX status/data register to check if data is available, but
discards
the data and reads it a second time.
Also cleared the interrupt enable bit in the first_open function.
Close #4719
Hi Padmarao,
Please see my inline comments below
On Wed, Sep 14, 2022 at 12:51 AM wrote:
> Hi Alan,
>
> > On Tue, 2022-09-13 at 23:57 -0400, Alan Cudmore wrote:
> >
> > Hi Padmarao,
> > I am working on a RISC-V bsp variant for the Kendryte K210 and I am
> >
B_SIZE_MAX 0
#endif
@@ -76,5 +80,9 @@ void bsp_fdt_copy(const void *src)
const void *bsp_fdt_get(void)
{
+#if BSP_DTB_IS_SUPPORTED
+ return system_dtb;
+#else
return _fdt_blob[0];
+#endif
}
On Wed, Sep 14, 2022 at 9:16 AM Alan Cudmore wrote:
> Hi Padmarao,
> Please see my inlin
Hi Padmarao,
I am working on a RISC-V bsp variant for the Kendryte K210 and I am also
using an included DTB. For my k210 bsp, I changed
riscv/shared/start/start.S to set the address of the DTB array before
calling bsp_fdt_copy. If we change start.S to handle the following three
cases, we would not
#define BSP_ARM_GIC_CPUIF_BASE 0x0801
#define BSP_ARM_GIC_DIST_BASE 0x0800
#define BSP_ARM_GIC_REDIST_BASE 0x080A
In RT-Thread they use addresses starting at 0xFF84 (I think..) Should
these be offset as well?
Thanks,
Alan
> Thanks,
> Noor
>
> On Sat, 3 Sept 2022 at 22:05,
optimization and everything soon. Thanks On Fri, 2 Sept 2022 at 23:31, Alan Cudmore <alan.cudm...@gmail.com> wrote:Hi Noor,Can you describe the setup you use for testing the BSP?I can set up my Pi 4 to try running your code as you update it. How do you setup the OCD connection? Thanks,Alan On Fri,
Hi Noor,
Can you describe the setup you use for testing the BSP?
I can set up my Pi 4 to try running your code as you update it. How do you
setup the OCD connection?
Thanks,
Alan
On Fri, Sep 2, 2022 at 11:48 AM Noor Aman wrote:
> Hey all,
> Raspberry Pi 4B MMU seems to be enabled, as reported
to the part of the repo? I think that would be ok to do. So do I need to do this for getting a review too? And Thanks for rt-thread link. It solves my issue for mailbox and others too :) On Fri, 22 Jul 2022 at 18:24, Alan Cudmore <alan.cudm...@gmail.com> wrote:Hi Noor,Following up with some addi
Hi Noor,Following up with some additional thoughts:My approach for development for this BSP would be to focus on getting it working on a GitHub fork of the RTEMS repo. It could be messy while you are getting it working, but that is the fun part, in my opinion. If you need help or advice, you could
Joel, I don't think we need to commit the file now.
Some suggestions:
- Let's not put RPI2 or RPI3 defines or ifdefs in the file if it's only
going to be for the Aarch64 RPI4 BSP
- If it will be only used for the RPI4, it might be confusing to have the
BCM2836 defines rather than using BCM2711
-
I verified that my RPi400 (RPi4 with keyboard) enables the console on UART
1, the "Mini UART" by default. (0xfe215040)
If I add this line to config.txt on the SD card:
dtoverlay=disable-bt
The console comes up with the PL011 UART on the same pins (0xfe201000)
So if you want to use the PL011 UART
This is for the rtems-net-legacy repository. The patch fixes the
rtems-net-legacy build failure due to change in _Thread_Get_CPU_time_used
parameter change in rtems 6. I have only tried building the i386/pc686 BSP.
---
libtest/testbusy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
This patch is for the rtems-docs repo. I added details on the procedure I
used to boot RTEMS images on the Xilinx ZCU102 board. I applied this patch,
and generated the HTML docs, and everything looks ok to me.
Thanks,
Alan
---
user/bsps/aarch64/xilinx-zynqmp.rst | 138
On Thu, Oct 14, 2021 at 11:39 AM Joel Sherrill wrote:
>
> On Thu, Oct 14, 2021 at 10:18 AM Alan Cudmore wrote:
> >
> > Hi,
> > I tried to use the RSB master branch to build an RTEMS 6 toolchain on
> > a Raspberry Pi 4 running Ubuntu 20.04 64 bit (Aarch64
Hi,
I tried to use the RSB master branch to build an RTEMS 6 toolchain on
a Raspberry Pi 4 running Ubuntu 20.04 64 bit (Aarch64).
It fails on expat-2.1.0, with the log saying that expat does not
recognize Aarch64.
The expat package on the Ubuntu distribution is 2.2.10.
Would this be as simple as
The master branch works for me. I tried the raspberrypi and
raspberrypi2 BSPS and they work fine. I built the beagleboneblack BSP
but did not run it.
When this one line patch is installed, SMP works too:
https://lists.rtems.org/pipermail/devel/2021-August/068832.html
Alan
On Mon, Aug 9, 2021 at
/* Load VBAR */
+mcr p15, 0, r1, c7, c5, 4 /* Flush Prefetch */
#endif
SWITCH_FROM_ARM_TO_THUMBr3
On Thu, Jul 1, 2021 at 10:02 AM Sebastian Huber
wrote:
>
> On 01/07/2021 15:43, Alan Cudmore wrote:
> > The define works, but Armv6 does no
On Thu, Jul 1, 2021 at 8:20 AM Sebastian Huber
wrote:
>
> On 29/06/2021 21:09, Alan Cudmore wrote:
> >> On 29/06/2021 20:56, Alan Cudmore wrote:
> >>> I understand the move in that commit now.
> >>> Maybe it's not working on the single core models because
Also, if you do not have time, we could research a solution ( guidance
is welcome! )
Alan
On Tue, Jun 29, 2021 at 3:09 PM Alan Cudmore wrote:
>
> On Tue, Jun 29, 2021 at 3:01 PM Sebastian Huber
> wrote:
> >
> > On 29/06/2021 20:56, Alan Cudmore wrote:
> > > I unde
On Tue, Jun 29, 2021 at 3:01 PM Sebastian Huber
wrote:
>
> On 29/06/2021 20:56, Alan Cudmore wrote:
> > I understand the move in that commit now.
> > Maybe it's not working on the single core models because the code is
> > conditional for ARMV7 + A or ARMV8?
> > ht
the conditional defines come from the compiler?
Thanks,
Alan
On Tue, Jun 29, 2021 at 1:42 AM Sebastian Huber
wrote:
>
> Hello Alan,
>
> On 29/06/2021 03:13, Alan Cudmore wrote:
> > The current RTEMS 6/master branch does not seem to work on the
> > Raspberry Pi single core models,
Hi,
The current RTEMS 6/master branch does not seem to work on the
Raspberry Pi single core models, while the 5 branch does.
I was able to track it down to a commit where it stopped working:
272534eb725f2486b7a32b39d998202a101bd36e
In that commit, the call:
/* Clear Secure or Non-secure Vector
Hi,
This patch works for me. I can build and run the latest rtems master
branch samples on the RPI 2 and 3.
The samples do not run on the single core models, but it is not
related to this patch. I have a patch for the single core models, and
when combined with this patch I can get the samples to
to configure the console
with your patch on the RTEMS 5 branch.
- Finally, we need to figure out how to get the master/6 branch working again.
Thanks!
Alan
On Thu, May 20, 2021 at 7:41 AM Alan Cudmore wrote:
>
> Hi Niteesh,
> I tried your firmware, booting directly instead of using
1 at 8:49 AM Niteesh G. S. wrote:
>>> >
>>> > Hi Alan,
>>> >
>>> > On Thu, May 6, 2021 at 6:12 PM Alan Cudmore
>>> > wrote:
>>> >>
>>> >> Hi Niteesh,
>>> >>
>>> >> I was hop
?
I know I have been through this before.
Thanks,
Alan
On Thu, May 6, 2021 at 10:48 AM Niteesh G. S. wrote:
>
> Hi Alan,
>
> On Thu, May 6, 2021 at 6:12 PM Alan Cudmore wrote:
>>
>> Hi Niteesh,
>>
>> I was hoping to try this out as soon as I get some ti
Hi Niteesh,I was hoping to try this out as soon as I get some time. No later than weekend. So if nobody else is able to check it out, I will be able to provide some feedback soon.I should be able to bring up the console on a RPi Zero W and RPi3, correct? Thanks,Alan From: Niteesh G. S.Sent:
Hi,
I can try to give you some background, hopefully others will correct
me if I don't get everything right.
You are correct that the BSP just covers the original Pi1 and Pi Zero
(not Pi Zero W) models + the Pi 2. I don't think the I2C and GPIO
interfaces were ported to the Pi2. At some point, I
On Thu, Oct 15, 2020 at 3:03 PM Chris Johns wrote:
>
> On 16/10/20 5:22 am, Alan Cudmore wrote:
> > On Thu, Oct 15, 2020 at 11:19 AM Gedare Bloom wrote:
> >>
> >> On Thu, Oct 15, 2020 at 6:35 AM Joel Sherrill wrote:
> >>>
> >>>
> &g
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