[PATCH v1 1/1] rtems-tools: Update rtems-llvm to version 11.1.0

--- rtems/config/6/rtems-llvm.bset | 2 +- rtems/config/tools/rtems-llvm-11.1.0.cfg | 21 + source-builder/config/llvm-common-1.cfg | 6 +++--- 3 files changed, 25 insertions(+), 4 deletions(-) create mode 100644 rtems/config/tools/rtems-llvm-11.1.0.cfg diff

[PATCH v1 0/1] Update rtems-llvm to version 11.1.0

this with this patch? Have a nice weekend, Jan Jan Sommer (1): rtems-tools: Update rtems-llvm to version 11.1.0 rtems/config/6/rtems-llvm.bset | 2 +- rtems/config/tools/rtems-llvm-11.1.0.cfg | 21 + source-builder/config/llvm-common-1.cfg | 6 +++--- 3 files

[PATCH v1 1/1] gpiolib/grgpio: Add support for newer grgpio features

- Use proper typedef for isr (avoid warning in user application) - Use set input enable register together with pin direction - Support irqgen == 1 mode if present in capabilities register --- bsps/include/grlib/gpiolib.h | 7 +-- bsps/include/grlib/grlib.h| 4 +++-

[PATCH v1 0/1] Add support for newer grgpio features

Hello, I noticed the lack of some features of modern grgpio ip cores in gpiolib. I would also like to backport this to rtems5. The corresponding ticket is here: https://devel.rtems.org/ticket/4464 v2: Fixed tabs/spaces issues. Jan Sommer (1): gpiolib/grgpio: Add support for newer grgpio

[PATCH v1] gpiolib/grgpio: Add support for newer grgpio features

- Use proper typedef for isr (avoid warning in user application) - Use set input enable register together with pin direction - Support irqgen == 1 mode if present in capabilities register --- bsps/include/grlib/gpiolib.h | 7 +-- bsps/include/grlib/grlib.h| 4 +++-

[PATCH v2 1/1] bsps/i386: Update calibration of TSC to be more accurate

Closes #4455 --- bsps/i386/pc386/clock/ckinit.c | 71 ++ 1 file changed, 38 insertions(+), 33 deletions(-) diff --git a/bsps/i386/pc386/clock/ckinit.c b/bsps/i386/pc386/clock/ckinit.c index 09afe73cde..2df1818dd3 100644 --- a/bsps/i386/pc386/clock/ckinit.c +++

[PATCH v2 0/1] bsps/i386: Update calibration of TSC to be more accurate

tps://devel.rtems.org/ticket/4456 Best regards, Jan Jan Sommer (1): bsps/i386: Update calibration of TSC to be more accurate bsps/i386/pc386/clock/ckinit.c | 71 ++ 1 file changed, 38 insertions(+), 33 deletions(-) -- 2.1

[PATCH v1] bsps/i386: Update calibration of TSC to be more accurate

Closes #4455 --- bsps/i386/pc386/clock/ckinit.c | 72 ++ 1 file changed, 39 insertions(+), 33 deletions(-) diff --git a/bsps/i386/pc386/clock/ckinit.c b/bsps/i386/pc386/clock/ckinit.c index 09afe73cde..cbd2360fde 100644 --- a/bsps/i386/pc386/clock/ckinit.c +++

[PATCH v1] bsps/riscv: Give enough time for clock driver initialization

- Clock driver initialization for secondary cores had to take less than one tick - If tick time is small (i.e. <= 1ms) setting up all cores could take too long and a fatal error is thrown. - Give at least 10 ms time for clock initialization to avoid this error ---

[PATCH v2 2/2] i386: Remove unneeded include header files

--- .../sys/i386/include/machine/intr_machdep.h |6 - rtemsbsd/include/x86/bus.h| 1109 rtemsbsd/include/x86/specialreg.h | 1143 - 3 files changed, 2258 deletions(-) delete mode 100644

[PATCH v2 1/2] waf_libbsd.py: Apply path-mappings to header-paths

--- libbsd.py | 2 +- waf_libbsd.py | 27 +-- 2 files changed, 18 insertions(+), 11 deletions(-) diff --git a/libbsd.py b/libbsd.py index add91e5a..c9151901 100644 --- a/libbsd.py +++ b/libbsd.py @@ -144,6 +144,7 @@ _defaults = { ('freebsd/sys/dev/pci',

[PATCH v2 0/2] [libbsd] i386: Install correct machine include headers

, to fix the issues with the duality of the include paths for i386/x86. Best regards, Jan Jan Sommer (2): waf_libbsd.py: Apply path-mappings to header-paths i386: Remove unneeded include header files .../sys/i386/include/machine/intr_machdep.h |6 - libbsd.py

[PATCH v1 1/2] rtemsbd: Remove machine dependent files and use the ones from freebsd

- Remove cpufunc.h, bus.h and _bus.h from rtemsbd. Otherwise the same files will be installed for all target architectures which can lead to incompatibilities - Instead use the machine dependent header files from freebsd --- freebsd/sys/arm/include/machine/_bus.h| 47 +

[PATCH v1 0/2] [libbsd] Install correct machine include headers

am not familiar with the bus space and there is a lot of macro magic going on)? Also, I am not sure if I always added the header files in the right module in libbsd.py. Any suggestions where to put them instead would be welcome. Best regards, Jan Jan Sommer (2): rtemsbd: Remove machine depende

[PATCH v1 2/2] machine: Add machine dependent header files to libbsd.py

--- libbsd.py | 26 +++--- waf_libbsd.py | 2 -- 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/libbsd.py b/libbsd.py index add91e5a..248af993 100644 --- a/libbsd.py +++ b/libbsd.py @@ -104,6 +104,7 @@ _defaults = { # (source, [targets..])

[PATCH 4/5] bsps/xilinx_zynq: Add Xilinx AXI SPI driver to build

Closes #4370 --- bsps/arm/headers.am| 2 ++ c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 1 + c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 1 + 3 files changed, 4 insertions(+) diff --git a/bsps/arm/headers.am b/bsps/arm/headers.am index 007412fee0..69a154f6b2

[PATCH 5/5] shell: Add i2c and spi commands

From: Christian Mauderer This adds some commands that are usefull for debugging simple serial interfaces. Even if they are a complete re-implementation, the i2c* commands use a simmilar call like the Linux i2c tools. Closes #4371 --- cpukit/Makefile.am| 4 +

[PATCH 3/5] bsps/xilinx_zynq: Add SPI driver for xilinx-axi-spi

/include/bsp/xilinx-axi-spi-regs.h @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2021 Jan Sommer, German Aerospace Center (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following

[rtems5 PATCH 0/5] Backport zynq SPI drivers to rtems5

Jan Christian Mauderer (1): shell: Add i2c and spi commands Jan Sommer (4): bsps/xilinx_zynq: Add SPI driver for cadence-spi bsps/xilinx_zynq: Add cadence SPI driver to build system bsps/xilinx_zynq: Add SPI driver for xilinx-axi-spi bsps/xilinx_zynq: Add Xilinx AXI SPI driver to build b

[PATCH 1/5] bsps/xilinx_zynq: Add SPI driver for cadence-spi

-spi-regs.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2021 Jan Sommer, German Aerospace Center (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met

[PATCH 2/5] bsps/xilinx_zynq: Add cadence SPI driver to build system

Closes #4369 --- bsps/arm/headers.am| 2 ++ c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 3 +++ c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 3 +++ 3 files changed, 8 insertions(+) diff --git a/bsps/arm/headers.am b/bsps/arm/headers.am index

[PATCH v2 0/1] Add per cpu clock interrupt

v2: Added check against counter wrap-around during intialization @Gedare: Could you please re-approve? The changes compared to the previous version are just cosmetic. Jan Sommer (1): bsps/riscv: Add per cpu clock interrupt bsps/include/bsp/fatal.h | 1 + bsps/riscv/riscv/clock

[PATCH v2 1/1] bsps/riscv: Add per cpu clock interrupt

- Fixes failure of test smpclock01 --- bsps/include/bsp/fatal.h | 1 + bsps/riscv/riscv/clock/clockdrv.c | 64 ++- 2 files changed, 55 insertions(+), 10 deletions(-) diff --git a/bsps/include/bsp/fatal.h b/bsps/include/bsp/fatal.h index

[PATCH] bsps/riscv: Add per cpu clock interrupt

- Fixes failure of test smpclock01 --- bsps/riscv/riscv/clock/clockdrv.c | 61 +-- 1 file changed, 50 insertions(+), 11 deletions(-) diff --git a/bsps/riscv/riscv/clock/clockdrv.c b/bsps/riscv/riscv/clock/clockdrv.c index d085b6bd95..04abe24545 100644 ---

[PATCH 1/3] bsps/xilinx_zynq: Add SPI driver for xilinx-axi-spi

/include/dev/spi/xilinx-axi-spi-regs.h @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2021 Jan Sommer, German Aerospace Center (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following

[PATCH 3/3] bsps/xilinx_zynq: Add Xilinx AXI SPI driver to autotools build

Closes #4321 --- bsps/headers.am| 2 ++ c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 1 + c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 1 + 3 files changed, 4 insertions(+) diff --git a/bsps/headers.am b/bsps/headers.am index 37ce6d6c73..3d95f144d4 100644

[PATCH 0/3] Add spidev driver for Xilinx AXI Quad SPI device

This patchset adds a spidev driver for the Xilinx AXI Quad SPI device. It currently supports Standard SPI mode. Thanks goes to Rick van der Wal for testing the driver with his SPI IMU. Jan Sommer (3): bsps/xilinx_zynq: Add SPI driver for xilinx-axi-spi bsps/shared: Add Xilinx-AXI SPI driver

[PATCH 2/3] bsps/shared: Add Xilinx-AXI SPI driver to waf

Updates #4321 --- spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml | 2 ++ spec/build/bsps/arm/xilinx-zynq/grp.yml| 2 ++ .../bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml | 2 ++ spec/build/bsps/objdevspixil.yml | 18 ++ 4 files changed, 24 insertions(+)

[PATCH v5 3/3] bsps/xilinx_zynq: Add SPI driver to autotools build

Closes #4320 --- bsps/headers.am| 5 + c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 3 +++ c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 3 +++ 3 files changed, 11 insertions(+) diff --git a/bsps/headers.am b/bsps/headers.am index 1b82382db8..37ce6d6c73

[PATCH v5 2/3] bsps/xilinx_zynq: Add SPI driver to waf

Updates #4320 --- spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml | 2 ++ spec/build/bsps/arm/xilinx-zynq/grp.yml| 2 ++ .../bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml | 2 ++ spec/build/bsps/objdevspizynq.yml | 18 ++ 4 files changed, 24 insertions(+)

[PATCH v5 1/3] bsps/xilinx_zynq: Add SPI driver for cadence-spi

-spi-regs.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2021 Jan Sommer, German Aerospace Center (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met

[PATCH v5 0/3] Add cadence-SPI driver

API. Jan Sommer (3): bsps/xilinx_zynq: Add SPI driver for cadence-spi bsps/xilinx_zynq: Add SPI driver to waf bsps/xilinx_zynq: Add SPI driver to autotools build bsps/headers.am | 5 + bsps/include/dev/spi/cadence-spi-regs.h | 84 bsps/include/dev

[PATCH 2/2] bsps/shared: Allow setting baud rate for zynq uart

Closes #4236 --- bsps/arm/shared/serial/zynq-uart.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/bsps/arm/shared/serial/zynq-uart.c b/bsps/arm/shared/serial/zynq-uart.c index a0dfc0c929..f298719fde 100644 --- a/bsps/arm/shared/serial/zynq-uart.c +++

[5 PATCH 0/2] Backport fixes to zynq uart to RTEMS5

go as part of the 5.2 release preparation? Best regards, Jan Jan Sommer (1): bsps/shared: Allow setting baud rate for zynq uart Kinsey Moore (1): zynq-uart: Fix set_attributes implementation bsps/arm/include/bsp/zynq-uart.h | 7 +++ bsps/arm/shared/serial/zynq-uart-polled.c

[PATCH 1/2] zynq-uart: Fix set_attributes implementation

From: Kinsey Moore The zynq-uart set_attributes implementation was configured to always return false which causes spconsole01 to fail. This restores the disabled implementation which sets the baud rate registers appropriately and allows spconsole01 to pass. This also expands the set_attributes

[PATCH v2] user/bsps: Mention fixed console baud rate for zynq

--- user/bsps/arm/xilinx-zynq.rst | 12 1 file changed, 12 insertions(+) diff --git a/user/bsps/arm/xilinx-zynq.rst b/user/bsps/arm/xilinx-zynq.rst index 365c336..29f9cb0 100644 --- a/user/bsps/arm/xilinx-zynq.rst +++ b/user/bsps/arm/xilinx-zynq.rst @@ -37,6 +37,18 @@ to return the

[PATCH v3 0/1] Enable baud rate selection for zynq uart

application. Best regards, Jan Jan Sommer (1): bsps/shared: Allow setting baud rate for zynq uart bsps/shared/dev/serial/zynq-uart.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) -- 2.17.1 ___ devel mailing list devel

[PATCH v3 1/1] bsps/shared: Allow setting baud rate for zynq uart

--- bsps/shared/dev/serial/zynq-uart.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/bsps/shared/dev/serial/zynq-uart.c b/bsps/shared/dev/serial/zynq-uart.c index 8f17d3ca65..cd0d0e7584 100644 --- a/bsps/shared/dev/serial/zynq-uart.c +++

[PATCH] MAINTAINERS: Add myself to write after approval

...@gmail.com Amaan Cheval am...@rtems.org Vijay Kumar Banerjee vi...@rtems.org +Jan Sommer j...@rtems.org Localized Write Permission == -- 2.17.1 ___ devel mailing list devel@rtems.org http

[PATCH v2 0/1] Enable baud rate selection for zynq uart

v2: - Use rtems_baud_to_number instead of duplicating baud table This patch allows to set the baud rate of the zynq-uart using the termios API. I could change the baud rate successfully on hardware using the termios application. Best regards, Jan Jan Sommer (1): bsps/shared: Allow

[PATCH v2 1/1] bsps/shared: Allow setting baud rate for zynq uart

--- bsps/shared/dev/serial/zynq-uart.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/bsps/shared/dev/serial/zynq-uart.c b/bsps/shared/dev/serial/zynq-uart.c index 8f17d3ca65..dd5a6e1cb8 100644 --- a/bsps/shared/dev/serial/zynq-uart.c +++

[PATCH v1 0/1] Enable baud rate selection for zynq uart

This patch allows to set the baud rate of the zynq-uart using the termios API. I could change the baud rate successfully on hardware using the termios application. Best regards, Jan Jan Sommer (1): bsps/shared: Allow setting baud rate for zynq uart bsps/shared/dev/serial/zynq-uart.c

[PATCH v1 1/1] bsps/shared: Allow setting baud rate for zynq uart

--- bsps/shared/dev/serial/zynq-uart.c | 42 +++--- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/bsps/shared/dev/serial/zynq-uart.c b/bsps/shared/dev/serial/zynq-uart.c index 8f17d3ca65..124f9e032d 100644 --- a/bsps/shared/dev/serial/zynq-uart.c +++

[PATCH v4 1/3] bsps/xilinx_zynq: Add SPI driver for cadence-spi

@@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 Jan Sommer, German Aerospace Center (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1

[PATCH v4 0/3] Add cadence-SPI driver

for the cadence-spi device of the Xilinx Zynq-7000 based SoCs using the spidev API. Jan Sommer (3): bsps/xilinx_zynq: Add SPI driver for cadence-spi bsps/xilinx_zynq: Add SPI driver to waf bsps/xilinx_zynq: Add SPI driver to autotools build bsps/headers.am | 5

[PATCH v4 3/3] bsps/xilinx_zynq: Add SPI driver to autotools build

--- bsps/headers.am| 5 + c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 3 +++ c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 3 +++ 3 files changed, 11 insertions(+) diff --git a/bsps/headers.am b/bsps/headers.am index 1b82382db8..37ce6d6c73 100644 ---

[PATCH v4 2/3] bsps/xilinx_zynq: Add SPI driver to waf

--- spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml | 2 ++ spec/build/bsps/arm/xilinx-zynq/grp.yml| 2 ++ .../bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml | 2 ++ spec/build/bsps/objdevspizynq.yml | 18 ++ 4 files changed, 24 insertions(+) create mode 100644

[PATCH rtems-docs] user/bsps: Mention fixed console baud rate for zynq

--- user/bsps/arm/xilinx-zynq.rst | 14 ++ 1 file changed, 14 insertions(+) diff --git a/user/bsps/arm/xilinx-zynq.rst b/user/bsps/arm/xilinx-zynq.rst index 365c336..dcc0649 100644 --- a/user/bsps/arm/xilinx-zynq.rst +++ b/user/bsps/arm/xilinx-zynq.rst @@ -37,6 +37,20 @@ to return

[PATCH v3 2/3] bsps/xilinx_zynq: Add SPI driver to waf

--- spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml | 2 ++ spec/build/bsps/arm/xilinx-zynq/grp.yml| 2 ++ .../bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml | 2 ++ spec/build/bsps/objdevspizynq.yml | 18 ++ 4 files changed, 24 insertions(+) create mode 100644

[PATCH v3 0/3] Add cadence-SPI driver

using the spidev API. Jan Sommer (3): bsps/xilinx_zynq: Add SPI driver for cadence-spi bsps/xilinx_zynq: Add SPI driver to waf bsps/xilinx_zynq: Add SPI driver to autotools build bsps/headers.am | 5 + bsps/include/dev/spi/cadence-spi-regs.h | 84

[PATCH v3 1/3] bsps/xilinx_zynq: Add SPI driver for cadence-spi

@@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 Jan Sommer, Deutsches Zentrum für Luft- und Raumfahrt e. V. (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions

[PATCH v3 3/3] bsps/xilinx_zynq: Add SPI driver to autotools build

--- bsps/headers.am| 5 + c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 3 +++ c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 3 +++ 3 files changed, 11 insertions(+) diff --git a/bsps/headers.am b/bsps/headers.am index 1b82382db8..37ce6d6c73 100644 ---

[PATCH v2 3/3] bsps/xilinx_zynq: Add SPI driver to autotools build

--- bsps/headers.am| 5 + c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 3 +++ c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 3 +++ 3 files changed, 11 insertions(+) diff --git a/bsps/headers.am b/bsps/headers.am index 1b82382db8..37ce6d6c73 100644 ---

[PATCH v2 2/3] bsps/xilinx_zynq: Add SPI driver to waf

--- spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml | 2 ++ spec/build/bsps/arm/xilinx-zynq/grp.yml| 2 ++ spec/build/bsps/arm/xilinx-zynq/obj.yml| 4 ++-- .../bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml | 2 ++ spec/build/bsps/objdevspizynq.yml | 18

[PATCH v2 1/3] bsps/xilinx_zynq: Add SPI driver for cadence-spi

@@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 Jan Sommer, Deutsches Zentrum für Luft- und Raumfahrt e. V. (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions

[PATCH v2 0/3] bsps/zynq: Add cadence-SPI driver

v2: - Moved source file to bsps/shared/dev/spi - Moved include files to bsps/include/dev/spi - Enabled build in aarch64 BSPs v1: This patchset implements a driver for the cadence-spi device of the Xilinx Zynq-7000 based SoCs using the spidev API. Jan Sommer (3): bsps/xilinx_zynq: Add SPI

[PATCH 1/3] bsps/xilinx_zynq: Add SPI driver for cadence-spi

--- /dev/null +++ b/bsps/arm/xilinx-zynq/include/bsp/cadence-spi-regs.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 Jan Sommer, Deutsches Zentrum für Luft- und Raumfahrt e. V. (DLR) + * + * Redistribution and use in source and binary forms

[PATCH 3/3] bsps/xilinx_zynq: Add SPI driver to autotools build

--- bsps/arm/xilinx-zynq/headers.am | 2 ++ c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 3 +++ 2 files changed, 5 insertions(+) diff --git a/bsps/arm/xilinx-zynq/headers.am b/bsps/arm/xilinx-zynq/headers.am index 47738c62be..c70be4 100644 --- a/bsps/arm/xilinx-zynq/headers.am

[PATCH 2/3] bsps/xilinx_zynq: Add SPI driver to waf

--- spec/build/bsps/arm/xilinx-zynq/obj.yml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/spec/build/bsps/arm/xilinx-zynq/obj.yml b/spec/build/bsps/arm/xilinx-zynq/obj.yml index 6602b20a03..c41ba9af98 100644 --- a/spec/build/bsps/arm/xilinx-zynq/obj.yml +++

[PATCH 0/3] bsps/zynq: Add cadence-SPI driver

This patchset implements a driver for the cadence-spi device of the Xilinx Zynq-7000 based SoCs using the spidev API. Jan Sommer (3): bsps/xilinx_zynq: Add SPI driver for cadence-spi bsps/xilinx_zynq: Add SPI driver to waf bsps/xilinx_zynq: Add SPI driver to autotools build bsps/arm

[PATCH 1/1] misc: tools: fix mkimage.py script type processing

From: Andre Nahrwold --- misc/tools/mkimage.py | 10 ++ 1 file changed, 10 insertions(+) diff --git a/misc/tools/mkimage.py b/misc/tools/mkimage.py index fd75f0a..111e224 100755 --- a/misc/tools/mkimage.py +++ b/misc/tools/mkimage.py @@ -121,6 +121,16 @@ outputfile.seek(struct.size);

[PATCH 0/1] misc: tools: fix mkimage.py script type processing

Here is the patch from Andre also in git send-email format. It would be great if we could integrate it in master and the 5 braches. Best regards, Jan Andre Nahrwold (1): misc: tools: fix mkimage.py script type processing misc/tools/mkimage.py | 10 ++ 1 file changed, 10

[PATCH 1/1] zynq-uart: Fix set_attributes implementation

From: Kinsey Moore The zynq-uart set_attributes implementation was configured to always return false which causes spconsole01 to fail. This restores the disabled implementation which sets the baud rate registers appropriately and allows spconsole01 to pass. This also expands the set_attributes

[PATCH 0/1] bsps/zynq: Fix termios console driver in RTEMS5

Hello, in RTEMS5 the termios console driver does not seem to work correctly when reading from stdin. This has been fixed by the commit from Kinsey Moore in master. Could someone please push this commit to the 5 branch too? I checked locally and with this patch applied for example the termios

[PATCH v2 1/1] bsp/xilinx_zynq: Enable support for 4kiB MMU pages

- Disabled by default - Enable using ARM_MMU_USE_SMALL_PAGES option --- c/src/lib/libbsp/arm/xilinx-zynq/configure.ac | 4 spec/build/bsps/arm/optmmusmallpages.yml | 17 +++-- spec/build/bsps/arm/xilinx-zynq/grp.yml | 2 +- 3 files changed, 20 insertions(+), 3

[PATCH v2 0/1] xilinx_zynq: Enable support for 4kiB MMU pages

Changes in v2: - Disable the option by default for xilinx_zynq (keep enabled for realview) - Created corresponding ticket: https://devel.rtems.org/ticket/4192 Jan Sommer (1): bsp/xilinx_zynq: Enable support for 4kiB MMU pages c/src/lib/libbsp/arm/xilinx-zynq/configure.ac | 4 spec

[PATCH v1 0/1] xilinx_zynq: Enable support for 4kiB MMU pages

where it is not enabled by default, so that there is no difference for users of 5.1. Ideally, the patch here https://lists.rtems.org/pipermail/devel/2020-November/063461.html is merged beforehand. Best regards, Jan Jan Sommer (1): bsp/xilinx_zynq: Enable support for 4kiB MMU pages c/src

[PATCH v1 1/1] bsp/xilinx_zynq: Enable support for 4kiB MMU pages

--- c/src/lib/libbsp/arm/xilinx-zynq/configure.ac | 4 spec/build/bsps/arm/optmmusmallpages.yml | 10 ++ spec/build/bsps/arm/xilinx-zynq/grp.yml | 2 +- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac

[PATCH v1 1/1] bsps/arm: Fix MMU small pages support

- For small tables only round to the next 4kiB instead of 1MiB --- bsps/arm/include/bsp/arm-cp15-start.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsps/arm/include/bsp/arm-cp15-start.h b/bsps/arm/include/bsp/arm-cp15-start.h index c4686fbbd4..86c4f8afcb 100644 ---

[PATCH v1 0/1] bsps/arm: Fix MMU small pages support

://devel.rtems.org/ticket/4184 - https://devel.rtems.org/ticket/4185 Best regards, Jan Jan Sommer (1): bsps/arm: Fix MMU small pages support bsps/arm/include/bsp/arm-cp15-start.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1

[PATCH v1 0/1] confdefs: Add extern C guards to libpci.h

Hello, We had linking problems with some tests of the testsuite (at least spcxx01) when using libpci. pci_read_config was mangled. Adding those guards fixes the problem. Could also please add the commit to the 5-branch? I will create a corresponding ticket. Best regards, Jan Jan Sommer (1

[PATCH v1 1/1] confdefs: Add extern C guards to libpci.h

--- cpukit/include/rtems/confdefs/libpci.h | 8 1 file changed, 8 insertions(+) diff --git a/cpukit/include/rtems/confdefs/libpci.h b/cpukit/include/rtems/confdefs/libpci.h index a68eea1903..05731f5686 100644 --- a/cpukit/include/rtems/confdefs/libpci.h +++

[PATCH v1] bsps/pc386: Add missing license header

@@ -1,3 +1,29 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 Jan Sommer, Deutsches Zentrum für Luft- und Raumfahrt e. V. (DLR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions

[PATCH v1 1/1] bsp/xilinx-zynq: Flush TX-Buffer before initializing uart

Closes #4055 Closes #4056 --- bsps/arm/shared/serial/zynq-uart-polled.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bsps/arm/shared/serial/zynq-uart-polled.c b/bsps/arm/shared/serial/zynq-uart-polled.c index 4e0ca46aca..e6f478ee07 100644 --- a/bsps/arm/shared/serial/zynq-uart-polled.c

[PATCH v1 0/1] bsp/xilinx-zynq: Flush TX-Buffer before initializing uart

are https://devel.rtems.org/ticket/4055 and https://devel.rtems.org/ticket/4056 Best regards, Jan Jan Sommer (1): bsp/xilinx-zynq: Flush TX-Buffer before initializing uart bsps/arm/shared/serial/zynq-uart-polled.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1

[PATCH v1 3/6] i386: Add missing files to build system

- Update FreeBSD files in libbsd.py to required by i386 based BSPs - Add missing files e1000 network driver (iflib*) --- libbsd.py | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/libbsd.py b/libbsd.py index e02226f3..08931401 100644 --- a/libbsd.py +++ b/libbsd.py

[PATCH v1 6/6] i386: Delete old machine dependent files

- The files in the i386 directory have been moved to common x86 directories by FreeBSD: - freebsd/sys/i386/include/machine/bus.h - freebsd/sys/x86/include/machine/legacyvar.h - freebsd/sys/x86/include/machine/specialreg.h - Add header files in rtemsbsd directory to direct compiler to new

[PATCH v1 5/6] iflib.c: Deactivate use of ifc_cpus

- cpusets and SMP are currently not supported in libbsd for RTEMS - Disable the ifc_cpus context variable and replace its usage, essentially hard-coding for cpu 0 --- freebsd/sys/dev/e1000/if_em.c | 6 ++ freebsd/sys/net/iflib.c | 22 ++ 2 files changed, 28

[PATCH v1 0/6] [libbsd] Fix e1000 driver for i386 in master and 5

someone please check and push them? Best regards, Jan Jan Sommer (6): e1000: Add missing files waf: Add path-mappings feature i386: Add missing files to build system Callout: Redefine callout_reset_on for rtems iflib.c: Deactivate use of ifc_cpus i386: Delete old machine dependent

[PATCH v1 4/6] Callout: Redefine callout_reset_on for rtems

- callout_reset_on takes a cpu which is ignored by the subsequent call to callout_reset_sbt_on in RTEMS. - The macro is redefined to discard the cpu argument directly which enables uses of it with cpu-dependent variables (disabled in RETMS) without further changes, e.g. in iflib.c. ---

[PATCH v1 2/6] waf: Add path-mappings feature

- path-mappings allow to fix autogenerated include paths for some corner cases of target platforms without the need to change the build system - Currently used for i386 based bsps --- libbsd.py | 8 waf_libbsd.py | 13 +++-- 2 files changed, 19 insertions(+), 2 deletions(-)

[PATCH v1 1/1] i386: Fix possible race condition on first context restore

Make sure that the esp is restored before the eflags register. When the init task is initially restored, system interrupts are activated when the eflags register is loaded. If the esp register still points to an address in the interrupt stack area (from early system initlization) the ISR might

[PATCH v1 0/1] i386: Fix possible race condition on first context restore

Ran into this problem sometimes when testing examples of rtems-libbsd, but it should be general. I opened tickets https://devel.rtems.org/ticket/4030 and https://devel.rtems.org/ticket/4031 correspondintly. Cheers, Jan Jan Sommer (1): i386: Fix possible race condition on first context

[PATCH v1 0/1] bsps/pc386: Fix IPI for non-consecutive Apic IDs

an now run 52 examples on an Intel Atom with 4 cores. The patch should apply to master and the 5 branch. Did I understand it correctly, that for integrating the patch in the RTEMS5 release, I need to first create a ticketr? Best regards, Jan Jan Sommer (1): bsps/pc386: Fix IPI for non-conse

[PATCH v1 1/1] bsps/pc386: Fix IPI for non-consecutive APICIDs

- properly use the cpu <-> apic maps for IPIs --- bsps/i386/pc386/start/smp-imps.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/bsps/i386/pc386/start/smp-imps.c b/bsps/i386/pc386/start/smp-imps.c index 0985b8f08f..763ac0afc7 100644 ---

[PATCH v1 8/9] smpsignal01: Change state before sending the signal

The signal handler of the consumer might start executing before rtems_signal_send of the producer returns. Therefore change the state to SIG_1_SENT before sending the signal. --- testsuites/smptests/smpsignal01/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH v1 3/9] bsp/pc386: Update GDT to work for SMP

Create a GS segment in the GDT for each processor for storing TLS. This makes the GDT in startAP.S obsolete as all processors now share the same GDT, which is passed to each AP at startup. The correct segment for each processor is calculated in cpu_asm.S. Update #3335 ---

[PATCH v1 6/9] bsps/pc386: Fix Clock_isr for SMP

- Do not forward Clock_isr through Clock_driver_support_at_tick as this will cause every processor to send IPIs with Clock_isr therby creating an infinie loop - Instead the processor handling the clock interrupt causes all other processors to call rtems_timecounter_tick to update their tick count

[PATCH v1 4/9] bsp/pc386: Update context switch and restore

Uses similar flow in cpu_asm.S for i386 as for arm. --- cpukit/score/cpu/i386/cpu_asm.S | 63 +++-- cpukit/score/cpu/i386/include/rtems/score/cpu.h | 4 +- 2 files changed, 51 insertions(+), 16 deletions(-) diff --git a/cpukit/score/cpu/i386/cpu_asm.S

[PATCH v1 9/9] bsp/pc386: Disable interrupt nesting for job handler

- Fixes timeout for smpipi01 where: + Main thread sends perform jobs to worker cpu while it is already performing jobs + Interrupt on worker cpu performs jobs, but with empty job list + Worker cpu continues to execut previous job and adds new job list to itself, which is never

[PATCH v1 2/9] bsp/pc386: Turn start16.S into a startAP.S

start16.S is now only used for SMP configurations to start the application processors. This commit removes all unnecessary parts for this job, i.e. video conssole initalisation, A20 gate activation and all non-AP related code. Update #3335 --- bsps/i386/pc386/start/smp-imps.c| 14 +-

[PATCH v1 5/9] bsp/pc386: Define interrupt stack frame for smp

- Defines CPU_Interrupt_frame in cpu_impl.h - Updates isq_asm.S to save/restore registers in matching order to interrupt frame --- bsps/i386/shared/irq/irq_asm.S | 102 +++-- cpukit/score/cpu/i386/include/rtems/score/cpu.h| 28 +++---

[PATCH v1 1/9] bsp/pc386: Fix Makefile for building with SMP

--- c/src/lib/libbsp/i386/pc386/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/c/src/lib/libbsp/i386/pc386/Makefile.am b/c/src/lib/libbsp/i386/pc386/Makefile.am index 354ad0b23e..218e6bc065 100644 --- a/c/src/lib/libbsp/i386/pc386/Makefile.am +++

[PATCH v1 0/9] Enable SMP for pc386 based bsps

oal would be to get the final revision published as part of the RTEMS5 release. If you would like to see any logs from a testsuite run with certain parameters, just tell me. Best regards, Jan Jan Sommer (9): bsp/pc386: Fix Makefile for building with SMP bsp/pc386: Turn start1

[PATCH v1 7/9] bsps/pc386: Separate smp API functions. Makes smpfatal08 link

--- bsps/i386/include/bsp/smp-imps.h| 3 +++ bsps/i386/pc386/include/bsp.h | 7 ++ bsps/i386/pc386/start/bspsmp.c | 43 + bsps/i386/pc386/start/getcpuid.c| 22 - bsps/i386/pc386/start/smp-imps.c| 40

[PATCH 1/1] smpsignal01: Change state before sending the signal

The signal handler of the consumer might start executing before rtems_signal_send of the producer returns. Therefore change the state to SIG_1_SENT before sending the signal. --- testsuites/smptests/smpsignal01/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 0/1] smpsignal01: Change state before sending signal

that the state always has the correct value for the handler to process. Best regards, Jan Jan Sommer (1): smpsignal01: Change state before sending the signal testsuites/smptests/smpsignal01/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.12.3

[PATCH v5 0/7] [5-freebsd-12] Fix compilation for i386

tests (e.g. dhcpcd0x.exe on hardware) Changes compared to v2: - callout.h: Change the callout_reset_on macro - iflib.c: Do not use different callout* macro, but use the changed one Best regards, Jan Jan Sommer (7): i386: Add missing files from FreeBSD waf: Add path-mappings feature i386

[PATCH v5 7/7] i386: Port to RTEMS

- Update imported files to compile rtems-libbsd for i386 based BSPs - Mostly commenting out parts which create compile or link errors in RTEMS, but aren't needed --- freebsd/sbin/sysctl/sysctl.c| 8 freebsd/sys/dev/pci/pci_pci.c | 2 ++

[PATCH v5 4/7] Callout: Redefine callout_reset_on for rtems

- callout_reset_on takes a cpu which is ignored by the subsequent call to callout_reset_sbt_on in RTEMS. - The macro is redefined to discard the cpu argument directly which enables uses of it with cpu-dependent variables (disabled in RETMS) without further changes, e.g. in iflib.c. ---

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